Merged in masayuki2009/nuttx.nuttx/lc823450_spif_boot (pull request #801)

lc823450 spif boot

* arch/arm/src/lc823450: Add support for SPI flash boot

    Also, remove unnecessary code for the SPI flash boot

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

* configs/lc823450-xgevk: Add linker script for SPI flash boot

    Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>

Approved-by: GregoryN <gnutt@nuttx.org>
This commit is contained in:
Masayuki Ishikawa 2019-01-04 12:03:55 +00:00 committed by GregoryN
parent 2697b087c6
commit f1c806526f
6 changed files with 151 additions and 63 deletions

View File

@ -42,6 +42,9 @@ if LC823450_SPIFI
config LC823450_SPIFI_QUADIO
bool "SPIFI 4bit access"
default y
config LC823450_SPIFI_BOOT
bool "Boot from an external SPI flash"
default n
endif
config LC823450_SDIF

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@ -140,12 +140,8 @@ CHIP_CSRCS += lc823450_adc.c
endif
ifeq ($(CONFIG_LC823450_IPL2),y)
ifeq ($(CONFIG_LC823450_SPIFLASH_BOOT),y)
CHIP_CSRCS += lc823450_spif_ipl2.c
else
CHIP_CSRCS += lc823450_ipl2.c
endif
endif
ifeq ($(CONFIG_DVFS),y)
CHIP_CSRCS += lc823450_dvfs2.c
@ -157,10 +153,6 @@ CHIP_CSRCS += lc823450_pminitialize.c
CHIP_CSRCS += lc823450_sleep.c
endif
ifeq ($(CONFIG_LC823450_SPIFI_RAMFAT), y)
CHIP_CSRCS += lc823450_ramfat.c
endif
ifeq ($(CONFIG_SMP), y)
CHIP_CSRCS += lc823450_cpuidlestack.c
CHIP_CSRCS += lc823450_cpuindex.c

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@ -165,7 +165,12 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
/* Return the heap settings */
*heap_start = (uintptr_t *)&_eronly; /* please see ld.script */
#ifdef CONFIG_LC823450_SPIFI_BOOT
*heap_start = (uintptr_t *)&_ebss + 4096; /* see ld-spif-boot.script */
#else
*heap_start = (uintptr_t *)&_eronly; /* see ld.script */
#endif
*heap_size = SRAM1_END - (int)*heap_start;
/* Colorize the heap for debug */

View File

@ -201,11 +201,7 @@ static void go_os_start(void *pv, unsigned int nbytes)
*
****************************************************************************/
#ifdef CONFIG_SPIFLASH_BOOT
__attribute__((section (".start_text"))) void __start_main(void)
#else /* CONFIG_SPIFLASH_BOOT */
void __start(void)
#endif /* CONFIG_SPIFLASH_BOOT */
{
const uint32_t *src;
uint32_t *dest;
@ -261,26 +257,23 @@ void __start(void)
g_lastksg_buf.sig = LASTKMSG_SIG;
#endif /* CONFIG_LASTKMSG */
#ifdef CONFIG_SPIFLASH_BOOT
#ifdef CONFIG_LC823450_SPIFI_BOOT
/* Copy any necessary code sections from FLASH to RAM. The correct
* destination in SRAM is given by _sramfuncs and _eramfuncs. The
* temporary location is in flash after the data initalization code
* at _framfuncs.
* destination in SRAM is geive by _sramfuncs and _eramfuncs. The
* temporary location is in flash after the data initialization code
* at _framfuncs. This should be done before lc823450_clockconfig() is
* called (in case it has some dependency on initialized C variables).
*/
/* copt text & vectors */
for (src = &_ftext, dest = &_stext_sram; dest < &_etext_sram; )
#ifdef CONFIG_ARCH_RAMFUNCS
for (src = &_framfuncs, dest = &_sramfuncs; dest < &_eramfuncs; )
{
*dest++ = *src++;
}
#endif
/* vector offset */
putreg32((uint32_t)&_svect, NVIC_VECTAB);
#else /* CONFIG_SPIFLASH_BOOT */
#else /* CONFIG_LC823450_SPIFI_BOOT */
/* vector offset */
#ifdef CONFIG_LC823450_IPL2
@ -289,7 +282,8 @@ void __start(void)
#else /* CONFIG_LC823450_IPL2 */
putreg32(0x02040000, 0xe000ed08);
#endif /* CONFIG_LC823450_IPL2 */
#endif /* CONFIG_LC823450_SPIFLASH_BOOT */
#endif /* CONFIG_LC823450_SPIFI_BOOT */
/* Enable Mutex */
/* NOTE: modyfyreg32() can not be used because it might use spin_lock */
@ -327,7 +321,7 @@ void __start(void)
showprogress('B');
#if defined(CONFIG_LC823450_SPIFI) && !defined(CONFIG_SPIFLASH_BOOT)
#if defined(CONFIG_LC823450_SPIFI) && !defined(CONFIG_LC823450_SPIFI_BOOT)
lc823450_spiflash_earlyinit();
#endif /* CONFIG_LC823450_SPIFI */
@ -421,39 +415,3 @@ void __start(void)
#endif
}
#if defined(CONFIG_SPIFLASH_BOOT)
__attribute__((section (".start_gdb"))) void __start(void)
{
/* XXX: Don't use stack in this function */
/* SPIF/CACHE clock */
putreg32(0x0402, 0x40080100);
/* SPIF/CACHE reset */
putreg32(0x0402, 0x40080114);
/* PinMux for QSPI */
putreg32(0x540000c0, 0x40080400);
putreg32(0x00000017, 0x40080404);
/* BusAcc enable */
putreg32(0x00000303, 0x40001028);
/* Stack initialize: */
__asm__ __volatile__
(
"ldr r0, =_vectors\n"
"bic r0, r0, #1\n"
"ldr sp, [r0, #0]\n"
);
__start_main();
/* not reached */
}
#endif /* defined(CONFIG_SPIFLASH_BOOT) */

View File

@ -39,9 +39,13 @@ include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
ifeq ($(CONFIG_LC823450_IPL2),y)
LDSCRIPT = ld-ipl2.script
else
ifeq ($(CONFIG_LC823450_SPIFI_BOOT),y)
LDSCRIPT = ld-spif-boot.script
else
LDSCRIPT = ld.script
endif
endif
ifeq ($(WINTOOL),y)
# Windows-native toolchains

View File

@ -0,0 +1,126 @@
/****************************************************************************
* configs/lc823450-xgevk/scripts/ld-spif-boot.script
*
* Copyright 2019 Sony Video & Sound Products Inc.
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
MEMORY
{
flash (rx) : ORIGIN = 0x05000000, LENGTH = 16384K
sram (rwx) : ORIGIN = 0x02001000, LENGTH = 1652K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text :
{
_stext = ABSOLUTE(.);
KEEP(*(.vectors))
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section :
{
_sinit = ABSOLUTE(.);
KEEP(*(.init_array .init_array.*))
_einit = ABSOLUTE(.);
} > flash
.ARM.extab :
{
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx :
{
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(LOADADDR(.data));
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > flash
.ramfunc ALIGN(4):
{
_sramfuncs = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfuncs = ABSOLUTE(.);
} > sram AT > flash
_framfuncs = LOADADDR(.ramfunc);
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}