xtensa/esp32s3: Enable UART pins to use IOMUX and bypass GPIO matrix
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
This commit is contained in:
Gustavo Henrique Nihei
Petro Karashchenko
parent
77944ceb42
commit
f21a9f9578
@ -40,6 +40,7 @@
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#include "chip.h"
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#include "xtensa.h"
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#include "hardware/esp32s3_pinmap.h"
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#include "hardware/esp32s3_system.h"
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#include "hardware/esp32s3_uart.h"
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#include "hardware/esp32s3_soc.h"
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@ -50,6 +51,10 @@
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#include "esp32s3_lowputc.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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@ -139,6 +144,59 @@ struct esp32s3_uart_s g_uart1_config =
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#endif /* CONFIG_ESP32S3_UART1 */
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#endif /* HAVE_UART_DEVICE */
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/****************************************************************************
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* Name: uart_is_iomux
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*
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* Description:
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* Check if the selected UART pins can use IOMUX directly. Otherwise, UART
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* signals will be routed via GPIO Matrix.
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*
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* Input Parameters:
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* priv - Pointer to the private driver struct.
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*
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* Returned Value:
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* True if can use IOMUX or false if can't.
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*
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****************************************************************************/
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static inline bool uart_is_iomux(const struct esp32s3_uart_s *priv)
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{
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bool mapped = false;
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if (priv->id == 0)
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{
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if (priv->txpin == UART0_IOMUX_TXPIN
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&& priv->rxpin == UART0_IOMUX_RXPIN
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#ifdef CONFIG_UART0_IFLOWCONTROL
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&& priv->rtspin == UART0_IOMUX_RTSPIN
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#endif
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#ifdef CONFIG_UART0_OFLOWCONTROL
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&& priv->ctspin == UART0_IOMUX_CTSPIN
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#endif
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)
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{
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mapped = true;
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}
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}
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else if (priv->id == 1)
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{
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if (priv->txpin == UART1_IOMUX_TXPIN
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&& priv->rxpin == UART1_IOMUX_RXPIN
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#ifdef CONFIG_UART1_IFLOWCONTROL
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&& priv->rtspin == UART1_IOMUX_RTSPIN
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#endif
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#ifdef CONFIG_UART1_OFLOWCONTROL
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&& priv->ctspin == UART1_IOMUX_CTSPIN
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#endif
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)
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{
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mapped = true;
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}
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}
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return mapped;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -737,28 +795,54 @@ void esp32s3_lowputc_config_pins(const struct esp32s3_uart_s *priv)
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{
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/* Configure the pins */
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esp32s3_gpio_matrix_out(priv->txpin, priv->txsig, 0, 0);
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esp32s3_configgpio(priv->txpin, OUTPUT_FUNCTION_2);
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if (uart_is_iomux(priv))
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{
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esp32s3_configgpio(priv->txpin, OUTPUT_FUNCTION_1);
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esp32s3_gpio_matrix_out(priv->txpin, SIG_GPIO_OUT_IDX, 0, 0);
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esp32s3_configgpio(priv->rxpin, INPUT_FUNCTION_2);
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esp32s3_gpio_matrix_in(priv->rxpin, priv->rxsig, 0);
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esp32s3_configgpio(priv->rxpin, INPUT_FUNCTION_1);
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esp32s3_gpio_matrix_out(priv->rxpin, SIG_GPIO_OUT_IDX, 0, 0);
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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if (priv->iflow)
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{
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esp32s3_configgpio(priv->rtspin, OUTPUT_FUNCTION_1);
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esp32s3_gpio_matrix_out(priv->rtspin, priv->rtssig,
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0, 0);
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}
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if (priv->iflow)
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{
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esp32s3_configgpio(priv->rtspin, OUTPUT_FUNCTION_3);
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esp32s3_gpio_matrix_out(priv->rtspin, SIG_GPIO_OUT_IDX, 0, 0);
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}
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#endif
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#ifdef CONFIG_SERIAL_OFLOWCONTROL
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if (priv->oflow)
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{
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esp32s3_configgpio(priv->ctspin, INPUT_FUNCTION_1);
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esp32s3_gpio_matrix_in(priv->ctspin, priv->ctssig, 0);
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}
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if (priv->oflow)
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{
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esp32s3_configgpio(priv->ctspin, INPUT_FUNCTION_3);
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esp32s3_gpio_matrix_out(priv->ctspin, SIG_GPIO_OUT_IDX, 0, 0);
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}
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#endif
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}
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else
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{
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esp32s3_configgpio(priv->txpin, OUTPUT_FUNCTION_2);
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esp32s3_gpio_matrix_out(priv->txpin, priv->txsig, 0, 0);
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esp32s3_configgpio(priv->rxpin, INPUT_FUNCTION_2);
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esp32s3_gpio_matrix_in(priv->rxpin, priv->rxsig, 0);
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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if (priv->iflow)
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{
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esp32s3_configgpio(priv->rtspin, OUTPUT_FUNCTION_2);
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esp32s3_gpio_matrix_out(priv->rtspin, priv->rtssig, 0, 0);
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}
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#endif
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#ifdef CONFIG_SERIAL_OFLOWCONTROL
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if (priv->oflow)
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{
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esp32s3_configgpio(priv->ctspin, INPUT_FUNCTION_2);
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esp32s3_gpio_matrix_in(priv->ctspin, priv->ctssig, 0);
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}
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#endif
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}
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}
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/****************************************************************************
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51
arch/xtensa/src/esp32s3/hardware/esp32s3_pinmap.h
Normal file
51
arch/xtensa/src/esp32s3/hardware/esp32s3_pinmap.h
Normal file
@ -0,0 +1,51 @@
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/****************************************************************************
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* arch/xtensa/src/esp32s3/hardware/esp32s3_pinmap.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32S3_HARDWARE_ESP32S3_PINMAP_H
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#define __ARCH_XTENSA_SRC_ESP32S3_HARDWARE_ESP32S3_PINMAP_H
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/**
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* Peripheral' fixed mapped pins by IOMUX, these GPIO pins can have better
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* speed performance.
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*/
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/* UART0 */
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#define UART0_IOMUX_TXPIN (43)
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#define UART0_IOMUX_RXPIN (44)
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#define UART0_IOMUX_RTSPIN (15)
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#define UART0_IOMUX_CTSPIN (16)
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/* UART1 */
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#define UART1_IOMUX_TXPIN (17)
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#define UART1_IOMUX_RXPIN (18)
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#define UART1_IOMUX_RTSPIN (19)
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#define UART1_IOMUX_CTSPIN (20)
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#endif /* __ARCH_XTENSA_SRC_ESP32S3_HARDWARE_ESP32S3_PINMAP_H */
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