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SAMD20/1: Fix some typos found by inspecting header files

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This commit is contained in:
Gregory Nutt 2015-07-04 07:19:52 -06:00
parent ee21a3ad77
commit f235144989
2 changed files with 7 additions and 5 deletions
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8
arch/arm/src/samdl/chip/samd_pm.h
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@ -93,8 +93,10 @@
/* Control register */
#define PM_CTRL_CFDEN (1 << 2) /* Bit 2: Clock Failure Detector Enable */
#define PM_CTRL_BKUPCLK (1 << 4) /* Bit 4: Backup Clock Select */
#ifdef CONFIG_ARCH_FAMILY_SAMD20
# define PM_CTRL_CFDEN (1 << 2) /* Bit 2: Clock Failure Detector Enable */
# define PM_CTRL_BKUPCLK (1 << 4) /* Bit 4: Backup Clock Select */
#endif
/* Sleep mode register */
@ -226,7 +228,7 @@
#define PM_APBCMASK_PTC (1 << 19) /* Bit 19: PTC */
#ifdef CONFIG_ARCH_FAMILY_SAMD21
# define PM_APBBMASK_I2S (1 << 10) /* Bit 20: Inter IC Sound */
# define PM_APBBMASK_I2S (1 << 20) /* Bit 20: Inter IC Sound */
#endif
/* Interrupt enable clear, Interrupt enable set, and Interrupt flag status and clear registers */

4
arch/arm/src/samdl/chip/samd_sysctrl.h
View File

@ -81,8 +81,8 @@
#ifdef CONFIG_ARCH_FAMILY_SAMD21
# define SAM_SYSCTRL_DPLLCTRLA_OFFSET 0x0044 /* DPLL Control A */
# define SAM_SYSCTRL_DPLLRATIO_OFFSET 0x0048 /* DPLL ratio control */
# define SAM_SYSCTRL_DPLLCTRLB_OFFSET 0x0048 /* DPLL Control B */
# define SAM_SYSCTRL_DPLLSTATUS_OFFSET 0x0048 /* DPLL status */
# define SAM_SYSCTRL_DPLLCTRLB_OFFSET 0x004c /* DPLL Control B */
# define SAM_SYSCTRL_DPLLSTATUS_OFFSET 0x0050 /* DPLL status */
#endif
/* SYSCTRL register addresses ***************************************************************/