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arch/arm/src/lpc54xx: Completes basic packet transfer logic for Ethernet drivers. Still some unfinished logic for IPv6 multicast logic and for various non-mainstream configurations. But it is ready for tested. configs/lpcxpresso-lpc54628: Add a netnsh configuration that will be used to test the Ethernet driver. Untested on initial commit.

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This commit is contained in:
Gregory Nutt 2017-12-30 12:51:57 -06:00
parent 2fb441b145
commit f23fb9dd14
5 changed files with 785 additions and 294 deletions
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45
arch/arm/src/lpc54xx/chip/lpc54_ethernet.h
View File

@ -99,7 +99,7 @@
#define LPC54_ETH_MTL_INTR_STAT_OFFSET 0x0c20 /* MTL interrupt status */
#define LPC54_ETH_MTL_RXQ_DMA_MAP_OFFSET 0x0c30 /* MTL Rx Queue and DMA channel mapping */
#define LPC54_ETH_MTL_Q_OFFSET(n) (0x0d00 + ((n) << 6))
#define LPC54_ETH_MTL_Qn_OFFSET(n) (0x0d00 + ((n) << 6))
#define LPC54_ETH_MTL_TXQ_OP_MODE_OFFSET 0x0000 /* MTL TxQn operation mode */
#define LPC54_ETH_MTL_TXQ_UNDRFLW_OFFSET 0x0004 /* MTL TxQn underflow */
@ -121,7 +121,7 @@
#define LPC54_ETH_DMA_INTR_STAT_OFFSET 0x1008 /* DMA interrupt status */
#define LPC54_ETH_DMA_DBG_STAT_OFFSET 0x100c /* DMA debug status */
#define LPC54_ETH_DMACH_CTRL_OFFSET(n) (0x1100 + ((n) << 7))
#define LPC54_ETH_DMACH_CTRLn_OFFSET(n) (0x1100 + ((n) << 7))
#define LPC54_ETH_DMACH_CTRL_OFFSET 0x0000 /* DMA channel n control */
#define LPC54_ETH_DMACH_TX_CTRL_OFFSET 0x0004 /* DMA channel n transmit control */
@ -194,7 +194,7 @@
#define LPC54_ETH_MTL_INTR_STAT (LPC54_ETHERNET_BASE + LPC54_ETH_MTL_INTR_STAT_OFFSET)
#define LPC54_ETH_MTL_RXQ_DMA_MAP (LPC54_ETHERNET_BASE + LPC54_ETH_MTL_RXQ_DMA_MAP_OFFSET)
#define LPC54_ETH_MTL_Q_BASE(n) (LPC54_ETHERNET_BASE + LPC54_ETH_MTL_Q_OFFSET(n))
#define LPC54_ETH_MTL_Q_BASE(n) (LPC54_ETHERNET_BASE + LPC54_ETH_MTL_Qn_OFFSET(n))
#define LPC54_ETH_MTL_TXQ_OP_MODE(n) (LPC54_ETH_MTL_Q_BASE(n) + LPC54_ETH_MTL_TXQ_OP_MODE_OFFSET)
#define LPC54_ETH_MTL_TXQ_UNDRFLW(n) (LPC54_ETH_MTL_Q_BASE(n) + LPC54_ETH_MTL_TXQ_UNDRFLW_OFFSET)
@ -216,26 +216,26 @@
#define LPC54_ETH_DMA_INTR_STAT (LPC54_ETHERNET_BASE + LPC54_ETH_DMA_INTR_STAT_OFFSET)
#define LPC54_ETH_DMA_DBG_STAT (LPC54_ETHERNET_BASE + LPC54_ETH_DMA_DBG_STAT_OFFSET)
#define LPC54_ETH_DMACH_CTRL_BASE(n) (LPC54_ETHERNET_BASE + LPC54_ETH_DMACH_CTRL_OFFSET(n))
#define LPC54_ETH_DMACH_CTRL_BASE(n) (LPC54_ETHERNET_BASE + LPC54_ETH_DMACH_CTRLn_OFFSET(n))
#define LPC54_ETH_DMACH_CTRL(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_CTRL_OFFSET)
#define LPC54_ETH_DMACH_TX_CTRL(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_TX_CTRL_OFFSET)
#define LPC54_ETH_DMACH_RX_CTRL(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_RX_CTRL_OFFSET)
#define LPC54_ETH_DMACH_TXDESC_LIST_ADDR(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_TXDESC_LIST_ADDR_OFFSET)
#define LPC54_ETH_DMACH_RXDESC_LIST_ADDR(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_RXDESC_LIST_ADDR_OFFSET)
#define LPC54_ETH_DMACH_TXDESC_TAIL_PTR(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_TXDESC_TAIL_PTR_OFFSET)
#define LPC54_ETH_DMACH_RXDESC_TAIL_PTR(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_RXDESC_TAIL_PTR_OFFSET)
#define LPC54_ETH_DMACH_TXDESC_RING_LENGTH(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_TXDESC_RING_LENGTH_OFFSET)
#define LPC54_ETH_DMACH_RXDESC_RING_LENGTH(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_RXDESC_RING_LENGTH_OFFSET)
#define LPC54_ETH_DMACH_INT_EN(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_INT_EN_OFFSET)
#define LPC54_ETH_DMACH_RX_INT_WDTIMER(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_RX_INT_WDTIMER_OFFSET)
#define LPC54_ETH_DMACH_SLOT_FUNC_CTRL_STAT(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_SLOT_FUNC_CTRL_STAT_OFFSET)
#define LPC54_ETH_DMACH_CUR_HST_TXDESC(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_CUR_HST_TXDESC_OFFSET)
#define LPC54_ETH_DMACH_CUR_HST_RXDESC(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_CUR_HST_RXDESC_OFFSET)
#define LPC54_ETH_DMACH_CUR_HST_TXBUF(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_CUR_HST_TXBUF_OFFSET)
#define LPC54_ETH_DMACH_CUR_HST_RXBUF(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_CUR_HST_RXBUF_OFFSET)
#define LPC54_ETH_DMACH_STAT(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_STAT_OFFSET)
#define LPC54_ETH_DMACH_MISS_FRAME_CNT(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH0_MISS_FRAME_CNT_OFFSET)
#define LPC54_ETH_DMACH_CTRL(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_CTRL_OFFSET)
#define LPC54_ETH_DMACH_TX_CTRL(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_TX_CTRL_OFFSET)
#define LPC54_ETH_DMACH_RX_CTRL(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_RX_CTRL_OFFSET)
#define LPC54_ETH_DMACH_TXDESC_LIST_ADDR(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_TXDESC_LIST_ADDR_OFFSET)
#define LPC54_ETH_DMACH_RXDESC_LIST_ADDR(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_RXDESC_LIST_ADDR_OFFSET)
#define LPC54_ETH_DMACH_TXDESC_TAIL_PTR(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_TXDESC_TAIL_PTR_OFFSET)
#define LPC54_ETH_DMACH_RXDESC_TAIL_PTR(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_RXDESC_TAIL_PTR_OFFSET)
#define LPC54_ETH_DMACH_TXDESC_RING_LENGTH(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_TXDESC_RING_LENGTH_OFFSET)
#define LPC54_ETH_DMACH_RXDESC_RING_LENGTH(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_RXDESC_RING_LENGTH_OFFSET)
#define LPC54_ETH_DMACH_INT_EN(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_INT_EN_OFFSET)
#define LPC54_ETH_DMACH_RX_INT_WDTIMER(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_RX_INT_WDTIMER_OFFSET)
#define LPC54_ETH_DMACH_SLOT_FUNC_CTRL_STAT(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_SLOT_FUNC_CTRL_STAT_OFFSET)
#define LPC54_ETH_DMACH_CUR_HST_TXDESC(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_CUR_HST_TXDESC_OFFSET)
#define LPC54_ETH_DMACH_CUR_HST_RXDESC(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_CUR_HST_RXDESC_OFFSET)
#define LPC54_ETH_DMACH_CUR_HST_TXBUF(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_CUR_HST_TXBUF_OFFSET)
#define LPC54_ETH_DMACH_CUR_HST_RXBUF(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_CUR_HST_RXBUF_OFFSET)
#define LPC54_ETH_DMACH_STAT(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_STAT_OFFSET)
#define LPC54_ETH_DMACH_MISS_FRAME_CNT(n) (LPC54_ETH_DMACH_CTRL_BASE(n) + LPC54_ETH_DMACH_MISS_FRAME_CNT_OFFSET)
/* Register bit definitions *********************************************************************************/
@ -739,6 +739,7 @@
#define ETH_TXDES3_FL_SHIFT (0) /* Bits 0-14: Frame length */
#define ETH_TXDES3_FL_MASK (0x7fff << ETH_TXDES3_FL_SHIFT)
# define ETH_TXDES3_FL(n) ((uint32_t)(n) << ETH_TXDES3_FL_SHIFT)
#define ETH_TXDES3_CIC_SHIFT (16) /* Bits 16-17: Checksum insertion control */
#define ETH_TXDES3_CIC_MASK (3 << ETH_TXDES3_CIC_SHIFT)
# define ETH_TXDES3_CIC_DISABLED (0 << ETH_TXDES3_CIC_SHIFT) /* Checksum insertion disabled */

912
arch/arm/src/lpc54xx/lpc54_ethernet.c
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File diff suppressed because it is too large Load Diff

25
configs/lpcxpresso-lpc54628/README.txt
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@ -82,9 +82,12 @@ STATUS
call into ROM. Increasing the stack size does not seem to help. Perhaps
to use the ROM at high frequencies it may be necessary to modify the ROM
access timing in some way???
2017-12-30: Completed implementation of an Ethernet driver. Untested as
of this writing. Also added the netnsh configuration will, eventually,
be used to test the Ethernet diver.
There is still no support for the Accelerometer, SPIFI, Ethernet, or USB.
There is a complete, but not-yet-functional SD card drirver. There is a
There is still no support for the Accelerometer, SPIFI, or USB. There are
complete but not-yet-functional SD card and Ethernet drivers. There is a
partial SPI driver, but no on-board SPI devices to test it.
Configurations
@ -216,6 +219,24 @@ Configurations
interrupts are not supported on P4. So polled mode only for this
puppy.
netnsh:
------
This is a special version of the NuttShell (nsh) configuration that is
tailored for network testing. This version derives from nsh
configuration so manhy of the notes apply there except as noted below.
NOTES:
1. Networking is enabled. The LPCXpressio-LPC54628 has an SMC _LAN8720 PHY
and RJ45 network connector. Support is enabled for IPv4, IPv6, TCP/IP,
UDP, ICMP, ICMPv6, and ARP.
2. SD card and I2C support are not enabled. The I2C tool application is
not enabled
3. SDRAM support is enabled and the SDRAM is added to the system heap. The
Ramtest applications is not enabled.
nsh:
Configures the NuttShell (nsh) application located at examples/nsh.

74
configs/lpcxpresso-lpc54628/netnsh/defconfig Normal file
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@ -0,0 +1,74 @@
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_DISABLE_TELNETD is not set
CONFIG_ARCH_BOARD_LPCXPRESSO_LPC54628=y
CONFIG_ARCH_BOARD="lpcxpresso-lpc54628"
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP_LPC54628=y
CONFIG_ARCH_CHIP_LPC54XX=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_STDARG_H=y
CONFIG_ARCH="arm"
CONFIG_BOARD_LOOPSPERMSEC=21082
CONFIG_BUILTIN=y
CONFIG_BUTTONS_LOWER=y
CONFIG_BUTTONS=y
CONFIG_ETH0_PHY_LAN8720=y
CONFIG_EXAMPLES_NSH=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_FS_WRITABLE=y
CONFIG_INPUT=y
CONFIG_LPC54_EMC_DYNAMIC_CS0_SIZE=0x01000000
CONFIG_LPC54_EMC_DYNAMIC_CS0=y
CONFIG_LPC54_EMC=y
CONFIG_LPC54_ETHERNET=y
CONFIG_LPC54_GPIOIRQ=y
CONFIG_LPC54_USART0=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=2
CONFIG_NET_ARP_SEND=y
CONFIG_NET_HOSTNAME="LpcXpresso-Lpc54628"
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ICMP=y
CONFIG_NET_ICMPv6_NEIGHBOR=y
CONFIG_NET_ICMPv6_SOCKET=y
CONFIG_NET_ICMPv6=y
CONFIG_NET_IPv6=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP=y
CONFIG_NET=y
CONFIG_NETUTILS_TELNETC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_NETLOCAL=y
CONFIG_NSH_NOMAC=y
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_PREALLOC_TIMERS=4
CONFIG_PREALLOC_WDOGS=4
CONFIG_RAM_SIZE=163840
CONFIG_RAM_START=0x10000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=2
CONFIG_START_MONTH=12
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_PING=y
CONFIG_SYSTEM_PING6=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART0_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WDOG_INTRESERVE=0

23
drivers/net/skeleton.c
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@ -376,7 +376,7 @@ static void skel_receive(FAR struct skel_driver_s *priv)
#ifdef CONFIG_NET_IPv6
else
{
neighbor_out(&kel->sk_dev);
neighbor_out(&skel->sk_dev);
}
#endif
@ -661,27 +661,6 @@ static void skel_txtimeout_expiry(int argc, wdparm_t arg, ...)
work_queue(ETHWORK, &priv->sk_irqwork, skel_txtimeout_work, priv, 0);
}
/****************************************************************************
* Name: skel_poll_process
*
* Description:
* Perform the periodic poll. This may be called either from watchdog
* timer logic or from the worker thread, depending upon the configuration.
*
* Parameters:
* priv - Reference to the driver state structure
*
* Returned Value:
* None
*
* Assumptions:
*
****************************************************************************/
static inline void skel_poll_process(FAR struct skel_driver_s *priv)
{
}
/****************************************************************************
* Name: skel_poll_work
*