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SAMA5: Add slow clock support

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This commit is contained in:
Gregory Nutt 2014-07-19 13:07:55 -06:00
parent 414fb2b154
commit f240f7e513
17 changed files with 33 additions and 13 deletions
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5
configs/sama5d3-xplained/include/board.h
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@ -52,6 +52,11 @@
* definitions will configure operational clocking.
*/
/* On-board crystal frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */
#if defined(CONFIG_SAMA5_BOOT_SDRAM)
/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader.
* That bootloader had to have already configured the PLL and SDRAM for proper

1
configs/sama5d3-xplained/include/board_384mhz.h
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@ -161,7 +161,6 @@
/* Resulting frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */

1
configs/sama5d3-xplained/include/board_396mhz.h
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@ -119,7 +119,6 @@
/* Resulting frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */

1
configs/sama5d3-xplained/include/board_528mhz.h
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@ -118,7 +118,6 @@
/* Resulting frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */

1
configs/sama5d3-xplained/include/board_sdram.h
View File

@ -57,7 +57,6 @@
* the Main clock source in the on-board 12MHz crystal.
*/
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))

5
configs/sama5d3x-ek/include/board.h
View File

@ -52,6 +52,11 @@
* definitions will configure operational clocking.
*/
/* On-board crystal frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */
#if defined(CONFIG_SAMA5_BOOT_SDRAM)
/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader.
* That bootloader had to have already configured the PLL and SDRAM for proper

1
configs/sama5d3x-ek/include/board_384mhz.h
View File

@ -161,7 +161,6 @@
/* Resulting frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */

1
configs/sama5d3x-ek/include/board_396mhz.h
View File

@ -119,7 +119,6 @@
/* Resulting frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */

1
configs/sama5d3x-ek/include/board_528mhz.h
View File

@ -118,7 +118,6 @@
/* Resulting frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */

1
configs/sama5d3x-ek/include/board_sdram.h
View File

@ -57,7 +57,6 @@
* the Main clock source in the on-board 12MHz crystal.
*/
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))

3
configs/sama5d4-ek/README.txt
View File

@ -2754,7 +2754,8 @@ Audio Support
CONFIG_SAMA5_SSC_MAXINFLIGHT=16 : Up to 16 pending DMA transfers
CONFIG_SAMA5_SSC0_MASTER=y : Master mode
CONFIG_SAMA5_SSC0_DATALEN=16 : 16-bit data
CONFIG_SAMA5_SSC0_RX=n : No receiver
CONFIG_SAMA5_SSC0_RX=y : Support a receiver
CONFIG_SAMA5_SSC0_RX_RKINPUT=y : Receiver gets clock from RK input
CONFIG_SAMA5_SSC0_TX=y : Support a transmitter
CONFIG_SAMA5_SSC0_TX_MCKDIV=y : Transmitter gets clock from MCK/2
CONFIG_SAMA5_SSC0_MCKDIV_SAMPLERATE=48000 : Sampling at 48K samples/sec

5
configs/sama5d4-ek/include/board.h
View File

@ -52,6 +52,11 @@
* definitions will configure operational clocking.
*/
/* On-board crystal frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */
#if defined(CONFIG_SAMA5_BOOT_SDRAM)
/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate bootloader.
* That bootloader had to have already configured the PLL and SDRAM for proper

1
configs/sama5d4-ek/include/board_384mhz.h
View File

@ -159,7 +159,6 @@
/* Resulting frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */

1
configs/sama5d4-ek/include/board_396mhz.h
View File

@ -117,7 +117,6 @@
/* Resulting frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */

1
configs/sama5d4-ek/include/board_528mhz.h
View File

@ -116,7 +116,6 @@
/* Resulting frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */

1
configs/sama5d4-ek/include/board_sdram.h
View File

@ -57,7 +57,6 @@
* the Main clock source in the on-board 12MHz crystal.
*/
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))

16
configs/sama5d4-ek/src/sam_wm8904.c
View File

@ -49,10 +49,14 @@
#include <nuttx/audio/i2s.h>
#include <nuttx/audio/wm8904.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "sam_pio.h"
#include "sam_twi.h"
#include "sam_ssc.h"
#include "sam_sckc.h"
#include "sam_pck.h"
#include "sama5d4-ek.h"
@ -270,6 +274,18 @@ int sam_wm8904_initialize(int minor)
goto errout_with_i2s;
}
/* Configure the DAC master clock. This clock is provided by PCK0 (PB26)
* that is connected to the WM8904 BCLK/GPIO4 and also drives the SSC
* TK0 input clock.
*/
sam_sckc_enable(true);
(void)sam_pck_configure(PCK0, BOARD_SLOWCLK_FREQUENCY);
/* Enable the DAC master clock */
sam_pck_enable(PCK0, true);
/* Configure WM8904 interrupts */
sam_pioirq(PIO_INT_WM8904);