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imxrt:gpio Support readback on OUT GPIO

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imxrt:gpio ran through nxstyle
This commit is contained in:
David Sidrane 2019-12-12 16:22:39 -08:00
parent 54d6a0768c
commit f297e41219
1 changed files with 52 additions and 14 deletions
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66
arch/arm/src/imxrt/imxrt_gpio.c
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@ -102,7 +102,8 @@ static const uint8_t g_gpio1_padmux[IMXRT_GPIO_NPINS] =
IMXRT_PADMUX_GPIO_AD_B1_15_INDEX /* GPIO1 Pin 31 */
};
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x))
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \
defined(CONFIG_ARCH_FAMILY_IMXRT106x))
static const uint8_t g_gpio2_padmux[IMXRT_GPIO_NPINS] =
{
IMXRT_PADMUX_GPIO_B0_00_INDEX, /* GPIO2 Pin 0 */
@ -185,7 +186,8 @@ static const uint8_t g_gpio2_padmux[IMXRT_GPIO_NPINS] =
# error "Unrecognised IMXRT family member"
#endif
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x))
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \
defined(CONFIG_ARCH_FAMILY_IMXRT106x))
static const uint8_t g_gpio3_padmux[IMXRT_GPIO_NPINS] =
{
IMXRT_PADMUX_GPIO_SD_B1_00_INDEX, /* GPIO3 Pin 0 */
@ -265,7 +267,8 @@ static const uint8_t g_gpio3_padmux[IMXRT_GPIO_NPINS] =
};
#endif
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x))
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \
defined(CONFIG_ARCH_FAMILY_IMXRT106x))
static const uint8_t g_gpio4_padmux[IMXRT_GPIO_NPINS] =
{
IMXRT_PADMUX_GPIO_EMC_00_INDEX, /* GPIO4 Pin 0 */
@ -350,7 +353,8 @@ static FAR const uint8_t *g_gpio_padmux[IMXRT_GPIO_NPORTS + 1] =
g_gpio1_padmux, /* GPIO1 */
g_gpio2_padmux, /* GPIO2 */
g_gpio3_padmux, /* GPIO3 */
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x))
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \
defined(CONFIG_ARCH_FAMILY_IMXRT106x))
g_gpio4_padmux, /* GPIO4 */
#else
NULL, /* GPIO4 doesn't exist on 102x */
@ -365,9 +369,9 @@ static FAR const uint8_t *g_gpio_padmux[IMXRT_GPIO_NPORTS + 1] =
NULL /* End of list */
};
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
/* Look-up table that maps GPIO1..GPIOn indexes into GPIO register base addresses */
@ -381,7 +385,8 @@ uintptr_t g_gpio_base[IMXRT_GPIO_NPORTS] =
, IMXRT_GPIO3_BASE
#endif
#if IMXRT_GPIO_NPORTS > 3
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x))
#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \
defined(CONFIG_ARCH_FAMILY_IMXRT106x))
, IMXRT_GPIO4_BASE
#else
, 0
@ -419,6 +424,7 @@ static uintptr_t imxrt_padmux_address(unsigned int index)
{
return (IMXRT_PAD1MUX_OFFSET(index - IMXRT_PADMUX_GPIO_SPI_B0_00_INDEX));
}
#endif
if (index >= IMXRT_PADMUX_WAKEUP_INDEX)
{
@ -439,6 +445,7 @@ static uintptr_t imxrt_padctl_address(unsigned int index)
{
return (IMXRT_PAD1CTL_OFFSET(index - IMXRT_PADCTL_GPIO_SPI_B0_00_INDEX));
}
#endif
if (index >= IMXRT_PADCTL_WAKEUP_INDEX)
{
@ -492,6 +499,19 @@ static void imxrt_gpio_setoutput(int port, int pin, bool value)
putreg32(regval, regaddr);
}
/****************************************************************************
* Name: imxrt_gpio_getpin_status
****************************************************************************/
static inline bool imxrt_gpio_get_pinstatus(int port, int pin)
{
uintptr_t regaddr = IMXRT_GPIO_PSR(port);
uint32_t regval;
regval = getreg32(regaddr);
return ((regval & GPIO_PIN(pin)) != 0);
}
/****************************************************************************
* Name: imxrt_gpio_getinput
****************************************************************************/
@ -546,6 +566,7 @@ static inline int imxrt_gpio_select(int port, int pin)
regaddr |= gpr * sizeof(uint32_t);
modifyreg32(regaddr, clearbits, setbits);
}
#endif
return OK;
}
@ -562,6 +583,7 @@ static int imxrt_gpio_configinput(gpio_pinset_t pinset)
iomux_pinset_t ioset;
uintptr_t regaddr;
unsigned int index;
uint32_t sion = 0;
DEBUGASSERT((unsigned int)port < IMXRT_GPIO_NPORTS);
@ -582,8 +604,15 @@ static int imxrt_gpio_configinput(gpio_pinset_t pinset)
{
return -EINVAL;
}
regaddr = imxrt_padmux_address(index);
putreg32(PADMUX_MUXMODE_ALT5, regaddr);
if ((pinset & GPIO_OUTPUT) == GPIO_OUTPUT)
{
sion |= (pinset & GPIO_SION_MASK) ? PADMUX_SION : 0;
}
putreg32(PADMUX_MUXMODE_ALT5 | sion, regaddr);
imxrt_gpio_select(port, pin);
@ -742,13 +771,13 @@ int imxrt_config_gpio(gpio_pinset_t pinset)
return ret;
}
/************************************************************************************
/****************************************************************************
* Name: imxrt_gpio_write
*
* Description:
* Write one or zero to the selected GPIO pin
*
************************************************************************************/
****************************************************************************/
void imxrt_gpio_write(gpio_pinset_t pinset, bool value)
{
@ -763,13 +792,13 @@ void imxrt_gpio_write(gpio_pinset_t pinset, bool value)
leave_critical_section(flags);
}
/************************************************************************************
/****************************************************************************
* Name: imxrt_gpio_read
*
* Description:
* Read one or zero from the selected GPIO pin
*
************************************************************************************/
****************************************************************************/
bool imxrt_gpio_read(gpio_pinset_t pinset)
{
@ -781,7 +810,16 @@ bool imxrt_gpio_read(gpio_pinset_t pinset)
DEBUGASSERT((unsigned int)port < IMXRT_GPIO_NPORTS);
flags = enter_critical_section();
value = imxrt_gpio_getinput(port, pin);
leave_critical_section(flags);
if ((pinset & (GPIO_OUTPUT | GPIO_SION_ENABLE)) ==
(GPIO_OUTPUT | GPIO_SION_ENABLE))
{
value = imxrt_gpio_get_pinstatus(port, pin);
}
else
{
value = imxrt_gpio_getinput(port, pin);
}
leave_critical_section(flags);
return value;
}