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kinetis:Added HW flow control and termios

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This commit is contained in:
David Sidrane 2017-05-05 07:33:15 -06:00 committed by Gregory Nutt
parent b6a8db1b39
commit f29981e473
5 changed files with 948 additions and 34 deletions
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57
arch/arm/src/kinetis/Kconfig
View File

@ -239,6 +239,10 @@ config KINETIS_HAVE_LPUART1
# will automatically be selected and will represent the 'OR' of the
# instances selected.
config KINETIS_SERIALDRIVER
bool
default n
config KINETIS_LPUART
bool
default n
@ -330,6 +334,8 @@ config KINETIS_UART0
default n
select UART0_SERIALDRIVER
select KINETIS_UART
select KINETIS_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Support UART0
@ -338,6 +344,8 @@ config KINETIS_UART1
default n
select UART1_SERIALDRIVER
select KINETIS_UART
select KINETIS_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Support UART1
@ -346,6 +354,8 @@ config KINETIS_UART2
default n
select UART2_SERIALDRIVER
select KINETIS_UART
select KINETIS_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Support UART2
@ -354,6 +364,8 @@ config KINETIS_UART3
default n
select UART3_SERIALDRIVER
select KINETIS_UART
select KINETIS_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Support UART3
@ -362,6 +374,8 @@ config KINETIS_UART4
default n
select UART4_SERIALDRIVER
select KINETIS_UART
select KINETIS_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Support UART4
@ -371,6 +385,8 @@ config KINETIS_UART5
depends on KINETIS_HAVE_UART5
select UART5_SERIALDRIVER
select KINETIS_UART
select KINETIS_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Support UART5
@ -380,6 +396,8 @@ config KINETIS_LPUART0
depends on KINETIS_HAVE_LPUART0
select OTHER_UART_SERIALDRIVER
select KINETIS_LPUART
select KINETIS_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Support the low power UART0
@ -389,6 +407,8 @@ config KINETIS_LPUART1
depends on KINETIS_HAVE_LPUART1
select OTHER_UART_SERIALDRIVER
select KINETIS_LPUART
select KINETIS_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Support the low power UART1
@ -933,6 +953,43 @@ endmenu # Kinetis SDHC Configuration
#
menu "Kinetis UART Configuration"
if KINETIS_SERIALDRIVER || OTHER_SERIALDRIVER
comment "Serial Driver Configuration"
config KINETIS_UART_BREAKS
bool "Add TIOxSBRK to support sending Breaks"
depends on KINETIS_UART || KINETIS_LPUART
default n
---help---
Add TIOCxBRK routines to send a line break per the Kinetis manual, the
break will be a pulse based on the value M. This is not a BSD compatible
break.
config KINETIS_UART_EXTEDED_BREAK
bool "Selects a longer transmitted break character length"
depends on KINETIS_UART_BREAKS
default n
---help---
Sets BRK13 to send a longer transmitted break character.
config KINETIS_SERIALBRK_BSDCOMPAT
bool "BSD compatible break the break asserted until released"
depends on (KINETIS_UART || KINETIS_LPUART) && KINETIS_UART_BREAKS
default n
---help---
Enable using a BSD compatible break: TIOCSBRK will start the break
and TIOCCBRK will end the break.
config KINETIS_UART_SINGLEWIRE
bool "Single Wire Support"
default n
depends on KINETIS_UART || KINETIS_LPUART
---help---
Enable single wire UART and LPUART support. The option enables support
for the TIOCSSINGLEWIRE ioctl in the Kineteis serial drivers.
endif # KINETIS_SERIALDRIVER || OTHER_SERIALDRIVER
config KINETIS_UARTFIFOS
bool "Enable UART0 FIFO"

6
arch/arm/src/kinetis/kinetis.h
View File

@ -468,7 +468,8 @@ void kinetis_lpuartreset(uintptr_t uart_base);
#ifdef HAVE_UART_DEVICE
void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock,
unsigned int parity, unsigned int nbits,
unsigned int stop2);
unsigned int stop2,
bool iflow, bool oflow);
#endif
/****************************************************************************
@ -482,7 +483,8 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock,
#ifdef HAVE_LPUART_DEVICE
void kinetis_lpuartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock,
unsigned int parity, unsigned int nbits,
unsigned int stop2);
unsigned int stop2,
bool iflow, bool oflow);
#endif
/************************************************************************************

169
arch/arm/src/kinetis/kinetis_lowputc.c
View File

@ -41,6 +41,7 @@
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <arch/irq.h>
#include <arch/board/board.h>
@ -59,6 +60,58 @@
* Pre-processor Definitions
****************************************************************************/
/* Default hardware flow control */
#if !defined(CONFIG_UART0_IFLOWCONTROL)
# define CONFIG_UART0_IFLOWCONTROL 0
#endif
#if !defined(CONFIG_UART0_OFLOWCONTROL)
# define CONFIG_UART0_OFLOWCONTROL 0
#endif
#if !defined(CONFIG_UART1_IFLOWCONTROL)
# define CONFIG_UART1_IFLOWCONTROL 0
#endif
#if !defined(CONFIG_UART1_OFLOWCONTROL)
# define CONFIG_UART1_OFLOWCONTROL 0
#endif
#if !defined(CONFIG_UART2_IFLOWCONTROL)
# define CONFIG_UART2_IFLOWCONTROL 0
#endif
#if !defined(CONFIG_UART2_OFLOWCONTROL)
# define CONFIG_UART2_OFLOWCONTROL 0
#endif
#if !defined(CONFIG_UART3_IFLOWCONTROL)
# define CONFIG_UART3_IFLOWCONTROL 0
#endif
#if !defined(CONFIG_UART3_OFLOWCONTROL)
# define CONFIG_UART3_OFLOWCONTROL 0
#endif
#if !defined(CONFIG_UART4_IFLOWCONTROL)
# define CONFIG_UART4_IFLOWCONTROL 0
#endif
#if !defined(CONFIG_UART4_OFLOWCONTROL)
# define CONFIG_UART4_OFLOWCONTROL 0
#endif
#if !defined(CONFIG_UART5_IFLOWCONTROL)
# define CONFIG_UART5_IFLOWCONTROL 0
#endif
#if !defined(CONFIG_UART5_OFLOWCONTROL)
# define CONFIG_UART5_OFLOWCONTROL 0
#endif
#if !defined(CONFIG_LPUART0_IFLOWCONTROL)
# define CONFIG_LPUART0_IFLOWCONTROL 0
#endif
#if !defined(CONFIG_LPUART0_OFLOWCONTROL)
# define CONFIG_LPUART0_OFLOWCONTROL 0
#endif
#if !defined(CONFIG_LPUART1_IFLOWCONTROL)
# define CONFIG_LPUART1_IFLOWCONTROL 0
#endif
#if !defined(CONFIG_LPUART1_OFLOWCONTROL)
# define CONFIG_LPUART1_OFLOWCONTROL 0
#endif
/* Select UART parameters for the selected console */
#if defined(HAVE_UART_CONSOLE)
@ -69,6 +122,8 @@
# define CONSOLE_BITS CONFIG_UART0_BITS
# define CONSOLE_2STOP CONFIG_UART0_2STOP
# define CONSOLE_PARITY CONFIG_UART0_PARITY
# define CONSOLE_IFLOW CONFIG_UART0_IFLOWCONTROL
# define CONSOLE_OFLOW CONFIG_UART0_OFLOWCONTROL
# elif defined(CONFIG_UART1_SERIAL_CONSOLE)
# define CONSOLE_BASE KINETIS_UART1_BASE
# define CONSOLE_FREQ BOARD_CORECLK_FREQ
@ -76,6 +131,8 @@
# define CONSOLE_BITS CONFIG_UART1_BITS
# define CONSOLE_2STOP CONFIG_UART1_2STOP
# define CONSOLE_PARITY CONFIG_UART1_PARITY
# define CONSOLE_IFLOW CONFIG_UART1_IFLOWCONTROL
# define CONSOLE_OFLOW CONFIG_UART1_OFLOWCONTROL
# elif defined(CONFIG_UART2_SERIAL_CONSOLE)
# define CONSOLE_BASE KINETIS_UART2_BASE
# define CONSOLE_FREQ BOARD_BUS_FREQ
@ -83,6 +140,8 @@
# define CONSOLE_BITS CONFIG_UART2_BITS
# define CONSOLE_2STOP CONFIG_UART2_2STOP
# define CONSOLE_PARITY CONFIG_UART2_PARITY
# define CONSOLE_IFLOW CONFIG_UART2_IFLOWCONTROL
# define CONSOLE_OFLOW CONFIG_UART2_OFLOWCONTROL
# elif defined(CONFIG_UART3_SERIAL_CONSOLE)
# define CONSOLE_BASE KINETIS_UART3_BASE
# define CONSOLE_FREQ BOARD_BUS_FREQ
@ -90,6 +149,8 @@
# define CONSOLE_BITS CONFIG_UART3_BITS
# define CONSOLE_2STOP CONFIG_UART3_2STOP
# define CONSOLE_PARITY CONFIG_UART3_PARITY
# define CONSOLE_IFLOW CONFIG_UART3_IFLOWCONTROL
# define CONSOLE_OFLOW CONFIG_UART3_OFLOWCONTROL
# elif defined(CONFIG_UART4_SERIAL_CONSOLE)
# define CONSOLE_BASE KINETIS_UART4_BASE
# define CONSOLE_FREQ BOARD_BUS_FREQ
@ -97,6 +158,8 @@
# define CONSOLE_BITS CONFIG_UART4_BITS
# define CONSOLE_2STOP CONFIG_UART4_2STOP
# define CONSOLE_PARITY CONFIG_UART4_PARITY
# define CONSOLE_IFLOW CONFIG_UART4_IFLOWCONTROL
# define CONSOLE_OFLOW CONFIG_UART4_OFLOWCONTROL
# elif defined(CONFIG_UART5_SERIAL_CONSOLE)
# define CONSOLE_BASE KINETIS_UART5_BASE
# define CONSOLE_FREQ BOARD_BUS_FREQ
@ -104,6 +167,8 @@
# define CONSOLE_BITS CONFIG_UART5_BITS
# define CONSOLE_2STOP CONFIG_UART5_2STOP
# define CONSOLE_PARITY CONFIG_UART5_PARITY
# define CONSOLE_IFLOW CONFIG_UART5_IFLOWCONTROL
# define CONSOLE_OFLOW CONFIG_UART5_OFLOWCONTROL
# elif defined(HAVE_UART_CONSOLE)
# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
# endif
@ -115,6 +180,8 @@
# define CONSOLE_PARITY CONFIG_LPUART0_PARITY
# define CONSOLE_BITS CONFIG_LPUART0_BITS
# define CONSOLE_2STOP CONFIG_LPUART0_2STOP
# define CONSOLE_IFLOW CONFIG_LPUART0_IFLOWCONTROL
# define CONSOLE_OFLOW CONFIG_LPUART0_OFLOWCONTROL
# elif defined(CONFIG_LPUART1_SERIAL_CONSOLE)
# define CONSOLE_BASE KINETIS_LPUART1_BASE
# define CONSOLE_FREQ BOARD_LPUART1_FREQ
@ -122,6 +189,8 @@
# define CONSOLE_PARITY CONFIG_LPUART1_PARITY
# define CONSOLE_BITS CONFIG_LPUART1_BITS
# define CONSOLE_2STOP CONFIG_LPUART1_2STOP
# define CONSOLE_IFLOW CONFIG_LPUART1_IFLOWCONTROL
# define CONSOLE_OFLOW CONFIG_LPUART1_OFLOWCONTROL
# else
# error "No LPUART console is selected"
# endif
@ -271,26 +340,62 @@ void kinetis_lowsetup(void)
# ifdef CONFIG_KINETIS_UART0
kinetis_pinconfig(PIN_UART0_TX);
kinetis_pinconfig(PIN_UART0_RX);
# if CONFIG_UART0_IFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART0_RTS);
# endif
# if CONFIG_UART0_OFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART0_CTS);
# endif
# endif
# ifdef CONFIG_KINETIS_UART1
kinetis_pinconfig(PIN_UART1_TX);
kinetis_pinconfig(PIN_UART1_RX);
# if CONFIG_UART1_IFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART1_RTS);
# endif
# if CONFIG_UART1_OFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART1_CTS);
# endif
# endif
# ifdef CONFIG_KINETIS_UART2
kinetis_pinconfig(PIN_UART2_TX);
kinetis_pinconfig(PIN_UART2_RX);
# if CONFIG_UART2_IFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART2_RTS);
# endif
# if CONFIG_UART2_OFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART2_CTS);
# endif
# endif
# ifdef CONFIG_KINETIS_UART3
kinetis_pinconfig(PIN_UART3_TX);
kinetis_pinconfig(PIN_UART3_RX);
# if CONFIG_UART3_IFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART3_RTS);
# endif
# if CONFIG_UART3_OFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART3_CTS);
# endif
# endif
# ifdef CONFIG_KINETIS_UART4
kinetis_pinconfig(PIN_UART4_TX);
kinetis_pinconfig(PIN_UART4_RX);
# if CONFIG_UART4_IFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART4_RTS);
# endif
# if CONFIG_UART4_OFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART4_CTS);
# endif
# endif
# ifdef CONFIG_KINETIS_UART5
kinetis_pinconfig(PIN_UART5_TX);
kinetis_pinconfig(PIN_UART5_RX);
# if CONFIG_UART5_IFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART5_RTS);
# endif
# if CONFIG_UART5_OFLOWCONTROL == 1
kinetis_pinconfig(PIN_UART5_CTS);
# endif
# endif
/* Configure the console (only) now. Other UARTs will be configured
@ -300,7 +405,8 @@ void kinetis_lowsetup(void)
# if defined(HAVE_UART_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
kinetis_uartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_FREQ, \
CONSOLE_PARITY, CONSOLE_BITS, CONSOLE_2STOP);
CONSOLE_PARITY, CONSOLE_BITS, CONSOLE_2STOP, \
CONSOLE_IFLOW, CONSOLE_OFLOW);
# endif
#endif /* HAVE_UART_DEVICE */
@ -327,17 +433,30 @@ void kinetis_lowsetup(void)
# ifdef CONFIG_KINETIS_LPUART0
kinetis_pinconfig(PIN_LPUART0_TX);
kinetis_pinconfig(PIN_LPUART0_RX);
# if CONFIG_LPUART0_IFLOWCONTROL == 1
kinetis_pinconfig(PIN_LPUART0_RTS);
# endif
# if CONFIG_LPUART0_OFLOWCONTROL == 1
kinetis_pinconfig(PIN_LOUART0_CTS);
# endif
# endif
# ifdef CONFIG_KINETIS_LPUART1
kinetis_pinconfig(PIN_LPUART1_TX);
kinetis_pinconfig(PIN_LPUART1_RX);
# if CONFIG_LPUART1_IFLOWCONTROL == 1
kinetis_pinconfig(PIN_LPUART1_RTS);
# endif
# if CONFIG_LPUART1_OFLOWCONTROL == 1
kinetis_pinconfig(PIN_LOUART1_CTS);
# endif
# endif
# if defined(HAVE_LPUART_CONSOLE) && !defined(CONFIG_SUPPRESS_LPUART_CONFIG)
kinetis_lpuartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_FREQ, \
CONSOLE_PARITY, CONSOLE_BITS, CONSOLE_2STOP);
CONSOLE_PARITY, CONSOLE_BITS, CONSOLE_2STOP, \
CONSOLE_IFLOW, CONSOLE_OFLOW);
# endif
#endif /* HAVE_LPUART_DEVICE */
}
@ -395,7 +514,8 @@ void kinetis_lpuartreset(uintptr_t uart_base)
#ifdef HAVE_UART_DEVICE
void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
uint32_t clock, unsigned int parity,
unsigned int nbits, unsigned int stop2)
unsigned int nbits, unsigned int stop2,
bool iflow, bool oflow)
{
uint32_t sbr;
uint32_t brfa;
@ -542,6 +662,27 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
putreg8(0, uart_base+KINETIS_UART_PFIFO_OFFSET);
#endif
/* Hardware flow control */
regval = getreg8(uart_base+KINETIS_UART_MODEM_OFFSET);
regval &= ~(UART_MODEM_TXCTSE | UART_MODEM_RXRTSE);
#ifdef CONFIG_SERIAL_IFLOWCONTROL
if (iflow)
{
regval |= UART_MODEM_RXRTSE;
}
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
if (oflow)
{
regval |= UART_MODEM_TXCTSE;
}
#endif
putreg8(regval, uart_base+KINETIS_UART_MODEM_OFFSET);
/* Now we can (re-)enable the transmitter and receiver */
regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
@ -561,7 +702,8 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
#ifdef HAVE_LPUART_DEVICE
void kinetis_lpuartconfigure(uintptr_t uart_base, uint32_t baud,
uint32_t clock, unsigned int parity,
unsigned int nbits, unsigned int stop2)
unsigned int nbits, unsigned int stop2,
bool iflow, bool oflow)
{
uint32_t sbrreg;
uint32_t osrreg;
@ -711,6 +853,25 @@ void kinetis_lpuartconfigure(uintptr_t uart_base, uint32_t baud,
DEBUGASSERT(nbits == 8);
}
/* Hardware flow control */
regval = getreg32(uart_base+KINETIS_LPUART_MODIR_OFFSET);
regval &= ~(UART_MODEM_TXCTSE | UART_MODEM_RXRTSE);
#ifdef CONFIG_SERIAL_IFLOWCONTROL
if (iflow)
{
regval |= LPUART_MODIR_RXRTSE;
}
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
if (oflow)
{
regval |= LPUART_MODIR_TXCTSE;
}
#endif
putreg32(regval, uart_base+KINETIS_LPUART_MODIR_OFFSET);
/* Now we can (re-)enable the transmitter and receiver */
regval |= (LPUART_CTRL_RE | LPUART_CTRL_TE);

360
arch/arm/src/kinetis/kinetis_lpserial.c
View File

@ -53,6 +53,11 @@
#include <nuttx/arch.h>
#include <nuttx/serial/serial.h>
#ifdef CONFIG_SERIAL_TERMIOS
# include <termios.h>
#endif
#include <arch/serial.h>
#include <arch/board/board.h>
#include "up_arch.h"
@ -61,6 +66,7 @@
#include "kinetis_config.h"
#include "chip.h"
#include "chip/kinetis_lpuart.h"
#include "chip/kinetis_pinmux.h"
#include "kinetis.h"
/****************************************************************************
@ -153,6 +159,18 @@ struct kinetis_dev_s
uint8_t parity; /* 0=none, 1=odd, 2=even */
uint8_t bits; /* Number of bits (8 or 9) */
uint8_t stop2; /* Use 2 stop bits */
#ifdef CONFIG_SERIAL_IFLOWCONTROL
bool iflow; /* input flow control (RTS) enabled */
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
bool oflow; /* output flow control (CTS) enabled */
#endif
#ifdef CONFIG_SERIAL_IFLOWCONTROL
uint32_t rts_gpio; /* UART RTS GPIO pin configuration */
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
uint32_t cts_gpio; /* UART CTS GPIO pin configuration */
#endif
};
/****************************************************************************
@ -168,6 +186,10 @@ static int kinetis_ioctl(struct file *filep, int cmd, unsigned long arg);
static int kinetis_receive(struct uart_dev_s *dev, uint32_t *status);
static void kinetis_rxint(struct uart_dev_s *dev, bool enable);
static bool kinetis_rxavailable(struct uart_dev_s *dev);
#ifdef CONFIG_SERIAL_IFLOWCONTROL
static bool kinetis_rxflowcontrol(struct uart_dev_s *dev, unsigned int nbuffered,
bool upper);
#endif
static void kinetis_send(struct uart_dev_s *dev, int ch);
static void kinetis_txint(struct uart_dev_s *dev, bool enable);
static bool kinetis_txready(struct uart_dev_s *dev);
@ -187,7 +209,7 @@ static const struct uart_ops_s g_lpuart_ops =
.rxint = kinetis_rxint,
.rxavailable = kinetis_rxavailable,
#ifdef CONFIG_SERIAL_IFLOWCONTROL
.rxflowcontrol = NULL,
.rxflowcontrol = kinetis_rxflowcontrol,
#endif
.send = kinetis_send,
.txint = kinetis_txint,
@ -219,6 +241,14 @@ static struct kinetis_dev_s g_lpuart0priv =
.parity = CONFIG_LPUART0_PARITY,
.bits = CONFIG_LPUART0_BITS,
.stop2 = CONFIG_LPUART0_2STOP,
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_LPUART0_OFLOWCONTROL)
.oflow = true,
.cts_gpio = PIN_LPUART0_CTS,
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART0_IFLOWCONTROL)
.iflow = true,
.rts_gpio = PIN_LPUART0_RTS,
#endif
};
static uart_dev_t g_lpuart0port =
@ -251,6 +281,14 @@ static struct kinetis_dev_s g_lpuart1priv =
.parity = CONFIG_LPUART1_PARITY,
.bits = CONFIG_LPUART1_BITS,
.stop2 = CONFIG_LPUART1_2STOP,
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_LPUART1_OFLOWCONTROL)
.oflow = true,
.cts_gpio = PIN_LPUART1_CTS,
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART1_IFLOWCONTROL)
.iflow = true,
.rts_gpio = PIN_LPUART1_RTS,
#endif
};
static uart_dev_t g_lpuart1port =
@ -360,11 +398,22 @@ static int kinetis_setup(struct uart_dev_s *dev)
{
#ifndef CONFIG_SUPPRESS_LPUART_CONFIG
struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
#ifdef CONFIG_SERIAL_IFLOWCONTROL
bool iflow = priv->iflow;
#else
bool iflow = false;
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
bool oflow = priv->oflow;
#else
bool oflow = false;
#endif
/* Configure the LPUART as an RS-232 UART */
kinetis_lpuartconfigure(priv->uartbase, priv->baud, priv->clock,
priv->parity, priv->bits, priv->stop2);
priv->parity, priv->bits, priv->stop2,
iflow, oflow);
#endif
/* Make sure that all interrupts are disabled */
@ -564,23 +613,234 @@ static int kinetis_interrupt(int irq, void *context, void *arg)
static int kinetis_ioctl(struct file *filep, int cmd, unsigned long arg)
{
#if 0 /* Reserved for future growth */
struct inode *inode;
struct uart_dev_s *dev;
struct kinetis_dev_s *priv;
int ret = OK;
#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) || \
defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT)
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
uint8_t regval;
#endif
#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT)
struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
bool iflow = false;
bool oflow = false;
#endif
int ret = OK;
DEBUGASSERT(filep, filep->f_inode);
#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) || \
defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT)
DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
inode = filep->f_inode;
dev = inode->i_private;
DEBUGASSERT(dev, dev->priv);
priv = (struct kinetis_dev_s *)dev->priv;
DEBUGASSERT(dev != NULL && dev->priv != NULL);
#endif
switch (cmd)
{
case xxx: /* Add commands here */
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
case TIOCSERGSTRUCT:
{
struct kinetis_dev_s *user = (struct kinetis_dev_s *)arg;
if (!user)
{
ret = -EINVAL;
}
else
{
memcpy(user, dev, sizeof(struct kinetis_dev_s));
}
}
break;
#endif
#ifdef CONFIG_KINETIS_UART_SINGLEWIRE
case TIOCSSINGLEWIRE:
{
/* Change to single-wire operation. the RXD pin is disconnected from
* the UART and the UART implements a half-duplex serial connection.
* The UART uses the TXD pin for both receiving and transmitting
*/
regval = kinetis_serialin(priv, KINETIS_LPUART_CTRL_OFFSET);
if (arg == SER_SINGLEWIRE_ENABLED)
{
regval |= (LPUART_CTRL_LOOPS | LPUART_CTRL_RSRC);
}
else
{
regval &= ~(LPUART_CTRL_LOOPS | LPUART_CTRL_RSRC);
}
kinetis_serialout(priv, KINETIS_LPUART_CTRL_OFFSET, regval);
}
break;
#endif
#ifdef CONFIG_SERIAL_TERMIOS
case TCGETS:
{
struct termios *termiosp = (struct termios *)arg;
if (!termiosp)
{
ret = -EINVAL;
break;
}
cfsetispeed(termiosp, priv->baud);
/* Note: CSIZE only supports 5-8 bits. The driver only support 8/9 bit
* modes and therefore is no way to report 9-bit mode, we always claim
* 8 bit mode.
*/
termiosp->c_cflag =
((priv->parity != 0) ? PARENB : 0) |
((priv->parity == 1) ? PARODD : 0) |
((priv->stop2) ? CSTOPB : 0) |
# ifdef CONFIG_SERIAL_OFLOWCONTROL
((priv->oflow) ? CCTS_OFLOW : 0) |
# endif
# ifdef CONFIG_SERIAL_IFLOWCONTROL
((priv->iflow) ? CRTS_IFLOW : 0) |
# endif
CS8;
/* TODO: CCTS_IFLOW, CCTS_OFLOW */
}
break;
case TCSETS:
{
struct termios *termiosp = (struct termios *)arg;
if (!termiosp)
{
ret = -EINVAL;
break;
}
/* Perform some sanity checks before accepting any changes */
if (((termiosp->c_cflag & CSIZE) != CS8)
# ifdef CONFIG_SERIAL_IFLOWCONTROL
|| ((termiosp->c_cflag & CCTS_OFLOW) && (priv->cts_gpio == 0))
# endif
# ifdef CONFIG_SERIAL_IFLOWCONTROL
|| ((termiosp->c_cflag & CRTS_IFLOW) && (priv->rts_gpio == 0))
# endif
)
{
ret = -EINVAL;
break;
}
if (termiosp->c_cflag & PARENB)
{
priv->parity = (termiosp->c_cflag & PARODD) ? 1 : 2;
}
else
{
priv->parity = 0;
}
priv->stop2 = (termiosp->c_cflag & CSTOPB) != 0;
# ifdef CONFIG_SERIAL_OFLOWCONTROL
priv->oflow = (termiosp->c_cflag & CCTS_OFLOW) != 0;
oflow = priv->oflow;
# endif
# ifdef CONFIG_SERIAL_IFLOWCONTROL
priv->iflow = (termiosp->c_cflag & CRTS_IFLOW) != 0;
iflow = priv->iflow;
# endif
/* Note that since there is no way to request 9-bit mode
* and no way to support 5/6/7-bit modes, we ignore them
* all here.
*/
/* Note that only cfgetispeed is used because we have knowledge
* that only one speed is supported.
*/
priv->baud = cfgetispeed(termiosp);
/* Effect the changes immediately - note that we do not implement
* TCSADRAIN / TCSAFLUSH
*/
kinetis_uartconfigure(priv->uartbase, priv->baud, priv->clock,
priv->parity, priv->bits, priv->stop2,
iflow, oflow);
}
break;
#endif /* CONFIG_SERIAL_TERMIOS */
#ifdef CONFIG_KINETIS_UART_BREAKS
case TIOCSBRK:
{
irqstate_t flags;
flags = enter_critical_section();
/* Send a longer break signal */
regval = kinetis_serialin(priv, KINETIS_LPUART_STAT_OFFSET);
regval &= ~LPUART_STAT_BRK13;
# ifdef CONFIG_KINETIS_UART_EXTEDED_BREAK
regval |= LPUART_STAT_BRK13;
# endif
kinetis_serialout(priv, LPUART_STAT_BRK13, regval);
/* Send a break signal */
regval = kinetis_serialin(priv, KINETIS_LPUART_CTRL_OFFSET);
regval |= LPUART_CTRL_SBK;
kinetis_serialout(priv, KINETIS_LPUART_CTRL_OFFSET, regval);
# ifdef CONFIG_KINETIS_SERIALBRK_BSDCOMPAT
/* BSD compatibility: Turn break on, and leave it on */
kinetis_txint(dev, false);
# else
/* Send a single break character
* Toggling SBK sends one break character. Per the manual
* Toggling implies clearing the SBK field before the break
* character has finished transmitting.
*/
regval &= ~LPUART_CTRL_SBK;
kinetis_serialout(priv, KINETIS_LPUART_CTRL_OFFSET, regval);
#endif
leave_critical_section(flags);
}
break;
case TIOCCBRK:
{
irqstate_t flags;
flags = enter_critical_section();
/* Configure TX back to UART
* If non BSD compatible: This code has no effect, the SBRK
* was already cleared.
* but for BSD compatibility: Turn break off
*/
regval = kinetis_serialin(priv, KINETIS_LPUART_CTRL_OFFSET);
regval &= ~LPUART_CTRL_SBK;
kinetis_serialout(priv, KINETIS_LPUART_CTRL_OFFSET, regval);
# ifdef CONFIG_KINETIS_SERIALBRK_BSDCOMPAT
/* Enable further tx activity */
kinetis_txint(dev, true);
# endif
leave_critical_section(flags);
}
break;
#endif /* CONFIG_KINETIS_UART_BREAKS */
default:
ret = -ENOTTY;
@ -588,9 +848,6 @@ static int kinetis_ioctl(struct file *filep, int cmd, unsigned long arg)
}
return ret;
#else
return -ENOTTY;
#endif
}
/****************************************************************************
@ -696,6 +953,79 @@ static bool kinetis_rxavailable(struct uart_dev_s *dev)
return (kinetis_serialin(priv, KINETIS_LPUART_STAT_OFFSET) & LPUART_STAT_RDRF) != 0;
}
/****************************************************************************
* Name: kinetis_rxflowcontrol
*
* Description:
* Called when Rx buffer is full (or exceeds configured watermark levels
* if CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is defined).
* Return true if UART activated RX flow control to block more incoming
* data
*
* Input parameters:
* dev - UART device instance
* nbuffered - the number of characters currently buffered
* (if CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is
* not defined the value will be 0 for an empty buffer or the
* defined buffer size for a full buffer)
* upper - true indicates the upper watermark was crossed where
* false indicates the lower watermark has been crossed
*
* Returned Value:
* true if RX flow control activated.
*
****************************************************************************/
#ifdef CONFIG_SERIAL_IFLOWCONTROL
static bool kinetis_rxflowcontrol(struct uart_dev_s *dev,
unsigned int nbuffered, bool upper)
{
#if defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS)
struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv;
uint16_t ie;
if (priv->iflow)
{
/* Is the RX buffer full? */
if (upper)
{
/* Disable Rx interrupt to prevent more data being from
* peripheral. When hardware RTS is enabled, this will
* prevent more data from coming in.
*
* This function is only called when UART recv buffer is full,
* that is: "dev->recv.head + 1 == dev->recv.tail".
*
* Logic in "uart_read" will automatically toggle Rx interrupts
* when buffer is read empty and thus we do not have to re-
* enable Rx interrupts.
*/
ie = priv->ie;
ie &= ~LPUART_CTRL_RX_INTS;
kinetis_restoreuartint(priv, ie);
return true;
}
/* No.. The RX buffer is empty */
else
{
/* We might leave Rx interrupt disabled if full recv buffer was
* read empty. Enable Rx interrupt to make sure that more input is
* received.
*/
kinetis_rxint(dev, true);
}
}
#endif
return false;
}
#endif
/****************************************************************************
* Name: kinetis_send
*

390
arch/arm/src/kinetis/kinetis_serial.c
View File

@ -53,6 +53,11 @@
#include <nuttx/arch.h>
#include <nuttx/serial/serial.h>
#ifdef CONFIG_SERIAL_TERMIOS
# include <termios.h>
#endif
#include <arch/serial.h>
#include <arch/board/board.h>
#include "up_arch.h"
@ -61,6 +66,7 @@
#include "kinetis_config.h"
#include "chip.h"
#include "chip/kinetis_uart.h"
#include "chip/kinetis_pinmux.h"
#include "kinetis.h"
/****************************************************************************
@ -242,6 +248,18 @@ struct up_dev_s
uint8_t parity; /* 0=none, 1=odd, 2=even */
uint8_t bits; /* Number of bits (8 or 9) */
uint8_t stop2; /* Use 2 stop bits */
#ifdef CONFIG_SERIAL_IFLOWCONTROL
bool iflow; /* input flow control (RTS) enabled */
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
bool oflow; /* output flow control (CTS) enabled */
#endif
#ifdef CONFIG_SERIAL_IFLOWCONTROL
uint32_t rts_gpio; /* UART RTS GPIO pin configuration */
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
uint32_t cts_gpio; /* UART CTS GPIO pin configuration */
#endif
};
/****************************************************************************
@ -260,6 +278,10 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
static void up_rxint(struct uart_dev_s *dev, bool enable);
static bool up_rxavailable(struct uart_dev_s *dev);
#ifdef CONFIG_SERIAL_IFLOWCONTROL
static bool up_rxflowcontrol(struct uart_dev_s *dev, unsigned int nbuffered,
bool upper);
#endif
static void up_send(struct uart_dev_s *dev, int ch);
static void up_txint(struct uart_dev_s *dev, bool enable);
static bool up_txready(struct uart_dev_s *dev);
@ -282,7 +304,7 @@ static const struct uart_ops_s g_uart_ops =
.rxint = up_rxint,
.rxavailable = up_rxavailable,
#ifdef CONFIG_SERIAL_IFLOWCONTROL
.rxflowcontrol = NULL,
.rxflowcontrol = up_rxflowcontrol,
#endif
.send = up_send,
.txint = up_txint,
@ -337,6 +359,14 @@ static struct up_dev_s g_uart0priv =
.parity = CONFIG_UART0_PARITY,
.bits = CONFIG_UART0_BITS,
.stop2 = CONFIG_UART0_2STOP,
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART0_OFLOWCONTROL)
.oflow = true,
.cts_gpio = PIN_UART0_CTS,
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART0_IFLOWCONTROL)
.iflow = true,
.rts_gpio = PIN_UART0_RTS,
#endif
};
static uart_dev_t g_uart0port =
@ -372,6 +402,14 @@ static struct up_dev_s g_uart1priv =
.parity = CONFIG_UART1_PARITY,
.bits = CONFIG_UART1_BITS,
.stop2 = CONFIG_UART1_2STOP,
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART1_OFLOWCONTROL)
.oflow = true,
.cts_gpio = PIN_UART1_CTS,
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART1_IFLOWCONTROL)
.iflow = true,
.rts_gpio = PIN_UART1_RTS,
#endif
};
static uart_dev_t g_uart1port =
@ -407,6 +445,14 @@ static struct up_dev_s g_uart2priv =
.parity = CONFIG_UART2_PARITY,
.bits = CONFIG_UART2_BITS,
.stop2 = CONFIG_UART2_2STOP,
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART2_OFLOWCONTROL)
.oflow = true,
.cts_gpio = PIN_UART2_CTS,
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART2_IFLOWCONTROL)
.iflow = true,
.rts_gpio = PIN_UART2_RTS,
#endif
};
static uart_dev_t g_uart2port =
@ -442,6 +488,14 @@ static struct up_dev_s g_uart3priv =
.parity = CONFIG_UART3_PARITY,
.bits = CONFIG_UART3_BITS,
.stop2 = CONFIG_UART3_2STOP,
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART3_OFLOWCONTROL)
.oflow = true,
.cts_gpio = PIN_UART3_CTS,
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART3_IFLOWCONTROL)
.iflow = true,
.rts_gpio = PIN_UART3_RTS,
#endif
};
static uart_dev_t g_uart3port =
@ -477,6 +531,14 @@ static struct up_dev_s g_uart4priv =
.parity = CONFIG_UART4_PARITY,
.bits = CONFIG_UART4_BITS,
.stop2 = CONFIG_UART4_2STOP,
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART4_OFLOWCONTROL)
.oflow = true,
.cts_gpio = PIN_UART4_CTS,
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART4_IFLOWCONTROL)
.iflow = true,
.rts_gpio = PIN_UART4_RTS,
#endif
};
static uart_dev_t g_uart4port =
@ -512,6 +574,14 @@ static struct up_dev_s g_uart5priv =
.parity = CONFIG_UART5_PARITY,
.bits = CONFIG_UART5_BITS,
.stop2 = CONFIG_UART5_2STOP,
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART5_OFLOWCONTROL)
.oflow = true,
.cts_gpio = PIN_UART5_CTS,
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART5_IFLOWCONTROL)
.iflow = true,
.rts_gpio = PIN_UART5_RTS,
#endif
};
static uart_dev_t g_uart5port =
@ -621,11 +691,23 @@ static int up_setup(struct uart_dev_s *dev)
{
#ifndef CONFIG_SUPPRESS_UART_CONFIG
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
#ifdef CONFIG_SERIAL_IFLOWCONTROL
bool iflow = priv->iflow;
#else
bool iflow = false;
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
bool oflow = priv->oflow;
#else
bool oflow = false;
#endif
/* Configure the UART as an RS-232 UART */
kinetis_uartconfigure(priv->uartbase, priv->baud, priv->clock,
priv->parity, priv->bits, priv->stop2);
priv->parity, priv->bits, priv->stop2,
iflow, oflow);
#endif
/* Make sure that all interrupts are disabled */
@ -891,23 +973,235 @@ static int up_interrupts(int irq, void *context, FAR void *arg)
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
#if 0 /* Reserved for future growth */
#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) || \
defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT)
struct inode *inode;
struct uart_dev_s *dev;
struct up_dev_s *priv;
int ret = OK;
uint8_t regval;
#endif
#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
bool iflow = false;
bool oflow = false;
#endif
int ret = OK;
DEBUGASSERT(filep, filep->f_inode);
#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) || \
defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT)
DEBUGASSERT(filep != NULL && filep->f_inode != NULL);
inode = filep->f_inode;
dev = inode->i_private;
DEBUGASSERT(dev, dev->priv);
priv = (struct up_dev_s *)dev->priv;
DEBUGASSERT(dev != NULL && dev->priv != NULL);
#endif
switch (cmd)
{
case xxx: /* Add commands here */
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
case TIOCSERGSTRUCT:
{
struct up_dev_s *user = (struct up_dev_s *)arg;
if (!user)
{
ret = -EINVAL;
}
else
{
memcpy(user, dev, sizeof(struct up_dev_s));
}
}
break;
#endif
#ifdef CONFIG_KINETIS_UART_SINGLEWIRE
case TIOCSSINGLEWIRE:
{
/* Change to single-wire operation. the RXD pin is disconnected from
* the UART and the UART implements a half-duplex serial connection.
* The UART uses the TXD pin for both receiving and transmitting
*/
regval = up_serialin(priv, KINETIS_UART_C1_OFFSET);
if (arg == SER_SINGLEWIRE_ENABLED)
{
regval |= (UART_C1_LOOPS | UART_C1_RSRC);
}
else
{
regval &= ~(UART_C1_LOOPS | UART_C1_RSRC);
}
up_serialout(priv, KINETIS_UART_C1_OFFSET, regval);
}
break;
#endif
#ifdef CONFIG_SERIAL_TERMIOS
case TCGETS:
{
struct termios *termiosp = (struct termios *)arg;
if (!termiosp)
{
ret = -EINVAL;
break;
}
cfsetispeed(termiosp, priv->baud);
/* Note: CSIZE only supports 5-8 bits. The driver only support 8/9 bit
* modes and therefore is no way to report 9-bit mode, we always claim
* 8 bit mode.
*/
termiosp->c_cflag =
((priv->parity != 0) ? PARENB : 0) |
((priv->parity == 1) ? PARODD : 0) |
((priv->stop2) ? CSTOPB : 0) |
# ifdef CONFIG_SERIAL_OFLOWCONTROL
((priv->oflow) ? CCTS_OFLOW : 0) |
# endif
# ifdef CONFIG_SERIAL_IFLOWCONTROL
((priv->iflow) ? CRTS_IFLOW : 0) |
# endif
CS8;
/* TODO: CCTS_IFLOW, CCTS_OFLOW */
}
break;
case TCSETS:
{
struct termios *termiosp = (struct termios *)arg;
if (!termiosp)
{
ret = -EINVAL;
break;
}
/* Perform some sanity checks before accepting any changes */
if (((termiosp->c_cflag & CSIZE) != CS8)
# ifdef CONFIG_SERIAL_IFLOWCONTROL
|| ((termiosp->c_cflag & CCTS_OFLOW) && (priv->cts_gpio == 0))
# endif
# ifdef CONFIG_SERIAL_IFLOWCONTROL
|| ((termiosp->c_cflag & CRTS_IFLOW) && (priv->rts_gpio == 0))
# endif
)
{
ret = -EINVAL;
break;
}
if (termiosp->c_cflag & PARENB)
{
priv->parity = (termiosp->c_cflag & PARODD) ? 1 : 2;
}
else
{
priv->parity = 0;
}
priv->stop2 = (termiosp->c_cflag & CSTOPB) != 0;
# ifdef CONFIG_SERIAL_OFLOWCONTROL
priv->oflow = (termiosp->c_cflag & CCTS_OFLOW) != 0;
oflow = priv->oflow;
# endif
# ifdef CONFIG_SERIAL_IFLOWCONTROL
priv->iflow = (termiosp->c_cflag & CRTS_IFLOW) != 0;
iflow = priv->iflow;
# endif
/* Note that since there is no way to request 9-bit mode
* and no way to support 5/6/7-bit modes, we ignore them
* all here.
*/
/* Note that only cfgetispeed is used because we have knowledge
* that only one speed is supported.
*/
priv->baud = cfgetispeed(termiosp);
/* Effect the changes immediately - note that we do not implement
* TCSADRAIN / TCSAFLUSH
*/
kinetis_uartconfigure(priv->uartbase, priv->baud, priv->clock,
priv->parity, priv->bits, priv->stop2,
iflow, oflow);
}
break;
#endif /* CONFIG_SERIAL_TERMIOS */
#ifdef CONFIG_KINETIS_UART_BREAKS
case TIOCSBRK:
{
irqstate_t flags;
flags = enter_critical_section();
/* Send a longer break signal */
regval = up_serialin(priv, KINETIS_UART_S2_OFFSET);
regval &= ~UART_S2_BRK13;
# ifdef CONFIG_KINETIS_UART_EXTEDED_BREAK
regval |= UART_S2_BRK13;
# endif
up_serialout(priv, KINETIS_UART_S2_OFFSET, regval);
/* Send a break signal */
regval = up_serialin(priv, KINETIS_UART_C2_OFFSET);
regval |= UART_C2_SBK;
up_serialout(priv, KINETIS_UART_C2_OFFSET, regval);
# ifdef CONFIG_KINETIS_SERIALBRK_BSDCOMPAT
/* BSD compatibility: Turn break on, and leave it on */
up_txint(dev, false);
# else
/* Send a single break character
* Toggling SBK sends one break character. Per the manual
* Toggling implies clearing the SBK field before the break
* character has finished transmitting.
*/
regval &= ~(UART_C2_SBK);
up_serialout(priv, KINETIS_UART_C2_OFFSET, regval);
#endif
leave_critical_section(flags);
}
break;
case TIOCCBRK:
{
irqstate_t flags;
flags = enter_critical_section();
/* Configure TX back to UART
* If non BSD compatible: This code has no effect, the SBRK
* was already cleared.
* but for BSD compatibility: Turn break off
*/
regval = up_serialin(priv, KINETIS_UART_C2_OFFSET);
regval &= ~UART_C2_SBK;
up_serialout(priv, KINETIS_UART_C2_OFFSET, regval);
# ifdef CONFIG_KINETIS_SERIALBRK_BSDCOMPAT
/* Enable further tx activity */
up_txint(dev, true);
# endif
leave_critical_section(flags);
}
break;
#endif /* CONFIG_KINETIS_UART_BREAKS */
default:
ret = -ENOTTY;
@ -915,9 +1209,6 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
}
return ret;
#else
return -ENOTTY;
#endif
}
/****************************************************************************
@ -1030,6 +1321,79 @@ static bool up_rxavailable(struct uart_dev_s *dev)
#endif
}
/****************************************************************************
* Name: up_rxflowcontrol
*
* Description:
* Called when Rx buffer is full (or exceeds configured watermark levels
* if CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is defined).
* Return true if UART activated RX flow control to block more incoming
* data
*
* Input parameters:
* dev - UART device instance
* nbuffered - the number of characters currently buffered
* (if CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is
* not defined the value will be 0 for an empty buffer or the
* defined buffer size for a full buffer)
* upper - true indicates the upper watermark was crossed where
* false indicates the lower watermark has been crossed
*
* Returned Value:
* true if RX flow control activated.
*
****************************************************************************/
#ifdef CONFIG_SERIAL_IFLOWCONTROL
static bool up_rxflowcontrol(struct uart_dev_s *dev,
unsigned int nbuffered, bool upper)
{
#if defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint16_t ie;
if (priv->iflow)
{
/* Is the RX buffer full? */
if (upper)
{
/* Disable Rx interrupt to prevent more data being from
* peripheral. When hardware RTS is enabled, this will
* prevent more data from coming in.
*
* This function is only called when UART recv buffer is full,
* that is: "dev->recv.head + 1 == dev->recv.tail".
*
* Logic in "uart_read" will automatically toggle Rx interrupts
* when buffer is read empty and thus we do not have to re-
* enable Rx interrupts.
*/
ie = priv->ie;
ie &= ~UART_C2_RIE;
up_restoreuartint(priv, ie);
return true;
}
/* No.. The RX buffer is empty */
else
{
/* We might leave Rx interrupt disabled if full recv buffer was
* read empty. Enable Rx interrupt to make sure that more input is
* received.
*/
up_rxint(dev, true);
}
}
#endif
return false;
}
#endif
/****************************************************************************
* Name: up_send
*