From f3fde0e9a8a3050a6e7acac25e35fb782e7a513f Mon Sep 17 00:00:00 2001 From: raiden00pl Date: Sat, 21 Jan 2023 20:31:37 +0100 Subject: [PATCH] stm32,stm32f7/foc: improve pwm_off --- arch/arm/src/stm32/stm32_foc.c | 22 +++++++++++++++------- arch/arm/src/stm32f7/stm32_foc.c | 22 +++++++++++++++------- 2 files changed, 30 insertions(+), 14 deletions(-) diff --git a/arch/arm/src/stm32/stm32_foc.c b/arch/arm/src/stm32/stm32_foc.c index 145838c0ea..c04b4ccb72 100644 --- a/arch/arm/src/stm32/stm32_foc.c +++ b/arch/arm/src/stm32/stm32_foc.c @@ -674,7 +674,6 @@ #define PWM_MODE_ADC_TRG STM32_CHANMODE_PWM1 #define PWM_MODE_HSLO_LSHI STM32_CHANMODE_OCREFHI #define PWM_MODE_HSHI_LSLO STM32_CHANMODE_OCREFLO -#define PWM_MODE_HIZ STM32_CHANMODE_FRZN /**************************************************************************** * Private Types @@ -1068,9 +1067,12 @@ static int stm32_foc_pwm_start(struct foc_dev_s *dev, bool state) DEBUGASSERT(board); DEBUGASSERT(pwm); - /* Configure outputs state */ + if (!dev->state.pwm_off) + { + /* Configure outputs state */ - PWM_ALL_OUTPUTS_ENABLE(pwm, state); + PWM_ALL_OUTPUTS_ENABLE(pwm, state); + } /* Call board-specific logic */ @@ -1932,19 +1934,25 @@ static int stm32_foc_pwm_off(struct foc_dev_s *dev, bool off) { /* Force all transistors to low state */ - PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN1, PWM_MODE_HIZ); - PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN2, PWM_MODE_HIZ); + PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN1, PWM_MODE_HSHI_LSLO); + PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN2, PWM_MODE_HSHI_LSLO); #if CONFIG_MOTOR_FOC_PHASES > 2 - PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN3, PWM_MODE_HIZ); + PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN3, PWM_MODE_HSHI_LSLO); #endif #if CONFIG_MOTOR_FOC_PHASES > 3 - PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN4, PWM_MODE_HIZ); + PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN4, PWM_MODE_HSHI_LSLO); #endif + + /* Disable complementary output */ + + PWM_OUTPUTS_ENABLE(pwm, PMW_OUTPUTS_ALL_COMP, false); } else { /* Restore FOC operation modes */ + PWM_ALL_OUTPUTS_ENABLE(pwm, true); + PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN1, PWM_MODE_FOC); PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN2, PWM_MODE_FOC); #if CONFIG_MOTOR_FOC_PHASES > 2 diff --git a/arch/arm/src/stm32f7/stm32_foc.c b/arch/arm/src/stm32f7/stm32_foc.c index e3efdac366..c033d4b7c4 100644 --- a/arch/arm/src/stm32f7/stm32_foc.c +++ b/arch/arm/src/stm32f7/stm32_foc.c @@ -501,7 +501,6 @@ #define PWM_MODE_ADC_TRG STM32_CHANMODE_PWM1 #define PWM_MODE_HSLO_LSHI STM32_CHANMODE_OCREFHI #define PWM_MODE_HSHI_LSLO STM32_CHANMODE_OCREFLO -#define PWM_MODE_HIZ STM32_CHANMODE_FRZN /**************************************************************************** * Private Types @@ -868,9 +867,12 @@ static int stm32_foc_pwm_start(struct foc_dev_s *dev, bool state) DEBUGASSERT(board); DEBUGASSERT(pwm); - /* Configure outputs state */ + if (!dev->state.pwm_off) + { + /* Configure outputs state */ - PWM_ALL_OUTPUTS_ENABLE(pwm, state); + PWM_ALL_OUTPUTS_ENABLE(pwm, state); + } /* Call board-specific logic */ @@ -1722,19 +1724,25 @@ static int stm32_foc_pwm_off(struct foc_dev_s *dev, bool off) { /* Force all transistors to low state */ - PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN1, PWM_MODE_HIZ); - PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN2, PWM_MODE_HIZ); + PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN1, PWM_MODE_HSHI_LSLO); + PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN2, PWM_MODE_HSHI_LSLO); #if CONFIG_MOTOR_FOC_PHASES > 2 - PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN3, PWM_MODE_HIZ); + PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN3, PWM_MODE_HSHI_LSLO); #endif #if CONFIG_MOTOR_FOC_PHASES > 3 - PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN4, PWM_MODE_HIZ); + PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN4, PWM_MODE_HSHI_LSLO); #endif + + /* Disable complementary output */ + + PWM_OUTPUTS_ENABLE(pwm, PMW_OUTPUTS_ALL_COMP, false); } else { /* Restore FOC operation modes */ + PWM_ALL_OUTPUTS_ENABLE(pwm, true); + PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN1, PWM_MODE_FOC); PWM_MODE_UPDATE(pwm, STM32_PWM_CHAN2, PWM_MODE_FOC); #if CONFIG_MOTOR_FOC_PHASES > 2