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ARMv7-A SMP: Allow CONFIG_SMP_NCPUS=1 for testing purposes

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This commit is contained in:
Gregory Nutt 2016-05-18 08:35:27 -06:00
parent 32838fcc2c
commit f454b38d6e
2 changed files with 10 additions and 2 deletions
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8
arch/arm/src/armv7-a/arm_cpuidlestack.c
View File

@ -47,7 +47,7 @@
#include "smp.h" #include "smp.h"
#include "up_internal.h" #include "up_internal.h"
#if defined(CONFIG_SMP) && CONFIG_SMP_NCPUS > 1 #ifdef CONFIG_SMP
/**************************************************************************** /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
@ -61,6 +61,7 @@
* Private Data * Private Data
****************************************************************************/ ****************************************************************************/
#if CONFIG_SMP_NCPUS > 1
static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] = static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
{ {
0 0
@ -72,6 +73,7 @@ static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
#endif /* CONFIG_SMP_NCPUS > 3 */ #endif /* CONFIG_SMP_NCPUS > 3 */
#endif /* CONFIG_SMP_NCPUS > 2 */ #endif /* CONFIG_SMP_NCPUS > 2 */
}; };
#endif
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
@ -122,6 +124,7 @@ static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size) int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
{ {
#if CONFIG_SMP_NCPUS > 1
uintptr_t stack_alloc; uintptr_t stack_alloc;
uintptr_t top_of_stack; uintptr_t top_of_stack;
@ -138,8 +141,9 @@ int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
tcb->adj_stack_size = SMP_STACK_SIZE; tcb->adj_stack_size = SMP_STACK_SIZE;
tcb->stack_alloc_ptr = (FAR uint32_t *)stack_alloc; tcb->stack_alloc_ptr = (FAR uint32_t *)stack_alloc;
tcb->adj_stack_ptr = (FAR uint32_t *)top_of_stack; tcb->adj_stack_ptr = (FAR uint32_t *)top_of_stack;
#endif
return OK; return OK;
} }
#endif /* CONFIG_SMP && CONFIG_SMP_NCPUS > 1 */ #endif /* CONFIG_SMP */

4
configs/sabre-6quad/README.txt
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@ -63,6 +63,10 @@ logic.
At this point, I would say that the basic NSH port is complete. At this point, I would say that the basic NSH port is complete.
2016-05-18: Started looking at the SMP configuration. Initially, I verfied
that the NSH configuration works with CONFIG_SMP_NCPUS=1. Not a very
interesting case, but this does exercise a lot of the basic SMP logic.
Platform Features Platform Features
================= =================