nucleo-g431rb: add PWM example
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65
boards/arm/stm32/nucleo-g431rb/configs/pwm/defconfig
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65
boards/arm/stm32/nucleo-g431rb/configs/pwm/defconfig
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#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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CONFIG_ARCH="arm"
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CONFIG_ARCH_BOARD="nucleo-g431rb"
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CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
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CONFIG_ARCH_CHIP="stm32"
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CONFIG_ARCH_CHIP_STM32=y
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CONFIG_ARCH_CHIP_STM32G431R=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_BOARD_LOOPSPERMSEC=5483
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CONFIG_BUILTIN=y
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CONFIG_DEBUG_FULLOPT=y
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CONFIG_DEBUG_SYMBOLS=y
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CONFIG_DEFAULT_SMALL=y
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CONFIG_EXAMPLES_PWM=y
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CONFIG_INTELHEX_BINARY=y
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CONFIG_MAX_TASKS=16
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_FILEIOSIZE=1024
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CONFIG_NSH_LINELEN=80
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_PWM=y
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CONFIG_PWM_MULTICHAN=y
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CONFIG_PWM_NCHANNELS=4
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CONFIG_RAM_SIZE=22528
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CONFIG_RAM_START=0x20000000
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CONFIG_RAW_BINARY=y
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_HPWORK=y
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CONFIG_SCHED_HPWORKPRIORITY=192
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CONFIG_SCHED_WAITPID=y
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CONFIG_SDCLONE_DISABLE=y
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CONFIG_SERIAL_TERMIOS=y
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CONFIG_START_DAY=5
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CONFIG_START_MONTH=7
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CONFIG_START_YEAR=2011
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CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
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CONFIG_STM32_FORCEPOWER=y
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CONFIG_STM32_JTAG_FULL_ENABLE=y
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CONFIG_STM32_PWM_MULTICHAN=y
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CONFIG_STM32_TIM1=y
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CONFIG_STM32_TIM1_CH1NOUT=y
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CONFIG_STM32_TIM1_CH1OUT=y
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CONFIG_STM32_TIM1_CH2NOUT=y
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CONFIG_STM32_TIM1_CH2OUT=y
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CONFIG_STM32_TIM1_CH3NOUT=y
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CONFIG_STM32_TIM1_CH3OUT=y
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CONFIG_STM32_TIM1_CH4OUT=y
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CONFIG_STM32_TIM1_CHANNEL1=y
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CONFIG_STM32_TIM1_CHANNEL2=y
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CONFIG_STM32_TIM1_CHANNEL3=y
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CONFIG_STM32_TIM1_CHANNEL4=y
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CONFIG_STM32_TIM1_PWM=y
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CONFIG_STM32_USART2=y
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CONFIG_SYMTAB_ORDEREDBYNAME=y
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CONFIG_SYSTEM_NSH=y
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CONFIG_TASK_NAME_SIZE=0
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CONFIG_USART2_SERIAL_CONSOLE=y
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CONFIG_USER_ENTRYPOINT="nsh_main"
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@ -120,6 +120,45 @@
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#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
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#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
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/* APB2 timers 1, 8, 20 and 15-17 will receive PCLK2. */
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/* Timers driven from APB2 will be PCLK2 */
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#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB1_TIM15_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB1_TIM16_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB1_TIM17_CLKIN (STM32_PCLK2_FREQUENCY)
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/* APB1 timers 2-7 will be twice PCLK1 */
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#define STM32_APB1_TIM2_CLKIN (STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM3_CLKIN (STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM4_CLKIN (STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY)
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/* USB divider -- Divide PLL clock by 1.5 */
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#define STM32_CFGR_USBPRE 0
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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*/
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#define BOARD_TIM1_FREQUENCY (STM32_PCLK2_FREQUENCY)
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#define BOARD_TIM2_FREQUENCY (STM32_PCLK1_FREQUENCY)
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#define BOARD_TIM3_FREQUENCY (STM32_PCLK1_FREQUENCY)
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#define BOARD_TIM4_FREQUENCY (STM32_PCLK1_FREQUENCY)
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#define BOARD_TIM5_FREQUENCY (STM32_PCLK1_FREQUENCY)
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#define BOARD_TIM6_FREQUENCY (STM32_PCLK1_FREQUENCY)
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#define BOARD_TIM7_FREQUENCY (STM32_PCLK1_FREQUENCY)
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#define BOARD_TIM8_FREQUENCY (STM32_PCLK2_FREQUENCY)
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#define BOARD_TIM15_FREQUENCY (STM32_PCLK2_FREQUENCY)
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#define BOARD_TIM16_FREQUENCY (STM32_PCLK2_FREQUENCY)
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#define BOARD_TIM17_FREQUENCY (STM32_PCLK2_FREQUENCY)
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#define BOARD_TIM20_FREQUENCY (STM32_PCLK2_FREQUENCY)
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/* LED definitions **********************************************************/
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/* The NUCLEO-G431RB has four user LEDs.
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@ -187,4 +226,16 @@
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/* Pin Multiplexing Disambiguation ******************************************/
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/* PWM configuration ********************************************************/
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/* TIM1 PWM */
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#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* PA8 */
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#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1NOUT_2 /* PA11 */
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#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1 /* PA9 */
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#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2NOUT_1 /* PA12 */
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#define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 /* PA10 */
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#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3NOUT_1 /* PB1 */
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#define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_2 /* PC3 */
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#endif /* __BOARDS_ARM_STM32_NUCLEO_G431RB_INCLUDE_BOARD_H */
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@ -33,6 +33,10 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y)
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CSRCS += stm32_appinit.c
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endif
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ifeq ($(CONFIG_PWM),y)
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CSRCS += stm32_pwm.c
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endif
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DEPPATH += --dep-path board
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VPATH += :board
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CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board)
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#define LED_DRIVER_PATH "/dev/userleds"
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/* PWM */
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#define NUCLEOG431RB_PWMTIMER 1
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/****************************************************************************
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* Public Data
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****************************************************************************/
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@ -85,4 +89,16 @@
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int stm32_bringup(void);
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/****************************************************************************
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* Name: stm32_pwm_setup
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*
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* Description:
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* Initialize PWM and register the PWM device.
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*
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****************************************************************************/
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#ifdef CONFIG_PWM
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int stm32_pwm_setup(void);
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#endif
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#endif /* __BOARDS_ARM_STM32_NUCLEO_G431RB_SRC_NUCLEO_G431RB_H */
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}
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#endif
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#ifdef CONFIG_PWM
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/* Initialize PWM and register the PWM driver. */
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ret = stm32_pwm_setup();
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if (ret < 0)
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{
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syslog(LOG_ERR, "ERROR: stm32_pwm_setup failed: %d\n", ret);
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}
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#endif
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UNUSED(ret);
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return OK;
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}
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84
boards/arm/stm32/nucleo-g431rb/src/stm32_pwm.c
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84
boards/arm/stm32/nucleo-g431rb/src/stm32_pwm.c
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/****************************************************************************
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* boards/arm/stm32/nucleo-g431rb/src/stm32_pwm.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/timers/pwm.h>
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#include <arch/board/board.h>
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#include "chip.h"
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#include "arm_arch.h"
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#include "stm32_pwm.h"
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#include "nucleo-g431rb.h"
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_pwm_setup
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*
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* Description:
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* Initialize PWM and register the PWM device.
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*
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****************************************************************************/
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int stm32_pwm_setup(void)
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{
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static bool initialized = false;
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struct pwm_lowerhalf_s *pwm;
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int ret;
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/* Have we already initialized? */
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if (!initialized)
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{
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/* Call stm32_pwminitialize() to get an instance of the PWM interface */
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pwm = stm32_pwminitialize(NUCLEOG431RB_PWMTIMER);
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if (!pwm)
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{
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tmrerr("Failed to get the STM32 PWM lower half\n");
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return -ENODEV;
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}
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/* Register the PWM driver at "/dev/pwm0" */
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ret = pwm_register("/dev/pwm0", pwm);
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if (ret < 0)
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{
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tmrerr("pwm_register failed: %d\n", ret);
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return ret;
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}
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/* Now we are initialized */
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initialized = true;
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}
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return OK;
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}
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