nucleo-g431rb: add PWM example

This commit is contained in:
raiden00pl 2021-04-12 17:59:09 +02:00 committed by David Sidrane
parent beebb57445
commit f467a741fb
6 changed files with 230 additions and 0 deletions

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@ -0,0 +1,65 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-g431rb"
CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431R=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=5483
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEFAULT_SMALL=y
CONFIG_EXAMPLES_PWM=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MAX_TASKS=16
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=1024
CONFIG_NSH_LINELEN=80
CONFIG_PREALLOC_TIMERS=4
CONFIG_PWM=y
CONFIG_PWM_MULTICHAN=y
CONFIG_PWM_NCHANNELS=4
CONFIG_RAM_SIZE=22528
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_START_DAY=5
CONFIG_START_MONTH=7
CONFIG_START_YEAR=2011
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32_FORCEPOWER=y
CONFIG_STM32_JTAG_FULL_ENABLE=y
CONFIG_STM32_PWM_MULTICHAN=y
CONFIG_STM32_TIM1=y
CONFIG_STM32_TIM1_CH1NOUT=y
CONFIG_STM32_TIM1_CH1OUT=y
CONFIG_STM32_TIM1_CH2NOUT=y
CONFIG_STM32_TIM1_CH2OUT=y
CONFIG_STM32_TIM1_CH3NOUT=y
CONFIG_STM32_TIM1_CH3OUT=y
CONFIG_STM32_TIM1_CH4OUT=y
CONFIG_STM32_TIM1_CHANNEL1=y
CONFIG_STM32_TIM1_CHANNEL2=y
CONFIG_STM32_TIM1_CHANNEL3=y
CONFIG_STM32_TIM1_CHANNEL4=y
CONFIG_STM32_TIM1_PWM=y
CONFIG_STM32_USART2=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"

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@ -120,6 +120,45 @@
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
/* APB2 timers 1, 8, 20 and 15-17 will receive PCLK2. */
/* Timers driven from APB2 will be PCLK2 */
#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY)
#define STM32_APB1_TIM15_CLKIN (STM32_PCLK2_FREQUENCY)
#define STM32_APB1_TIM16_CLKIN (STM32_PCLK2_FREQUENCY)
#define STM32_APB1_TIM17_CLKIN (STM32_PCLK2_FREQUENCY)
/* APB1 timers 2-7 will be twice PCLK1 */
#define STM32_APB1_TIM2_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM3_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM4_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY)
/* USB divider -- Divide PLL clock by 1.5 */
#define STM32_CFGR_USBPRE 0
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
*/
#define BOARD_TIM1_FREQUENCY (STM32_PCLK2_FREQUENCY)
#define BOARD_TIM2_FREQUENCY (STM32_PCLK1_FREQUENCY)
#define BOARD_TIM3_FREQUENCY (STM32_PCLK1_FREQUENCY)
#define BOARD_TIM4_FREQUENCY (STM32_PCLK1_FREQUENCY)
#define BOARD_TIM5_FREQUENCY (STM32_PCLK1_FREQUENCY)
#define BOARD_TIM6_FREQUENCY (STM32_PCLK1_FREQUENCY)
#define BOARD_TIM7_FREQUENCY (STM32_PCLK1_FREQUENCY)
#define BOARD_TIM8_FREQUENCY (STM32_PCLK2_FREQUENCY)
#define BOARD_TIM15_FREQUENCY (STM32_PCLK2_FREQUENCY)
#define BOARD_TIM16_FREQUENCY (STM32_PCLK2_FREQUENCY)
#define BOARD_TIM17_FREQUENCY (STM32_PCLK2_FREQUENCY)
#define BOARD_TIM20_FREQUENCY (STM32_PCLK2_FREQUENCY)
/* LED definitions **********************************************************/
/* The NUCLEO-G431RB has four user LEDs.
@ -187,4 +226,16 @@
/* Pin Multiplexing Disambiguation ******************************************/
/* PWM configuration ********************************************************/
/* TIM1 PWM */
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* PA8 */
#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1NOUT_2 /* PA11 */
#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1 /* PA9 */
#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2NOUT_1 /* PA12 */
#define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 /* PA10 */
#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3NOUT_1 /* PB1 */
#define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_2 /* PC3 */
#endif /* __BOARDS_ARM_STM32_NUCLEO_G431RB_INCLUDE_BOARD_H */

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@ -33,6 +33,10 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
ifeq ($(CONFIG_PWM),y)
CSRCS += stm32_pwm.c
endif
DEPPATH += --dep-path board
VPATH += :board
CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board)

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@ -57,6 +57,10 @@
#define LED_DRIVER_PATH "/dev/userleds"
/* PWM */
#define NUCLEOG431RB_PWMTIMER 1
/****************************************************************************
* Public Data
****************************************************************************/
@ -85,4 +89,16 @@
int stm32_bringup(void);
/****************************************************************************
* Name: stm32_pwm_setup
*
* Description:
* Initialize PWM and register the PWM device.
*
****************************************************************************/
#ifdef CONFIG_PWM
int stm32_pwm_setup(void);
#endif
#endif /* __BOARDS_ARM_STM32_NUCLEO_G431RB_SRC_NUCLEO_G431RB_H */

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@ -92,6 +92,16 @@ int stm32_bringup(void)
}
#endif
#ifdef CONFIG_PWM
/* Initialize PWM and register the PWM driver. */
ret = stm32_pwm_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_pwm_setup failed: %d\n", ret);
}
#endif
UNUSED(ret);
return OK;
}

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@ -0,0 +1,84 @@
/****************************************************************************
* boards/arm/stm32/nucleo-g431rb/src/stm32_pwm.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/timers/pwm.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "stm32_pwm.h"
#include "nucleo-g431rb.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_pwm_setup
*
* Description:
* Initialize PWM and register the PWM device.
*
****************************************************************************/
int stm32_pwm_setup(void)
{
static bool initialized = false;
struct pwm_lowerhalf_s *pwm;
int ret;
/* Have we already initialized? */
if (!initialized)
{
/* Call stm32_pwminitialize() to get an instance of the PWM interface */
pwm = stm32_pwminitialize(NUCLEOG431RB_PWMTIMER);
if (!pwm)
{
tmrerr("Failed to get the STM32 PWM lower half\n");
return -ENODEV;
}
/* Register the PWM driver at "/dev/pwm0" */
ret = pwm_register("/dev/pwm0", pwm);
if (ret < 0)
{
tmrerr("pwm_register failed: %d\n", ret);
return ret;
}
/* Now we are initialized */
initialized = true;
}
return OK;
}