Add GPIO debug logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2731 42af7a65-404d-4744-a932-0658087f49c3
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@ -48,7 +48,7 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
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up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
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up_hardfault.c up_svcall.c
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# Required SAM3U files
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# Required LPC17xx files
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CHIP_ASRCS =
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CHIP_CSRCS = lpc17_gpio.c lpc17_start.c
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@ -56,7 +56,11 @@ CHIP_CSRCS = lpc17_gpio.c lpc17_start.c
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# lpc17_irq.c lpc17_lowputc.c lpc17_gpio.c lpc17_serial.c \
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# lpc17_start.c lpc17_timerisr.c
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# Configuration-dependent SAM3U files
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# Configuration-dependent LPC17xx files
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ifeq ($(CONFIG_DEBUG),y)
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CHIP_CSRCS += lpc17_gpiodbg.c
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endif
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ifeq ($(CONFIG_LPC17_DMA),y)
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CHIP_CSRCS += lpc17_dmac.c
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@ -73,8 +73,8 @@
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*/
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#ifdef CONFIG_GPIO_IRQ
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static uint32_t g_intedge0[2];
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static uint32_t g_intedge2[2];
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static uint64_t g_intedge0;
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static uint64_t g_intedge2;
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#endif
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/****************************************************************************
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@ -278,35 +278,28 @@ static int lpc17_pullup(uint16_t cfgset, unsigned int port, unsigned int pin)
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#ifdef CONFIG_GPIO_IRQ
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static int lpc17_setintedge(unsigned int port, unsigned int pin, unsigned int value)
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{
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const uint32_t *table;
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uint32_t tabval;
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const uint64_t *intedge;
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unsigned int shift;
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/* Which word to we use? */
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if (port == 0)
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{
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table = g_intedge0;
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intedge = g_intedge0;
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}
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else if (port == 2)
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{
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table = g_intedge2;
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intedge = g_intedge2;
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}
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else
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{
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return;
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}
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if (pin >= 16)
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{
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table++;
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pin -= 16;
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}
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/* Set the requested value in the PINSEL register */
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*table &= ~(3 << shift);
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*table |= (value << shift);
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*intedge &= ~(3 << shift);
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*intedge |= (value << shift);
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}
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#endif
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171
arch/arm/src/lpc17xx/lpc17_gpiodbg.c
Executable file
171
arch/arm/src/lpc17xx/lpc17_gpiodbg.c
Executable file
@ -0,0 +1,171 @@
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/****************************************************************************
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* arch/arm/src/lpc17xx/lpc17_gpiodbg.c
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*
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* Copyright (C) 2010 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <debug.h>
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#include <arch/irq.h>
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#include "up_arch.h"
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#include "chip.h"
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#include "lpc17_gpio.h"
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#include "lpc17_internal.h"
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#ifdef CONFIG_DEBUG
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: lpc17_pinsel
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*
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* Description:
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* Get the address of the PINSEL register corresponding to this port and
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* pin number.
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*
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****************************************************************************/
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static uint32_t lpc17_pinsel(unsigned int port, unsigned int pin)
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{
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if (pin < 16)
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{
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return g_lopinsel[port];
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}
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else
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{
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return g_hipinsel[port];
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}
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}
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/****************************************************************************
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* Name: lpc17_pinmode
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*
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* Description:
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* Get the address of the PINMODE register corresponding to this port and
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* pin number.
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*
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****************************************************************************/
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static uint32_t lpc17_pinmode(unsigned int port, unsigned int pin)
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{
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if (pin < 16)
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{
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return g_lopinmode[port];
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}
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else
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{
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return g_hipinmode[port];
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}
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}
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/****************************************************************************
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* Global Functions
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****************************************************************************/
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/****************************************************************************
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* Function: lpc17_dumpgpio
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*
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* Description:
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* Dump all GPIO registers associated with the provided base address
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*
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****************************************************************************/
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int lpc17_dumpgpio(uint16_t pinset, const char *msg)
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{
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irqstate_t flags;
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uint32_t base;
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uint32_t pinsel;
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uint32_t pinmode;
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unsigned int port;
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unsigned int pin;
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/* Get the base address associated with the GPIO port */
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port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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pinsel = lpc17_pinsel(port);
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pinmode = lpc17_pinmode(port);
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/* The following requires exclusive access to the GPIO registers */
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flags = irqsave();
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lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
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port + '0', pinset, fiobase, msg);
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lldbg(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n"
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pinsel, pinsel ? getreg32(pinsel) : 0,
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pinmode, pinmode ? getreg32(pinmode) : 0,
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g_odmode[port], getreg32(g_odmode[port]));
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base = g_fiobase[port];
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lldbg(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n"
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base+LPC17_FIO_DIR_OFFSET, getreg32(base+LPC17_FIO_DIR_OFFSET),
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base+LPC17_FIO_MASK_OFFSET, getreg32(base+LPC17_FIO_MASK_OFFSET),
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base+LPC17_FIO_PIN_OFFSET, getreg32(base+LPC17_FIO_PIN_OFFSET));
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base = g_intbase[port];
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lldbg(" IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
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base+LPC17_GPIOINT_IOINTSTATUS_OFFSET, getreg32(base+LPC17_GPIOINT_IOINTSTATUS_OFFSET),
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base+LPC17_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATR_OFFSET),
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base+LPC17_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATF_OFFSET));
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lldbg(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
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base+LPC17_GPIOINT_INTENR_OFFSET, getreg32(base+LPC17_GPIOINT_INTENR_OFFSET),
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base+LPC17_GPIOINT_INTENF_OFFSET, getreg32(base+LPC17_GPIOINT_INTENF_OFFSET));
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irqrestore(flags);
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return OK;
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}
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#endif /* CONFIG_DEBUG */
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