boards/nrf5340-dk: add ADC configuration

This commit is contained in:
raiden00pl 2023-03-13 13:24:34 +01:00 committed by Petro Karashchenko
parent 3571ff3c54
commit f48846676e
6 changed files with 294 additions and 0 deletions

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@ -0,0 +1,52 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STANDARD_SERIAL is not set
CONFIG_ADC=y
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nrf5340-dk"
CONFIG_ARCH_BOARD_NRF5340_DK=y
CONFIG_ARCH_CHIP="nrf53"
CONFIG_ARCH_CHIP_NRF5340=y
CONFIG_ARCH_CHIP_NRF5340_CPUAPP=y
CONFIG_ARCH_CHIP_NRF53=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_STDARG_H=y
CONFIG_BOARD_LOOPSPERMSEC=5500
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_ADC=y
CONFIG_EXAMPLES_ADC_NSAMPLES=4
CONFIG_EXAMPLES_ADC_SWTRIG=y
CONFIG_EXPERIMENTAL=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NRF53_SAADC=y
CONFIG_NRF53_UART0=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=524288
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=26
CONFIG_START_MONTH=3
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_UART0_SERIAL_CONSOLE=y

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@ -141,4 +141,18 @@
#define NRF53_PWM0_CH2_PIN (GPIO_MCUSEL_APP | GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN(12))
#define NRF53_PWM0_CH3_PIN (GPIO_MCUSEL_APP | GPIO_OUTPUT | GPIO_PORT1 | GPIO_PIN(13))
/* ADC Pins *****************************************************************/
/* ADC
* ADC CH0 - P0.04 - AIN1
* ADC CH1 - P0.05 - AIN2
* ADC CH2 - P0.06 - AIN4
* ADC CH3 - P0.07 - AIN5
*/
#define NRF53_ADC_CH0_PIN (GPIO_MCUSEL_APP | GPIO_INPUT | GPIO_PORT0 | GPIO_PIN(4))
#define NRF53_ADC_CH1_PIN (GPIO_MCUSEL_APP | GPIO_INPUT | GPIO_PORT0 | GPIO_PIN(5))
#define NRF53_ADC_CH2_PIN (GPIO_MCUSEL_APP | GPIO_INPUT | GPIO_PORT0 | GPIO_PIN(6))
#define NRF53_ADC_CH3_PIN (GPIO_MCUSEL_APP | GPIO_INPUT | GPIO_PORT0 | GPIO_PIN(7))
#endif /* __BOARDS_ARM_NRF53_NRF5340_DK_INCLUDE_BOARD_H */

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@ -46,4 +46,8 @@ ifeq ($(CONFIG_PWM),y)
CSRCS += nrf53_pwm.c
endif
ifeq ($(CONFIG_ADC),y)
CSRCS += nrf53_adc.c
endif
include $(TOPDIR)/boards/Board.mk

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@ -106,5 +106,17 @@ int nrf53_timer_driver_setup(const char *devpath, int timer);
int nrf53_pwm_setup(void);
#endif
/****************************************************************************
* Name: nrf53_adc_setup
*
* Description:
* Initialize ADC driver.
*
****************************************************************************/
#ifdef CONFIG_ADC
int nrf53_adc_setup(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_NRF53_NRF5340_DK_SRC_NRF53_NRF5340_DK_H */

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@ -0,0 +1,200 @@
/****************************************************************************
* boards/arm/nrf53/nrf5340-dk/src/nrf53_adc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/analog/adc.h>
#include <arch/board/board.h>
#include "nrf53_gpio.h"
#include "nrf53_adc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Only one channel supported if TIMER triger enabled */
#ifdef CONFIG_NRF53_SAADC_TIMER
# define ADC_NCHANNELS (1)
#else
# define ADC_NCHANNELS (4)
#endif
/****************************************************************************
* Private data
****************************************************************************/
/* ADC pins configuration */
static uint32_t g_adc_pins[ADC_NCHANNELS] =
{
NRF53_ADC_CH0_PIN, /* AIN1 */
#if (ADC_NCHANNELS == 4)
NRF53_ADC_CH1_PIN, /* AIN2 */
NRF53_ADC_CH2_PIN, /* AIN4 */
NRF53_ADC_CH3_PIN, /* AIN5 */
#endif
};
/* ADC channels configuration */
static struct nrf53_adc_channel_s g_adc_chanlist[ADC_NCHANNELS] =
{
/* Channel 0 */
{
.p_psel = NRF53_ADC_IN_IN1,
.n_psel = 0,
#ifdef CONFIG_NRF53_SAADC_LIMITS
.limith = 0,
.limitl = 0,
#endif
.resp = NRF53_ADC_RES_BYPASS,
.resn = NRF53_ADC_RES_BYPASS,
.gain = NRF53_ADC_GAIN_1,
.refsel = NRF53_ADC_REFSEL_INTERNAL,
.tacq = NRF53_ADC_TACQ_40US,
.mode = NRF53_ADC_MODE_SE,
.burst = NRF53_ADC_BURST_DISABLE,
},
#if (ADC_NCHANNELS == 4)
/* Channel 1 */
{
.p_psel = NRF53_ADC_IN_IN2,
.n_psel = 0,
#ifdef CONFIG_NRF53_SAADC_LIMITS
.limith = 0,
.limitl = 0,
#endif
.resp = NRF53_ADC_RES_BYPASS,
.resn = NRF53_ADC_RES_BYPASS,
.gain = NRF53_ADC_GAIN_1,
.refsel = NRF53_ADC_REFSEL_INTERNAL,
.tacq = NRF53_ADC_TACQ_40US,
.mode = NRF53_ADC_MODE_SE,
.burst = NRF53_ADC_BURST_DISABLE,
},
/* Channel 2 */
{
.p_psel = NRF53_ADC_IN_IN4,
.n_psel = 0,
#ifdef CONFIG_NRF53_SAADC_LIMITS
.limith = 0,
.limitl = 0,
#endif
.resp = NRF53_ADC_RES_BYPASS,
.resn = NRF53_ADC_RES_BYPASS,
.gain = NRF53_ADC_GAIN_1,
.refsel = NRF53_ADC_REFSEL_INTERNAL,
.tacq = NRF53_ADC_TACQ_40US,
.mode = NRF53_ADC_MODE_SE,
.burst = NRF53_ADC_BURST_DISABLE,
},
/* Channel 3 */
{
.p_psel = NRF53_ADC_IN_IN5,
.n_psel = 0,
#ifdef CONFIG_NRF53_SAADC_LIMITS
.limith = 0,
.limitl = 0,
#endif
.resp = NRF53_ADC_RES_BYPASS,
.resn = NRF53_ADC_RES_BYPASS,
.gain = NRF53_ADC_GAIN_1,
.refsel = NRF53_ADC_REFSEL_INTERNAL,
.tacq = NRF53_ADC_TACQ_40US,
.mode = NRF53_ADC_MODE_SE,
.burst = NRF53_ADC_BURST_DISABLE,
}
#endif
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: nrf53_adc_setup
*
* Description:
* Initialize ADC and register the ADC device.
*
****************************************************************************/
int nrf53_adc_setup(void)
{
static bool initialized = false;
struct adc_dev_s *adc = NULL;
int ret = OK;
int i = 0;
/* Have we already initialized? */
if (!initialized)
{
/* Configure ADC pins */
for (i = 0; i < ADC_NCHANNELS; i += 1)
{
nrf53_gpio_config(g_adc_pins[i]);
}
/* Call nrf53_adcinitialize() to get an instance of the ADC interface */
adc = nrf53_adcinitialize(g_adc_chanlist, ADC_NCHANNELS);
if (!adc)
{
aerr("ERROR: Failed to get the NRF53 ADC lower half\n");
ret = -ENODEV;
goto errout;
}
/* Register the ADC driver at "/dev/adc0" */
ret = adc_register("/dev/adc0", adc);
if (ret < 0)
{
aerr("ERROR: adc_register failed: %d\n", ret);
goto errout;
}
/* Now we are initialized */
initialized = true;
}
errout:
return ret;
}

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@ -111,6 +111,18 @@ int nrf53_bringup(void)
}
#endif
#ifdef CONFIG_ADC
/* Configure ADC driver */
ret = nrf53_adc_setup();
if (ret < 0)
{
syslog(LOG_ERR,
"ERROR: Failed to initialize ADC driver: %d\n",
ret);
}
#endif
#ifdef CONFIG_NRF53_SOFTDEVICE_CONTROLLER
ret = nrf53_sdc_initialize();