Olimex-STM32-H407: Pick up a few changes from PR38. Most of those changes are, however, not appropriate or not incompliance with NuttX naming or coding style.
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@ -5,9 +5,33 @@ The Olimex STM32-H407 configuration is based on
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stm32Fdiscovery and Olimex STM32-H405.
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The H407 was programmed with ST-LINK/V2 from both Win8.1 and Ubuntu 14.04
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This release provides baseline for H407 12MHZ clock in include/board.h
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nsh - Only basic shell response tested on USART2
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This realease provides baseline for H407 12MHZ clock in include/board.h
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Development Environment
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=======================
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TODO: Update to use mini USB-OTG and USB HOST
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Either Linux or Cygwin on Windows can be used for the development environment.
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The source has been built only using the GNU toolchain (see below). Other
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toolchains will likely cause problems.
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LEDs
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====
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The H407 board has 1 Status LED;
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SDCard
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======
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Expects to be plugged in else hangs. TODO: Shouldn't hang.
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SDIO 4bit with pulls/downs on pins. Doesn't have a SD card detect pin.
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UARTs
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=====
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On the H407 board, ?? all uarts are available for pin mappings
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USART2 is typically used for nsh console
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STM32-H407-specific Configuration Options
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===============================================
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@ -153,11 +153,11 @@
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/* Timers driven from APB2 will be twice PCLK2 */
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#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM1_CLKIN (2 * STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM8_CLKIN (2 * STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM9_CLKIN (2 * STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM10_CLKIN (2 * STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM11_CLKIN (2 * STM32_PCLK2_FREQUENCY)
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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@ -165,7 +165,37 @@
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*/
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#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY
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#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY
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#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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/* SDIO dividers. Note that slower clocking is required when DMA is disabled
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* in order to avoid RX overrun/TX underrun errors due to delayed responses
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* to service FIFOs in interrupt driven mode. These values have not been
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* tuned!!!
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*
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* SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz
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*/
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#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT)
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/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
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* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
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*/
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#ifdef CONFIG_SDIO_DMA
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# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
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#else
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# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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#endif
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/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
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* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
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*/
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#ifdef CONFIG_SDIO_DMA
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# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
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#else
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# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
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#endif
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/* LED definitions ******************************************************************/
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/* If CONFIG_ARCH_LEDS is not defined, then the user can control the status LED in any
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@ -179,7 +209,7 @@
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED_STATUS_BIT (1 << BOARD_LED1)
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#define BOARD_LED_STATUS_BIT (1 << BOARD_LED_STATUS)
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/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the status LED of the
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* Olimex STM32-H405. The following definitions describe how NuttX controls the LEDs:
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@ -205,6 +235,7 @@
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/* Alternate function pin selections ************************************************/
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/* USART3: */
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#if 0
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#define GPIO_USART3_RX GPIO_USART3_RX_1 /* PB11 */
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#define GPIO_USART3_TX GPIO_USART3_TX_1 /* PB10 */
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@ -221,10 +252,21 @@
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/* CAN: */
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#define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PB8 */
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#define GPIO_CAN1_TX GPIO_CAN1_TX_2 /* PB9 */
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#define GPIO_CAN2_RX GPIO_CAN1_RX_2 /* PB5 */
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#define GPIO_CAN2_TX GPIO_CAN1_TX_2 /* PB6 */
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#define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PB8 */
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#define GPIO_CAN1_TX GPIO_CAN1_TX_2 /* PB9 */
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#define GPIO_CAN2_RX GPIO_CAN1_RX_2 /* PB5 */
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#define GPIO_CAN2_TX GPIO_CAN1_TX_2 /* PB6 */
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/* DMA Channl/Stream Selections *****************************************************/
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/* Stream selections are arbitrary for now but might become important in the future
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* if we set aside more DMA channels/streams.
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*
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* SDIO DMA
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* DMAMAP_SDIO_1 = Channel 4, Stream 3
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* DMAMAP_SDIO_2 = Channel 4, Stream 6
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*/
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#define DMAMAP_SDIO DMAMAP_SDIO_1
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/************************************************************************************
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* Public Data
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2
configs/olimex-stm32-h407/src/.gitignore
vendored
Normal file
2
configs/olimex-stm32-h407/src/.gitignore
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@ -0,0 +1,2 @@
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/.depend
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/Make.dep
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