Add logic to enable SAM4L clocks
This commit is contained in:
Gregory Nutt
parent
2864dfac0d
commit
f4954c743d
@ -206,7 +206,7 @@
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# define BSCIF_OSCCTRL32_STARTUP_128 (7 << BSCIF_OSCCTRL32_STARTUP_SHIFT) /* 128 1.1 ms */
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# define BSCIF_OSCCTRL32_STARTUP_8K (7 << BSCIF_OSCCTRL32_STARTUP_SHIFT) /* 8192 72.3 ms */
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# define BSCIF_OSCCTRL32_STARTUP_16K (7 << BSCIF_OSCCTRL32_STARTUP_SHIFT) /* 16384 143 ms */
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# define BSCIF_OSCCTRL32_STARTUP_54K (7 << BSCIF_OSCCTRL32_STARTUP_SHIFT) /* 65536 570 ms */
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# define BSCIF_OSCCTRL32_STARTUP_64K (7 << BSCIF_OSCCTRL32_STARTUP_SHIFT) /* 65536 570 ms */
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# define BSCIF_OSCCTRL32_STARTUP_128K (7 << BSCIF_OSCCTRL32_STARTUP_SHIFT) /* 131072 1.1 s */
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# define BSCIF_OSCCTRL32_STARTUP_256K (7 << BSCIF_OSCCTRL32_STARTUP_SHIFT) /* 262144 2.3 s */
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# define BSCIF_OSCCTRL32_STARTUP_512K (7 << BSCIF_OSCCTRL32_STARTUP_SHIFT) /* 524288 4.6 s */
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@ -48,6 +48,9 @@
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#include "up_internal.h"
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#include "chip/sam4l_pm.h"
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#include "chip/sam4l_scif.h"
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#include "chip/sam4l_bpm.h"
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#include "chip/sam4l_bscif.h"
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#include "chip/sam4l_flashcalw.h"
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#include "sam_clockconfig.h"
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@ -82,7 +85,7 @@
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#ifdef NEED_OSC0
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# if !defined(BOARD_OSC0_STARTUP_US)
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# error BOARD_OSC0_STARTUP_US is not defined
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# if BOARD_OSC0_STARTUP_US == 0
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# elif BOARD_OSC0_STARTUP_US == 0
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# define OSC0_STARTUP_VALUE SCIF_OSCCTRL0_STARTUP_0
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# define OSC0_STARTUP_TIMEOUT 8
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# elif BOARD_OSC0_STARTUP_US <= 557
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@ -141,6 +144,109 @@
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#endif
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#ifdef NEED_OSC32K
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# if !defined(BOARD_OSC32_STARTUP_US)
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# error BOARD_OSC32_STARTUP_US is not defined
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# elif BOARD_OSC32_STARTUP_US == 0
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# define OSC32_STARTUP_VALUE BSCIF_OSCCTRL32_STARTUP_0
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# elif BOARD_OSC32_STARTUP_US <= 1100
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# define OSC32_STARTUP_VALUE BSCIF_OSCCTRL32_STARTUP_128
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# elif BOARD_OSC32_STARTUP_US <= 72300
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# define OSC32_STARTUP_VALUE BSCIF_OSCCTRL32_STARTUP_8K
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# elif BOARD_OSC32_STARTUP_US <= 143000
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# define OSC32_STARTUP_VALUE BSCIF_OSCCTRL32_STARTUP_16K
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# elif BOARD_OSC32_STARTUP_US <= 570000
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# define OSC32_STARTUP_VALUE BSCIF_OSCCTRL32_STARTUP_64K
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# elif BOARD_OSC32_STARTUP_US <= 1100000
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# define OSC32_STARTUP_VALUE BSCIF_OSCCTRL32_STARTUP_128K
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# elif BOARD_OSC32_STARTUP_US <= 2300000
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# define OSC32_STARTUP_VALUE BSCIF_OSCCTRL32_STARTUP_256K
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# elif BOARD_OSC32_STARTUP_US <= 4600000
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# define OSC32_STARTUP_VALUE BSCIF_OSCCTRL32_STARTUP_512K
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# else
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# error BOARD_OSC32_STARTUP_US is out of range
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# endif
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# ifdef BOARD_OSC32_IS_XTAL
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# define OSC32_MODE_VALUE BSCIF_OSCCTRL32_MODE_XTAL
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# else
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# define OSC32_MODE_VALUE BSCIF_OSCCTRL32_MODE_EXTCLK
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# endif
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# ifndef BOARD_OSC32_SELCURR
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# define BOARD_OSC32_SELCURR BSCIF_OSCCTRL32_SELCURR_300
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# endif
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#endif
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/* RC80M. This might be the system clock or the source clock for the DFPLL.
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*
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* By selecting CONFIG_SAM_RC80M, you can also force the clock to be enabled
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* at boot time.
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*/
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#if defined(CONFIG_SAM_RC80M) || defined(BOARD_SYSCLK_SOURCE_RC80M) || \
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defined(BOARD_DFLL0_SOURCE_RC80M)
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# define NEED_RC80M 1
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#endif
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/* RCFAST. The 12/8/4 fast RC oscillator may be used as the system clock.
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* If not then, it may be enabled by setting the CONFIG_SAM_RCFASTxM
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* configuration variable.
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*/
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#if defined(CONFIG_SAM_RCFAST12M)
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# undef CONFIG_SAM_RCFAST8M
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# undef CONFIG_SAM_RCFAST4M
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#elif defined(CONFIG_SAM_RCFAST8M)
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# undef CONFIG_SAM_RCFAST4M
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#endif
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#if defined(BOARD_SYSCLK_SOURCE_FCFAST12M)
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# if defined(CONFIG_SAM_RCFAST8M) || defined(CONFIG_SAM_RCFAST4M)
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# error BOARD_SYSCLK_SOURCE_FCFAST12M inconsistent with CONFIG_SAM_RCFAST8/4M
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# endif
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# define NEED_RCFAST
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# define RCFAST_RANGE SCIF_RCFASTCFG_FRANGE_12MHZ
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#elif defined(BOARD_SYSCLK_SOURCE_FCFAST8M)
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# if defined(CONFIG_SAM_RCFAST12M) || defined(CONFIG_SAM_RCFAST4M)
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# error BOARD_SYSCLK_SOURCE_FCFAST8M inconsistent with CONFIG_SAM_RCFAST12/4M
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# endif
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# define NEED_RCFAST
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# define RCFAST_RANGE SCIF_RCFASTCFG_FRANGE_8MHZ
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#elif defined(BOARD_SYSCLK_SOURCE_FCFAST4M)
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# if defined(CONFIG_SAM_RCFAST12M) || defined(CONFIG_SAM_RCFAST8M)
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# error BOARD_SYSCLK_SOURCE_FCFAST4M inconsistent with CONFIG_SAM_RCFAST12/8M
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# endif
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# define NEED_RCFAST
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# define RCFAST_RANGE SCIF_RCFASTCFG_FRANGE_4MHZ
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#elif defined(CONFIG_SAM_RCFAST12M)
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# define NEED_RCFAST
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# define RCFAST_RANGE SCIF_RCFASTCFG_FRANGE_12MHZ
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#elif defined(CONFIG_SAM_RCFAST8M)
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# define NEED_RCFAST
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# define RCFAST_RANGE SCIF_RCFASTCFG_FRANGE_8MHZ
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#elif defined(CONFIG_SAM_RCFAST4M)
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# define NEED_RCFAST
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# define RCFAST_RANGE SCIF_RCFASTCFG_FRANGE_4MHZ
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#endif
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/* RC1M. The 1M RC oscillator may be used as the system block.
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*
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* By selecting CONFIG_SAM_RC1M, you can also force the clock to be
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* enabled at boot time.
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*/
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#if defined(CONFIG_SAM_RC1M) || defined(BOARD_SYSCLK_SOURCE_RC1M)
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# define NEED_RC1M 1
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#endif
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/* RC32K. The 32KHz RC oscillator may be used as the input to DFLL0.
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*
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* By selecting CONFIG_SAM_RC32K, you can also force the clock to be
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* enabled at boot time.
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*/
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#if defined(CONFIG_SAM_RC32K) || defined(BOARD_DFLL0_SOURCE_RC32K)
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# define NEED_RC32K 1
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#endif
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/****************************************************************************
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@ -188,36 +294,6 @@ static inline void sam_picocache(void)
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# define sam_picocache()
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#endif
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/****************************************************************************
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* Name: sam_enableosc32
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*
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* Description:
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* Initialiaze the 32KHz oscillator. This oscillator is used by the RTC
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* logic to provide the sysem timer.
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*
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****************************************************************************/
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#ifdef NEED_OSC32K
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static inline void sam_enableosc32(void)
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{
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uint32_t regval;
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/* Select the 32KHz oscillator crystal */
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regval = getreg32(SAM_PM_OSCCTRL32);
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regval &= ~PM_OSCCTRL32_MODE_MASK;
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regval |= PM_OSCCTRL32_MODE_XTAL;
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putreg32(regval, SAM_PM_OSCCTRL32);
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/* Enable the 32-kHz clock */
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regval = getreg32(SAM_PM_OSCCTRL32);
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regval &= ~PM_OSCCTRL32_STARTUP_MASK;
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regval |= PM_OSCCTRL32_EN|(SAM_OSC32STARTUP << PM_OSCCTRL32_STARTUP_SHIFT);
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putreg32(regval, SAM_PM_OSCCTRL32);
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}
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#endif
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/****************************************************************************
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* Name: sam_enableosc0
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*
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@ -249,6 +325,169 @@ static inline void sam_enableosc0(void)
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}
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#endif
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/****************************************************************************
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* Name: sam_enableosc32
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*
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* Description:
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* Initialiaze the 32KHz oscillator per settings in the board.h header
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* file.
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*
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****************************************************************************/
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#ifdef NEED_OSC32K
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static inline void sam_enableosc32(void)
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{
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irqstate_t flags;
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uint32_t regval;
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/* Set up the OSCCTRL32 register using settings from the board.h file.
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* Also enable the oscillator and provide bother the 32KHz and 1KHz output.
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*/
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regval = OSC32_STARTUP_VALUE | BOARD_OSC32_SELCURR | OSC32_MODE_VALUE |
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BSCIF_OSCCTRL32_EN1K | BSCIF_OSCCTRL32_EN32K |
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BSCIF_OSCCTRL32_OSC32EN;
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/* The following two statements must be atomic */
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flags = irqsave();
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putreg32(BSCIF_UNLOCK_KEY(0xaa) | BSCIF_UNLOCK_ADDR(SAM_BSCIF_OSCCTRL32_OFFSET),
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SAM_BSCIF_UNLOCK);
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putreg32(regval, SAM_BSCIF_OSCCTRL32);
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irqrestore(flags);
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/* Wait for OSC32 to be ready */
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while (getreg32(SAM_BSCIF_PCLKSR) & BSCIF_INT_OSC32RDY) == 0);
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}
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#endif
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/****************************************************************************
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* Name: sam_enablerc80m
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*
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* Description:
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* Initialiaze the 80 MHz RC oscillator per settings in the board.h header
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* file.
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*
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****************************************************************************/
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#ifdef NEED_RC80M
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static inline void sam_enablerc80m(void)
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{
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irqstate_t flags;
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uint32_t regval;
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/* The following two statements must be atomic */
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flags = irqsave();
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regval = getreg32(SAM_SCIF_RC80MCR);
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putreg32(SCIF_UNLOCK_KEY(0xaa) | SCIF_UNLOCK_ADDR(SAM_SCIF_RC80MCR_OFFSET),
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SAM_SCIF_UNLOCK);
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putreg32(regval | SCIF_RC80MCR_EN, SAM_SCIF_RC80MCR);
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irqrestore(flags);
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/* Wait for OSC32 to be ready */
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while (getreg32(SAM_SCIF_RC80MCR) & SCIF_RC80MCR_EN) == 0);
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}
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#endif
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/****************************************************************************
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* Name: sam_enablerc80m
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*
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* Description:
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* Initialiaze the 12/8/4 RC fast oscillator per settings in the board.h
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* header file.
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*
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****************************************************************************/
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#ifdef NEED_RCFAST
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static inline void sam_enablercfast(void)
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{
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irqstate_t flags;
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uint32_t regval;
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/* The following must be atomic */
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flags = irqsave();
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regval = getreg32(SAM_SCIF_RCFASTCFG);
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regval &= ~SCIF_RCFASTCFG_FRANGE_MASK;
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regval |= (RCFAST_RANGE | SCIF_RCFASTCFG_EN);
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putreg32(SCIF_UNLOCK_KEY(0xaa) | SCIF_UNLOCK_ADDR(SAM_SCIF_RCFASTCFG_OFFSET),
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SAM_SCIF_UNLOCK);
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putreg32(regval, SAM_SCIF_RCFASTCFG);
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irqrestore(flags);
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/* Wait for RCFAST to be ready */
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while (getreg32(SAM_SCIF_RCFASTCFG) & SCIF_RCFASTCFG_EN) == 0);
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}
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#endif
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/****************************************************************************
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* Name: sam_enablerc1m
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*
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* Description:
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* Initialiaze the 1M RC oscillator per settings in the board.h header
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* file.
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*
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****************************************************************************/
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#ifdef NEED_RC1M
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static inline void sam_enablerc1m(void)
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{
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irqstate_t flags;
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uint32_t regval;
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/* The following must be atomic */
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flags = irqsave();
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regval = getreg32(SAM_BSCIF_RC1MCR);
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regval &= ~BSCIF_RCFASTCFG_FRANGE_MASK;
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regval |= (RCFAST_RANGE | BSCIF_RCFASTCFG_EN);
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putreg32(BSCIF_UNLOCK_KEY(0xaa) | BSCIF_UNLOCK_ADDR(SAM_BSCIF_RC1MCR_OFFSET),
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SAM_BSCIF_UNLOCK);
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putreg32(regval | BSCIF_RC1MCR_CLKOEN, SAM_BSCIF_RC1MCR);
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irqrestore(flags);
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/* Wait for RCFAST to be ready */
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while (getreg32(SAM_BSCIF_RC1MCR) & BSCIF_RC1MCR_CLKOEN) == 0);
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}
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#endif
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/****************************************************************************
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* Name: sam_enablerc32k
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*
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* Description:
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* Initialiaze the 23KHz RC oscillator per settings in the board.h header
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* file.
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*
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****************************************************************************/
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#ifdef NEED_RC32K
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void sam_enablerc32k(void)
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{
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irqstate_t flags;
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uint32_t regval;
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/* The following must be atomic */
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flags = irqsave();
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regval = getreg32(SAM_BSCIF_RC32KCR);
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putreg32(BSCIF_UNLOCK_KEY(0xaa) | BSCIF_UNLOCK_ADDR(SAM_BSCIF_RC32KCR_OFFSET),
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SAM_BSCIF_UNLOCK);
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putreg32(regval | BSCIF_RC32KCR_EN32K | BSCIF_RC32KCR_EN, SAM_BSCIF_RC32KCR);
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irqrestore(flags);
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/* Wait for RCFAST to be ready */
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while (getreg32(SAM_BSCIF_RC32KCR) & BSCIF_RC32KCR_EN) == 0);
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}
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#endif
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/****************************************************************************
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* Name: sam_enablepll0
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*
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@ -596,11 +835,38 @@ void sam_clockconfig(void)
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#endif
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#ifdef NEED_OSC32K
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/* Enable the 32KHz oscillator (need by the RTC module) */
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/* Enable the 32KHz oscillator using the settings in board.h */
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sam_enableosc32();
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#endif
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#ifdef NEED_OSC32K
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/* Enable the 32KHz oscillator using the settings in board.h */
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sam_enablerc80m();
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#endif
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#ifdef NEED_RCFAST
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/* Enable the 12/8/4MHz RC fast oscillator using the settings in board.h */
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sam_enablercrcfast();
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#endif
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#ifdef NEED_RC1M
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/* Enable the 1MHz RC oscillator using the settings in board.h */
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sam_enablerc1m();
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#endif
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#ifdef NEED_RC32K
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/* Enable the 32KHz RC oscillator using the settings in board.h */
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sam_enablerc32k();
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#endif
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/* Enable the PLL or FDLL */
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#warning Missing Logic
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/* Switch to the system clock selected by the settings in the board.h
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* header file.
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*/
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