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esp32c3/: Remove unused exported variables from ROM and add declaration

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for the one used.
This commit is contained in:
Abdelatif Guettouche 2022-01-31 13:20:30 +01:00 committed by Xiang Xiao
parent 94fb8f4d2a
commit f49a579721
2 changed files with 8 additions and 12 deletions
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6
arch/risc-v/src/esp32c3/esp32c3_spiflash_mtd.c
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@ -102,12 +102,6 @@ static ssize_t esp32c3_bwrite_encrypt(struct mtd_dev_s *dev,
static int esp32c3_ioctl(struct mtd_dev_s *dev, int cmd,
unsigned long arg);
/****************************************************************************
* Public Data
****************************************************************************/
extern const struct spiflash_legacy_data_s *rom_spiflash_legacy_data;
/****************************************************************************
* Private Data
****************************************************************************/

14
arch/risc-v/src/esp32c3/rom/esp32c3_spiflash.h
View File

@ -989,7 +989,8 @@ int spi_flash_erase_range(uint32_t start_address, uint32_t size);
*
* Returned Values:
* Return true if both CPUs have flash cache enabled, false otherwise.
*/
*
*****************************************************************************/
bool spi_flash_cache_enabled(void);
@ -1001,15 +1002,16 @@ bool spi_flash_cache_enabled(void);
*
* Parameters:
* cpuid - core number to enable instruction cache for.
*/
*
*****************************************************************************/
void spi_flash_enable_cache(uint32_t cpuid);
/* Global esp32c3_spiflash_chip_t structure used by ROM functions */
/*****************************************************************************
* Public Data
*****************************************************************************/
extern esp32c3_spiflash_chip_t g_rom_flashchip;
extern uint8_t g_rom_spiflash_dummy_len_plus[];
extern const struct spiflash_legacy_data_s *rom_spiflash_legacy_data;
#ifdef __cplusplus
}