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SAMA5Dx UART: SAMAD4 also has BRSRCCK bit in the MR register

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Gregory Nutt 2015-09-11 08:27:00 -06:00
parent 9b55b91fea
commit f51541dfd6
1 changed files with 5 additions and 3 deletions
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8
arch/arm/src/sama5/chip/sam_uart.h
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@ -354,11 +354,13 @@
# define UART_MR_PAR_MULTIDROP (6 << UART_MR_PAR_SHIFT) /* Multidrop mode (2) */
# endif
#if defined(ATSAMA5D2)
# define UART_MR_BRSRCCK (1 << 12) /* Bit 12: Baud Rate Source Clock */
#if defined(ATSAMA5D2) || defined(ATSAMA5D4)
# define UART_MR_BRSRCCK (1 << 12) /* Bit 12: Baud Rate Source Clock (UART only) */
# define UART_MR_PERIPHCLK (0) /* Bit 12: 0=Peripheral clock */
# define UART_MR_PMCPCK (1 << 12) /* Bit 12: 1=PMC programmable clock */
#elif defined(ATSAMA5D3) ||defined(ATSAMA5D4)
#endif
#if defined(ATSAMA5D3) || defined(ATSAMA5D4)
# define UART_MR_NBSTOP_SHIFT (12) /* Bits 12-13: Number of Stop Bits (2) */
# define UART_MR_NBSTOP_MASK (3 << UART_MR_NBSTOP_SHIFT)
# define UART_MR_NBSTOP_1 (0 << UART_MR_NBSTOP_SHIFT) /* 1 stop bit 1 stop bit */