Fix compilation and fix SAM_DMAC_CHINTENCLR settings
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@ -137,9 +137,9 @@ static struct sam_dmach_s g_dmach[SAMD2L2_NDMACHAN];
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*/
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static struct dma_desc_s g_base_desc[SAMD2L2_NDMACHAN]
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locate_data(".lpram"), aligned(16);
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locate_data(".lpram") aligned_data(16);
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static struct dma_desc_s g_writeback_desc[SAMD2L2_NDMACHAN]
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locate_data(".lpram"), aligned(16);
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locate_data(".lpram") aligned_data(16);
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#if CONFIG_SAMD2L2_DMAC_NDESC > 0
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/* Additional DMA descriptors for (optional) multi-block transfer support.
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@ -147,7 +147,7 @@ static struct dma_desc_s g_writeback_desc[SAMD2L2_NDMACHAN]
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*/
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static struct dma_desc_s g_dma_desc[CONFIG_SAMD2L2_DMAC_NDESC]
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locate_data(".lpram"), aligned(16);
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locate_data(".lpram") aligned_data(16);
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#endif
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/****************************************************************************
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@ -178,7 +178,7 @@ static void sam_dmaterminate(struct sam_dmach_s *dmach, int result)
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/* Disable all channel interrupts */
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putreg8(1 << dmach->dc_chan, SAM_DMAC_CHINTENCLR);
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putreg8(DMAC_INT_ALL, SAM_DMAC_CHINTENCLR);
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leave_critical_section(flags);
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/* Free the DMA descriptor list */
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@ -833,7 +833,7 @@ DMA_HANDLE sam_dmachannel(uint32_t chflags)
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/* Disable all channel interrupts */
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putreg8(1 << chndx, SAM_DMAC_CHINTENCLR);
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putreg8(DMAC_INT_ALL, SAM_DMAC_CHINTENCLR);
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leave_critical_section(flags);
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break;
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}
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@ -31,8 +31,6 @@
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#include "chip.h"
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#include "hardware/sam_dmac.h"
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#ifdef CONFIG_SAMD2L2_DMAC
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#if defined(CONFIG_ARCH_FAMILY_SAMD20) || defined(CONFIG_ARCH_FAMILY_SAMD21)
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