Squashed commit of the following:
arch/arm/src/tiva/hardware: Add CC13xx SMPH and AUX SMPH header files. Still need DDI0 OSC header file for CC13x0 compilation.
arch/arm/src/tiva/cc13xx: A few changes toward getting the launchxl-cc1310/nsh configuration to build
This commit is contained in:
Gregory Nutt
parent
6d2b832ccc
commit
f546801fb3
@ -285,7 +285,6 @@ config ARCH_CHIP_SIMPLELINK
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bool "TI SimpleLink"
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select ARCH_HAVE_MPU
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select ARM_HAVE_MPU_UNIFIED
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select ARCH_HAVE_FPU
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select ARCH_HAVE_FETCHADD
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depends on EXPERIMENTAL
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---help---
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@ -41,11 +41,22 @@
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#ifndef __ARCH_ARM_SRC_TIVA_CC13XX_CC13X0_ROM_H
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#define __ARCH_ARM_SRC_TIVA_CC13XX_CC13X0_ROM_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <stdint.h>
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#include <nuttx/irq.h>
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#include "hardware/tiva_aux_smph.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Start address of the ROM hard API access table (located after the ROM FW rev field) */
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/* Start address of the ROM hard API access table (located after the ROM FW rev
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* field)
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*/
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#define ROM_HAPI_TABLE_ADDR 0x10000048
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@ -65,11 +76,16 @@
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/* REVISIT: In the TI Driverlib, the following go through a "Safe" layer */
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#define hapi_source_safeswitch() P_HARD_API->hf_source_safeswitch()
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#define hapi_select_compa_input(a) P_HARD_API->select_compa_input(a)
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#define hapi_select_compa_ref(a) P_HARD_API->select_compa_ref(a)
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#define hapi_select_adc_compb_input(a) P_HARD_API->select_adc_compb_input(a)
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#define hapi_select_adc_compb_ref(a) P_HARD_API->select_adc_compb_ref(a)
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#define hapi_source_safeswitch() \
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rom_hapi_void(P_HARD_API->hf_source_safe_switch)
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#define hapi_select_compa_input(a) \
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rom_hapi_auxadiselect(P_HARD_API->select_compa_input,(a))
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#define hapi_select_compa_ref(a) \
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rom_hapi_auxadiselect(P_HARD_API->select_compa_ref,(a))
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#define hapi_select_adc_compb_input(a) \
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rom_hapi_auxadiselect(P_HARD_API->select_adc_compb_input,(a))
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#define hapi_select_adc_compb_ref(a) \
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rom_hapi_auxadiselect(P_HARD_API->select_adc_compb_iref,(a))
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/* Defines for input parameter to the hapi_select_compa_input function.
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* The define values can not be changed!
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@ -643,6 +659,11 @@ typedef void (*fptr_adccompbin_t) (uint8_t /* signal */);
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typedef void (*fptr_compbref_t) (uint8_t /* signal */);
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/* Types used in the "Safe" interfaces taken from the TI DriverLib hw_types.h */
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typedef void (*fptr_void_void_t) (void);
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typedef void (*fptr_void_uint8_t) (uint8_t);
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/* ROM Hard-API access table type */
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struct hard_api_s
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@ -712,7 +733,7 @@ void rom_setup_aonrtc_subsecinc(uint32_t subsecinc);
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* vddrtrim - VDDR_TRIM setting
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*
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* Returned Value:
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* Returns sign extended VDDR_TRIM setting.
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* Returns sign extended VDDR_TRIM setting.
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*
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************************************************************************************/
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@ -731,5 +752,44 @@ static inline int32_t rom_signextend_vddrtrim(uint32_t vddrtrim)
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return signed_vaddrtrim;
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}
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/************************************************************************************
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* Name: rom_hapi_void and rom_hapi_auxadiselect
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*
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* Description:
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* Work-arounds for bus arbitration issue.
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* REVISIT: Originally for the adi.h header file in the TI DriverLib
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*
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* Input Parameters
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* fptr - Function pointer
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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inline static void rom_hapi_void(fptr_void_void_t fptr)
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{
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irqstate_t flags = enter_critical_section();
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while (getreg32(TIVA_AUX_SMPH_SMPH0) == 0)
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{
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}
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fptr();
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putreg32(1, TIVA_AUX_SMPH_SMPH0);
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leave_critical_section(flags);
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}
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inline static void rom_hapi_auxadiselect(fptr_void_uint8_t fptr, uint8_t signal)
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{
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irqstate_t flags = enter_critical_section();
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while (getreg32(TIVA_AUX_SMPH_SMPH0) == 0)
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{
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}
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fptr(signal);
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putreg32(1, TIVA_AUX_SMPH_SMPH0);
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leave_critical_section(flags);
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}
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#endif /* __ARCH_ARM_SRC_TIVA_CC13XX_CC13X0_ROM_H */
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@ -45,7 +45,9 @@
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* Pre-processor Definitions
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************************************************************************************/
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/* Start address of the ROM hard API access table (located after the ROM FW rev field) */
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/* Start address of the ROM hard API access table (located after the ROM FW rev
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* field)
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*/
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#define ROM_HAPI_TABLE_ADDR 0x10000048
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@ -45,7 +45,9 @@
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* Pre-processor Definitions
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************************************************************************************/
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/* Start address of the ROM hard API access table (located after the ROM FW rev field) */
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/* Start address of the ROM hard API access table (located after the ROM FW rev
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* field)
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*/
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#define ROM_HAPI_TABLE_ADDR 0x10000048
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@ -114,7 +114,7 @@
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# define ADI4_AUX_MUX1_COMPA_IN_AUXIO5 (4 << ADI4_AUX_MUX1_COMPA_IN_SHIFT)
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# define ADI4_AUX_MUX1_COMPA_IN_AUXIO4 (8 << ADI4_AUX_MUX1_COMPA_IN_SHIFT)
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# define ADI4_AUX_MUX1_COMPA_IN_AUXIO3 (16 << ADI4_AUX_MUX1_COMPA_IN_SHIFT)
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# define ADI4_AUX_MUX1_COMPA_IN_AUXIO1 (32 << ADI4_AUX_MUX1_COMPA_IN_SHIFT)
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# define ADI4_AUX_MUX1_COMPA_IN_AUXIO2 (32 << ADI4_AUX_MUX1_COMPA_IN_SHIFT)
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# define ADI4_AUX_MUX1_COMPA_IN_AUXIO1 (64 << ADI4_AUX_MUX1_COMPA_IN_SHIFT)
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# define ADI4_AUX_MUX1_COMPA_IN_AUXIO0 (128 << ADI4_AUX_MUX1_COMPA_IN_SHIFT)
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104
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_smph.h
Normal file
104
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_smph.h
Normal file
@ -0,0 +1,104 @@
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/****************************************************************************
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* arch/arm/src/tiva/hardware/cc13x0/cc13x0_aux_smph.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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*
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* Technical content derives from a TI header file that has a compatible BSD license:
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*
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* Copyright (c) 2015-2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AUX_SMPH_H
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#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AUX_SMPH_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "hardware/tiva_memorymap.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* AUX SMPH Register Offsets ************************************************/
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#define TIVA_AUX_SMPH_SMPH_OFFSET (0x0000 + ((n) << 2)
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# define TIVA_AUX_SMPH_SMPH0_OFFSET 0x0000 /* Semaphore 0 */
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# define TIVA_AUX_SMPH_SMPH1_OFFSET 0x0004 /* Semaphore 1 */
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# define TIVA_AUX_SMPH_SMPH2_OFFSET 0x0008 /* Semaphore 2 */
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# define TIVA_AUX_SMPH_SMPH3_OFFSET 0x000c /* Semaphore 3 */
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# define TIVA_AUX_SMPH_SMPH4_OFFSET 0x0010 /* Semaphore 4 */
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# define TIVA_AUX_SMPH_SMPH5_OFFSET 0x0014 /* Semaphore 5 */
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# define TIVA_AUX_SMPH_SMPH6_OFFSET 0x0018 /* Semaphore 6 */
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# define TIVA_AUX_SMPH_SMPH7_OFFSET 0x001c /* Semaphore 7 */
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#define TIVA_AUX_SMPH_AUTOTAKE_OFFSET 0x0020 /* Auto Take */
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/* AUX SMPH Register Addresses **********************************************/
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#define TIVA_AUX_SMPH_SMPH(n) (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH_OFFSET(n))
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# define TIVA_AUX_SMPH_SMPH0 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH0_OFFSET)
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# define TIVA_AUX_SMPH_SMPH1 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH1_OFFSET)
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# define TIVA_AUX_SMPH_SMPH2 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH2_OFFSET)
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# define TIVA_AUX_SMPH_SMPH3 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH3_OFFSET)
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# define TIVA_AUX_SMPH_SMPH4 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH4_OFFSET)
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# define TIVA_AUX_SMPH_SMPH5 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH5_OFFSET)
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# define TIVA_AUX_SMPH_SMPH6 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH6_OFFSET)
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# define TIVA_AUX_SMPH_SMPH7 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH7_OFFSET)
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#define TIVA_AUX_SMPH_AUTOTAKE (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_AUTOTAKE_OFFSET)
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/* AUX SMPH Register Bitfield Definitions **(********************************/
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/* TIVA_AUX_SMPH_SMPH0-TIVA_AUX_SMPH_SMPH7 */
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#define AUX_SMPH_SMPH_STAT (1 << 0) /* Bit 0: Semaphore granted */
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# define AUX_SMPH_SMPH0_STAT AUX_SMPH_SMPH_STAT
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# define AUX_SMPH_SMPH1_STAT AUX_SMPH_SMPH_STAT
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# define AUX_SMPH_SMPH2_STAT AUX_SMPH_SMPH_STAT
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# define AUX_SMPH_SMPH3_STAT AUX_SMPH_SMPH_STAT
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# define AUX_SMPH_SMPH4_STAT AUX_SMPH_SMPH_STAT
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# define AUX_SMPH_SMPH5_STAT AUX_SMPH_SMPH_STAT
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# define AUX_SMPH_SMPH6_STAT AUX_SMPH_SMPH_STAT
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# define AUX_SMPH_SMPH7_STAT AUX_SMPH_SMPH_STAT
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/* TIVA_AUX_SMPH_AUTOTAKE */
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#define AUX_SMPH_AUTOTAKE_SMPH_ID_SHIFT (0) /* Bits 0-7: Write the semaphore
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* ID 0-7 to SMPH_ID to request
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* semaphore until AUX_EVCTL:EVSTAT3.
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* AUX_SMPH_AUTOTAKE_DONE */
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#define AUX_SMPH_AUTOTAKE_SMPH_ID_MASK (7 << AUX_SMPH_AUTOTAKE_SMPH_ID_SHIFT)
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# define AUX_SMPH_AUTOTAKE_SMPH_ID(n) ((uint32_t)(n) << AUX_SMPH_AUTOTAKE_SMPH_ID_SHIFT)
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#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AUX_SMPH_H */
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@ -46,6 +46,7 @@
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****************************************************************************************************/
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#include <nuttx/config.h>
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#include "hardware/tiva_memorymap.h"
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/****************************************************************************************************
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* Pre-processor Definitions
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269
arch/arm/src/tiva/hardware/cc13x0/cc13x0_smph.h
Normal file
269
arch/arm/src/tiva/hardware/cc13x0/cc13x0_smph.h
Normal file
@ -0,0 +1,269 @@
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/****************************************************************************
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* arch/arm/src/tiva/hardware/cc13x0/cc13x0_smph.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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*
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* Technical content derives from a TI header file that has a compatible BSD license:
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*
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* Copyright (c) 2015-2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
|
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* used to endorse or promote products derived from this software
|
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* without specific prior written permission.
|
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_SMPH_H
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#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_SMPH_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "hardware/tiva_memorymap.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* SMPH Register Offsets ****************************************************/
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#define TIVA_SMPH_SMPH_OFFSET(n) (0x0000 + ((n) << 2))
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# define TIVA_SMPH_SMPH0_OFFSET 0x0000 /* MCU SEMAPHORE 0 */
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# define TIVA_SMPH_SMPH1_OFFSET 0x0004 /* MCU SEMAPHORE 1 */
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# define TIVA_SMPH_SMPH2_OFFSET 0x0008 /* MCU SEMAPHORE 2 */
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# define TIVA_SMPH_SMPH3_OFFSET 0x000c /* MCU SEMAPHORE 3 */
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# define TIVA_SMPH_SMPH4_OFFSET 0x0010 /* MCU SEMAPHORE 4 */
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# define TIVA_SMPH_SMPH5_OFFSET 0x0014 /* MCU SEMAPHORE 5 */
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# define TIVA_SMPH_SMPH6_OFFSET 0x0018 /* MCU SEMAPHORE 6 */
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# define TIVA_SMPH_SMPH7_OFFSET 0x001c /* MCU SEMAPHORE 7 */
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# define TIVA_SMPH_SMPH8_OFFSET 0x0020 /* MCU SEMAPHORE 8 */
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# define TIVA_SMPH_SMPH9_OFFSET 0x0024 /* MCU SEMAPHORE 9 */
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# define TIVA_SMPH_SMPH10_OFFSET 0x0028 /* MCU SEMAPHORE 10 */
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# define TIVA_SMPH_SMPH11_OFFSET 0x002c /* MCU SEMAPHORE 11 */
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# define TIVA_SMPH_SMPH12_OFFSET 0x0030 /* MCU SEMAPHORE 12 */
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# define TIVA_SMPH_SMPH13_OFFSET 0x0034 /* MCU SEMAPHORE 13 */
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# define TIVA_SMPH_SMPH14_OFFSET 0x0038 /* MCU SEMAPHORE 14 */
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# define TIVA_SMPH_SMPH15_OFFSET 0x003c /* MCU SEMAPHORE 15 */
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# define TIVA_SMPH_SMPH16_OFFSET 0x0040 /* MCU SEMAPHORE 16 */
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# define TIVA_SMPH_SMPH17_OFFSET 0x0044 /* MCU SEMAPHORE 17 */
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# define TIVA_SMPH_SMPH18_OFFSET 0x0048 /* MCU SEMAPHORE 18 */
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# define TIVA_SMPH_SMPH19_OFFSET 0x004c /* MCU SEMAPHORE 19 */
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# define TIVA_SMPH_SMPH20_OFFSET 0x0050 /* MCU SEMAPHORE 20 */
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# define TIVA_SMPH_SMPH21_OFFSET 0x0054 /* MCU SEMAPHORE 21 */
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# define TIVA_SMPH_SMPH22_OFFSET 0x0058 /* MCU SEMAPHORE 22 */
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# define TIVA_SMPH_SMPH23_OFFSET 0x005c /* MCU SEMAPHORE 23 */
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# define TIVA_SMPH_SMPH24_OFFSET 0x0060 /* MCU SEMAPHORE 24 */
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# define TIVA_SMPH_SMPH25_OFFSET 0x0064 /* MCU SEMAPHORE 25 */
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# define TIVA_SMPH_SMPH26_OFFSET 0x0068 /* MCU SEMAPHORE 26 */
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# define TIVA_SMPH_SMPH27_OFFSET 0x006c /* MCU SEMAPHORE 27 */
|
||||
# define TIVA_SMPH_SMPH28_OFFSET 0x0070 /* MCU SEMAPHORE 28 */
|
||||
# define TIVA_SMPH_SMPH29_OFFSET 0x0074 /* MCU SEMAPHORE 29 */
|
||||
# define TIVA_SMPH_SMPH30_OFFSET 0x0078 /* MCU SEMAPHORE 30 */
|
||||
# define TIVA_SMPH_SMPH31_OFFSET 0x007c /* MCU SEMAPHORE 31 */
|
||||
|
||||
#define TIVA_SMPH_PEEK_OFFSET(n) (0x0800 + ((n) << 2))
|
||||
# define TIVA_SMPH_PEEK0_OFFSET 0x0800 /* MCU SEMAPHORE 0 ALIAS */
|
||||
# define TIVA_SMPH_PEEK1_OFFSET 0x0804 /* MCU SEMAPHORE 1 ALIAS */
|
||||
# define TIVA_SMPH_PEEK2_OFFSET 0x0808 /* MCU SEMAPHORE 2 ALIAS */
|
||||
# define TIVA_SMPH_PEEK3_OFFSET 0x080c /* MCU SEMAPHORE 3 ALIAS */
|
||||
# define TIVA_SMPH_PEEK4_OFFSET 0x0810 /* MCU SEMAPHORE 4 ALIAS */
|
||||
# define TIVA_SMPH_PEEK5_OFFSET 0x0814 /* MCU SEMAPHORE 5 ALIAS */
|
||||
# define TIVA_SMPH_PEEK6_OFFSET 0x0818 /* MCU SEMAPHORE 6 ALIAS */
|
||||
# define TIVA_SMPH_PEEK7_OFFSET 0x081c /* MCU SEMAPHORE 7 ALIAS */
|
||||
# define TIVA_SMPH_PEEK8_OFFSET 0x0820 /* MCU SEMAPHORE 8 ALIAS */
|
||||
# define TIVA_SMPH_PEEK9_OFFSET 0x0824 /* MCU SEMAPHORE 9 ALIAS */
|
||||
# define TIVA_SMPH_PEEK10_OFFSET 0x0828 /* MCU SEMAPHORE 10 ALIAS */
|
||||
# define TIVA_SMPH_PEEK11_OFFSET 0x082c /* MCU SEMAPHORE 11 ALIAS */
|
||||
# define TIVA_SMPH_PEEK12_OFFSET 0x0830 /* MCU SEMAPHORE 12 ALIAS */
|
||||
# define TIVA_SMPH_PEEK13_OFFSET 0x0834 /* MCU SEMAPHORE 13 ALIAS */
|
||||
# define TIVA_SMPH_PEEK14_OFFSET 0x0838 /* MCU SEMAPHORE 14 ALIAS */
|
||||
# define TIVA_SMPH_PEEK15_OFFSET 0x083c /* MCU SEMAPHORE 15 ALIAS */
|
||||
# define TIVA_SMPH_PEEK16_OFFSET 0x0840 /* MCU SEMAPHORE 16 ALIAS */
|
||||
# define TIVA_SMPH_PEEK17_OFFSET 0x0844 /* MCU SEMAPHORE 17 ALIAS */
|
||||
# define TIVA_SMPH_PEEK18_OFFSET 0x0848 /* MCU SEMAPHORE 18 ALIAS */
|
||||
# define TIVA_SMPH_PEEK19_OFFSET 0x084c /* MCU SEMAPHORE 19 ALIAS */
|
||||
# define TIVA_SMPH_PEEK20_OFFSET 0x0850 /* MCU SEMAPHORE 20 ALIAS */
|
||||
# define TIVA_SMPH_PEEK21_OFFSET 0x0854 /* MCU SEMAPHORE 21 ALIAS */
|
||||
# define TIVA_SMPH_PEEK22_OFFSET 0x0858 /* MCU SEMAPHORE 22 ALIAS */
|
||||
# define TIVA_SMPH_PEEK23_OFFSET 0x085c /* MCU SEMAPHORE 23 ALIAS */
|
||||
# define TIVA_SMPH_PEEK24_OFFSET 0x0860 /* MCU SEMAPHORE 24 ALIAS */
|
||||
# define TIVA_SMPH_PEEK25_OFFSET 0x0864 /* MCU SEMAPHORE 25 ALIAS */
|
||||
# define TIVA_SMPH_PEEK26_OFFSET 0x0868 /* MCU SEMAPHORE 26 ALIAS */
|
||||
# define TIVA_SMPH_PEEK27_OFFSET 0x086c /* MCU SEMAPHORE 27 ALIAS */
|
||||
# define TIVA_SMPH_PEEK28_OFFSET 0x0870 /* MCU SEMAPHORE 28 ALIAS */
|
||||
# define TIVA_SMPH_PEEK29_OFFSET 0x0874 /* MCU SEMAPHORE 29 ALIAS */
|
||||
# define TIVA_SMPH_PEEK30_OFFSET 0x0878 /* MCU SEMAPHORE 30 ALIAS */
|
||||
# define TIVA_SMPH_PEEK31_OFFSET 0x087c /* MCU SEMAPHORE 31 ALIAS */
|
||||
|
||||
/* SMPH Register Addresses **************************************************/
|
||||
|
||||
#define TIVA_SMPH_SMPH(n) (TIVA_SMPH_BASE + TIVA_SMPH_SMPH_OFFSET(n))
|
||||
# define TIVA_SMPH_SMPH0 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH0_OFFSET)
|
||||
# define TIVA_SMPH_SMPH1 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH1_OFFSET)
|
||||
# define TIVA_SMPH_SMPH2 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH2_OFFSET)
|
||||
# define TIVA_SMPH_SMPH3 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH3_OFFSET)
|
||||
# define TIVA_SMPH_SMPH4 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH4_OFFSET)
|
||||
# define TIVA_SMPH_SMPH5 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH5_OFFSET)
|
||||
# define TIVA_SMPH_SMPH6 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH6_OFFSET)
|
||||
# define TIVA_SMPH_SMPH7 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH7_OFFSET)
|
||||
# define TIVA_SMPH_SMPH8 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH8_OFFSET)
|
||||
# define TIVA_SMPH_SMPH9 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH9_OFFSET)
|
||||
# define TIVA_SMPH_SMPH10 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH10_OFFSET)
|
||||
# define TIVA_SMPH_SMPH11 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH11_OFFSET)
|
||||
# define TIVA_SMPH_SMPH12 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH12_OFFSET)
|
||||
# define TIVA_SMPH_SMPH13 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH13_OFFSET)
|
||||
# define TIVA_SMPH_SMPH14 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH14_OFFSET)
|
||||
# define TIVA_SMPH_SMPH15 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH15_OFFSET)
|
||||
# define TIVA_SMPH_SMPH16 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH16_OFFSET)
|
||||
# define TIVA_SMPH_SMPH17 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH17_OFFSET)
|
||||
# define TIVA_SMPH_SMPH18 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH18_OFFSET)
|
||||
# define TIVA_SMPH_SMPH19 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH19_OFFSET)
|
||||
# define TIVA_SMPH_SMPH20 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH20_OFFSET)
|
||||
# define TIVA_SMPH_SMPH21 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH21_OFFSET)
|
||||
# define TIVA_SMPH_SMPH22 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH22_OFFSET)
|
||||
# define TIVA_SMPH_SMPH23 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH23_OFFSET)
|
||||
# define TIVA_SMPH_SMPH24 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH24_OFFSET)
|
||||
# define TIVA_SMPH_SMPH25 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH25_OFFSET)
|
||||
# define TIVA_SMPH_SMPH26 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH26_OFFSET)
|
||||
# define TIVA_SMPH_SMPH27 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH27_OFFSET)
|
||||
# define TIVA_SMPH_SMPH28 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH28_OFFSET)
|
||||
# define TIVA_SMPH_SMPH29 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH29_OFFSET)
|
||||
# define TIVA_SMPH_SMPH30 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH30_OFFSET)
|
||||
# define TIVA_SMPH_SMPH31 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH31_OFFSET)
|
||||
|
||||
#define TIVA_SMPH_PEEK(n) (TIVA_SMPH_BASE + TIVA_SMPH_PEEK_OFFSET(n))
|
||||
# define TIVA_SMPH_PEEK0 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK0_OFFSET)
|
||||
# define TIVA_SMPH_PEEK1 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK1_OFFSET)
|
||||
# define TIVA_SMPH_PEEK2 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK2_OFFSET)
|
||||
# define TIVA_SMPH_PEEK3 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK3_OFFSET)
|
||||
# define TIVA_SMPH_PEEK4 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK4_OFFSET)
|
||||
# define TIVA_SMPH_PEEK5 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK5_OFFSET)
|
||||
# define TIVA_SMPH_PEEK6 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK6_OFFSET)
|
||||
# define TIVA_SMPH_PEEK7 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK7_OFFSET)
|
||||
# define TIVA_SMPH_PEEK8 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK8_OFFSET)
|
||||
# define TIVA_SMPH_PEEK9 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK9_OFFSET)
|
||||
# define TIVA_SMPH_PEEK10 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK10_OFFSET)
|
||||
# define TIVA_SMPH_PEEK11 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK11_OFFSET)
|
||||
# define TIVA_SMPH_PEEK12 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK12_OFFSET)
|
||||
# define TIVA_SMPH_PEEK13 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK13_OFFSET)
|
||||
# define TIVA_SMPH_PEEK14 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK14_OFFSET)
|
||||
# define TIVA_SMPH_PEEK15 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK15_OFFSET)
|
||||
# define TIVA_SMPH_PEEK16 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK16_OFFSET)
|
||||
# define TIVA_SMPH_PEEK17 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK17_OFFSET)
|
||||
# define TIVA_SMPH_PEEK18 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK18_OFFSET)
|
||||
# define TIVA_SMPH_PEEK19 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK19_OFFSET)
|
||||
# define TIVA_SMPH_PEEK20 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK20_OFFSET)
|
||||
# define TIVA_SMPH_PEEK21 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK21_OFFSET)
|
||||
# define TIVA_SMPH_PEEK22 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK22_OFFSET)
|
||||
# define TIVA_SMPH_PEEK23 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK23_OFFSET)
|
||||
# define TIVA_SMPH_PEEK24 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK24_OFFSET)
|
||||
# define TIVA_SMPH_PEEK25 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK25_OFFSET)
|
||||
# define TIVA_SMPH_PEEK26 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK26_OFFSET)
|
||||
# define TIVA_SMPH_PEEK27 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK27_OFFSET)
|
||||
# define TIVA_SMPH_PEEK28 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK28_OFFSET)
|
||||
# define TIVA_SMPH_PEEK29 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK29_OFFSET)
|
||||
# define TIVA_SMPH_PEEK30 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK30_OFFSET)
|
||||
# define TIVA_SMPH_PEEK31 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK31_OFFSET)
|
||||
|
||||
/* SMPH Register Bitfield Definitions ***************************************/
|
||||
|
||||
/* TIVA_SMPH_SMPH0-TIVA_SMPH_SMPH31 */
|
||||
|
||||
#define SMPH_SMPH_STAT (1 << 0) /* Bit 0: Semaphore is available */
|
||||
# define SMPH_SMPH0_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH1_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH2_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH3_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH4_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH5_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH6_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH7_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH8_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH9_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH10_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH11_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH12_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH13_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH14_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH15_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH16_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH17_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH18_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH19_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH20_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH21_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH22_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH23_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH24_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH25_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH26_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH27_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH28_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH29_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH30_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH31_STAT SMPH_SMPH_STAT
|
||||
|
||||
/* TIVA_SMPH_PEEK0-TIVA_SMPH_PEEK31 */
|
||||
|
||||
#define SMPH_PEEK_STAT (1 << 0) /* Bit 0: Semaphore is available */
|
||||
# define SMPH_PEEK0_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK1_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK2_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK3_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK4_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK5_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK6_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK7_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK8_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK9_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK10_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK11_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK12_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK13_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK14_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK15_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK16_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK17_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK18_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK19_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK20_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK21_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK22_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK23_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK24_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK25_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK26_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK27_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK28_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK29_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK30_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK31_STAT SMPH_PEEK_STAT
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_SMPH_H */
|
||||
@ -0,0 +1,104 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_aux_smph.h
|
||||
*
|
||||
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Technical content derives from a TI header file that has a compatible BSD license:
|
||||
*
|
||||
* Copyright (c) 2015-2017, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AUX_SMPH_H
|
||||
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AUX_SMPH_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include "hardware/tiva_memorymap.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* AUX SMPH Register Offsets ************************************************/
|
||||
|
||||
#define TIVA_AUX_SMPH_SMPH_OFFSET (0x0000 + ((n) << 2)
|
||||
# define TIVA_AUX_SMPH_SMPH0_OFFSET 0x0000 /* Semaphore 0 */
|
||||
# define TIVA_AUX_SMPH_SMPH1_OFFSET 0x0004 /* Semaphore 1 */
|
||||
# define TIVA_AUX_SMPH_SMPH2_OFFSET 0x0008 /* Semaphore 2 */
|
||||
# define TIVA_AUX_SMPH_SMPH3_OFFSET 0x000c /* Semaphore 3 */
|
||||
# define TIVA_AUX_SMPH_SMPH4_OFFSET 0x0010 /* Semaphore 4 */
|
||||
# define TIVA_AUX_SMPH_SMPH5_OFFSET 0x0014 /* Semaphore 5 */
|
||||
# define TIVA_AUX_SMPH_SMPH6_OFFSET 0x0018 /* Semaphore 6 */
|
||||
# define TIVA_AUX_SMPH_SMPH7_OFFSET 0x001c /* Semaphore 7 */
|
||||
#define TIVA_AUX_SMPH_AUTOTAKE_OFFSET 0x0020 /* Auto Take */
|
||||
|
||||
/* AUX SMPH Register Addresses **********************************************/
|
||||
|
||||
#define TIVA_AUX_SMPH_SMPH(n) (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH_OFFSET(n))
|
||||
# define TIVA_AUX_SMPH_SMPH0 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH0_OFFSET)
|
||||
# define TIVA_AUX_SMPH_SMPH1 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH1_OFFSET)
|
||||
# define TIVA_AUX_SMPH_SMPH2 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH2_OFFSET)
|
||||
# define TIVA_AUX_SMPH_SMPH3 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH3_OFFSET)
|
||||
# define TIVA_AUX_SMPH_SMPH4 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH4_OFFSET)
|
||||
# define TIVA_AUX_SMPH_SMPH5 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH5_OFFSET)
|
||||
# define TIVA_AUX_SMPH_SMPH6 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH6_OFFSET)
|
||||
# define TIVA_AUX_SMPH_SMPH7 (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_SMPH7_OFFSET)
|
||||
#define TIVA_AUX_SMPH_AUTOTAKE (TIVA_AUX_SMPH_BASE + TIVA_AUX_SMPH_AUTOTAKE_OFFSET)
|
||||
|
||||
/* AUX SMPH Register Bitfield Definitions **(********************************/
|
||||
|
||||
/* TIVA_AUX_SMPH_SMPH0-TIVA_AUX_SMPH_SMPH7 */
|
||||
|
||||
#define AUX_SMPH_SMPH_STAT (1 << 0) /* Bit 0: Semaphore granted */
|
||||
# define AUX_SMPH_SMPH0_STAT AUX_SMPH_SMPH_STAT
|
||||
# define AUX_SMPH_SMPH1_STAT AUX_SMPH_SMPH_STAT
|
||||
# define AUX_SMPH_SMPH2_STAT AUX_SMPH_SMPH_STAT
|
||||
# define AUX_SMPH_SMPH3_STAT AUX_SMPH_SMPH_STAT
|
||||
# define AUX_SMPH_SMPH4_STAT AUX_SMPH_SMPH_STAT
|
||||
# define AUX_SMPH_SMPH5_STAT AUX_SMPH_SMPH_STAT
|
||||
# define AUX_SMPH_SMPH6_STAT AUX_SMPH_SMPH_STAT
|
||||
# define AUX_SMPH_SMPH7_STAT AUX_SMPH_SMPH_STAT
|
||||
|
||||
/* TIVA_AUX_SMPH_AUTOTAKE */
|
||||
|
||||
#define AUX_SMPH_AUTOTAKE_SMPH_ID_SHIFT (0) /* Bits 0-7: Write the semaphore
|
||||
* ID 0-7 to SMPH_ID to request
|
||||
* semaphore until AUX_EVCTL:EVSTAT3.
|
||||
* AUX_SMPH_AUTOTAKE_DONE */
|
||||
#define AUX_SMPH_AUTOTAKE_SMPH_ID_MASK (7 << AUX_SMPH_AUTOTAKE_SMPH_ID_SHIFT)
|
||||
# define AUX_SMPH_AUTOTAKE_SMPH_ID(n) ((uint32_t)(n) << AUX_SMPH_AUTOTAKE_SMPH_ID_SHIFT)
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_AUX_SMPH_H */
|
||||
269
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_smph.h
Normal file
269
arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_smph.h
Normal file
@ -0,0 +1,269 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/tiva/hardware/cc13x2_cc26x2/cc13x2_cc26x2_smph.h
|
||||
*
|
||||
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Technical content derives from a TI header file that has a compatible BSD license:
|
||||
*
|
||||
* Copyright (c) 2015-2017, Texas Instruments Incorporated
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_SMPH_H
|
||||
#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_SMPH_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include "hardware/tiva_memorymap.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* SMPH Register Offsets ****************************************************/
|
||||
|
||||
#define TIVA_SMPH_SMPH_OFFSET(n) (0x0000 + ((n) << 2))
|
||||
# define TIVA_SMPH_SMPH0_OFFSET 0x0000 /* MCU SEMAPHORE 0 */
|
||||
# define TIVA_SMPH_SMPH1_OFFSET 0x0004 /* MCU SEMAPHORE 1 */
|
||||
# define TIVA_SMPH_SMPH2_OFFSET 0x0008 /* MCU SEMAPHORE 2 */
|
||||
# define TIVA_SMPH_SMPH3_OFFSET 0x000c /* MCU SEMAPHORE 3 */
|
||||
# define TIVA_SMPH_SMPH4_OFFSET 0x0010 /* MCU SEMAPHORE 4 */
|
||||
# define TIVA_SMPH_SMPH5_OFFSET 0x0014 /* MCU SEMAPHORE 5 */
|
||||
# define TIVA_SMPH_SMPH6_OFFSET 0x0018 /* MCU SEMAPHORE 6 */
|
||||
# define TIVA_SMPH_SMPH7_OFFSET 0x001c /* MCU SEMAPHORE 7 */
|
||||
# define TIVA_SMPH_SMPH8_OFFSET 0x0020 /* MCU SEMAPHORE 8 */
|
||||
# define TIVA_SMPH_SMPH9_OFFSET 0x0024 /* MCU SEMAPHORE 9 */
|
||||
# define TIVA_SMPH_SMPH10_OFFSET 0x0028 /* MCU SEMAPHORE 10 */
|
||||
# define TIVA_SMPH_SMPH11_OFFSET 0x002c /* MCU SEMAPHORE 11 */
|
||||
# define TIVA_SMPH_SMPH12_OFFSET 0x0030 /* MCU SEMAPHORE 12 */
|
||||
# define TIVA_SMPH_SMPH13_OFFSET 0x0034 /* MCU SEMAPHORE 13 */
|
||||
# define TIVA_SMPH_SMPH14_OFFSET 0x0038 /* MCU SEMAPHORE 14 */
|
||||
# define TIVA_SMPH_SMPH15_OFFSET 0x003c /* MCU SEMAPHORE 15 */
|
||||
# define TIVA_SMPH_SMPH16_OFFSET 0x0040 /* MCU SEMAPHORE 16 */
|
||||
# define TIVA_SMPH_SMPH17_OFFSET 0x0044 /* MCU SEMAPHORE 17 */
|
||||
# define TIVA_SMPH_SMPH18_OFFSET 0x0048 /* MCU SEMAPHORE 18 */
|
||||
# define TIVA_SMPH_SMPH19_OFFSET 0x004c /* MCU SEMAPHORE 19 */
|
||||
# define TIVA_SMPH_SMPH20_OFFSET 0x0050 /* MCU SEMAPHORE 20 */
|
||||
# define TIVA_SMPH_SMPH21_OFFSET 0x0054 /* MCU SEMAPHORE 21 */
|
||||
# define TIVA_SMPH_SMPH22_OFFSET 0x0058 /* MCU SEMAPHORE 22 */
|
||||
# define TIVA_SMPH_SMPH23_OFFSET 0x005c /* MCU SEMAPHORE 23 */
|
||||
# define TIVA_SMPH_SMPH24_OFFSET 0x0060 /* MCU SEMAPHORE 24 */
|
||||
# define TIVA_SMPH_SMPH25_OFFSET 0x0064 /* MCU SEMAPHORE 25 */
|
||||
# define TIVA_SMPH_SMPH26_OFFSET 0x0068 /* MCU SEMAPHORE 26 */
|
||||
# define TIVA_SMPH_SMPH27_OFFSET 0x006c /* MCU SEMAPHORE 27 */
|
||||
# define TIVA_SMPH_SMPH28_OFFSET 0x0070 /* MCU SEMAPHORE 28 */
|
||||
# define TIVA_SMPH_SMPH29_OFFSET 0x0074 /* MCU SEMAPHORE 29 */
|
||||
# define TIVA_SMPH_SMPH30_OFFSET 0x0078 /* MCU SEMAPHORE 30 */
|
||||
# define TIVA_SMPH_SMPH31_OFFSET 0x007c /* MCU SEMAPHORE 31 */
|
||||
|
||||
#define TIVA_SMPH_PEEK_OFFSET(n) (0x0800 + ((n) << 2))
|
||||
# define TIVA_SMPH_PEEK0_OFFSET 0x0800 /* MCU SEMAPHORE 0 ALIAS */
|
||||
# define TIVA_SMPH_PEEK1_OFFSET 0x0804 /* MCU SEMAPHORE 1 ALIAS */
|
||||
# define TIVA_SMPH_PEEK2_OFFSET 0x0808 /* MCU SEMAPHORE 2 ALIAS */
|
||||
# define TIVA_SMPH_PEEK3_OFFSET 0x080c /* MCU SEMAPHORE 3 ALIAS */
|
||||
# define TIVA_SMPH_PEEK4_OFFSET 0x0810 /* MCU SEMAPHORE 4 ALIAS */
|
||||
# define TIVA_SMPH_PEEK5_OFFSET 0x0814 /* MCU SEMAPHORE 5 ALIAS */
|
||||
# define TIVA_SMPH_PEEK6_OFFSET 0x0818 /* MCU SEMAPHORE 6 ALIAS */
|
||||
# define TIVA_SMPH_PEEK7_OFFSET 0x081c /* MCU SEMAPHORE 7 ALIAS */
|
||||
# define TIVA_SMPH_PEEK8_OFFSET 0x0820 /* MCU SEMAPHORE 8 ALIAS */
|
||||
# define TIVA_SMPH_PEEK9_OFFSET 0x0824 /* MCU SEMAPHORE 9 ALIAS */
|
||||
# define TIVA_SMPH_PEEK10_OFFSET 0x0828 /* MCU SEMAPHORE 10 ALIAS */
|
||||
# define TIVA_SMPH_PEEK11_OFFSET 0x082c /* MCU SEMAPHORE 11 ALIAS */
|
||||
# define TIVA_SMPH_PEEK12_OFFSET 0x0830 /* MCU SEMAPHORE 12 ALIAS */
|
||||
# define TIVA_SMPH_PEEK13_OFFSET 0x0834 /* MCU SEMAPHORE 13 ALIAS */
|
||||
# define TIVA_SMPH_PEEK14_OFFSET 0x0838 /* MCU SEMAPHORE 14 ALIAS */
|
||||
# define TIVA_SMPH_PEEK15_OFFSET 0x083c /* MCU SEMAPHORE 15 ALIAS */
|
||||
# define TIVA_SMPH_PEEK16_OFFSET 0x0840 /* MCU SEMAPHORE 16 ALIAS */
|
||||
# define TIVA_SMPH_PEEK17_OFFSET 0x0844 /* MCU SEMAPHORE 17 ALIAS */
|
||||
# define TIVA_SMPH_PEEK18_OFFSET 0x0848 /* MCU SEMAPHORE 18 ALIAS */
|
||||
# define TIVA_SMPH_PEEK19_OFFSET 0x084c /* MCU SEMAPHORE 19 ALIAS */
|
||||
# define TIVA_SMPH_PEEK20_OFFSET 0x0850 /* MCU SEMAPHORE 20 ALIAS */
|
||||
# define TIVA_SMPH_PEEK21_OFFSET 0x0854 /* MCU SEMAPHORE 21 ALIAS */
|
||||
# define TIVA_SMPH_PEEK22_OFFSET 0x0858 /* MCU SEMAPHORE 22 ALIAS */
|
||||
# define TIVA_SMPH_PEEK23_OFFSET 0x085c /* MCU SEMAPHORE 23 ALIAS */
|
||||
# define TIVA_SMPH_PEEK24_OFFSET 0x0860 /* MCU SEMAPHORE 24 ALIAS */
|
||||
# define TIVA_SMPH_PEEK25_OFFSET 0x0864 /* MCU SEMAPHORE 25 ALIAS */
|
||||
# define TIVA_SMPH_PEEK26_OFFSET 0x0868 /* MCU SEMAPHORE 26 ALIAS */
|
||||
# define TIVA_SMPH_PEEK27_OFFSET 0x086c /* MCU SEMAPHORE 27 ALIAS */
|
||||
# define TIVA_SMPH_PEEK28_OFFSET 0x0870 /* MCU SEMAPHORE 28 ALIAS */
|
||||
# define TIVA_SMPH_PEEK29_OFFSET 0x0874 /* MCU SEMAPHORE 29 ALIAS */
|
||||
# define TIVA_SMPH_PEEK30_OFFSET 0x0878 /* MCU SEMAPHORE 30 ALIAS */
|
||||
# define TIVA_SMPH_PEEK31_OFFSET 0x087c /* MCU SEMAPHORE 31 ALIAS */
|
||||
|
||||
/* SMPH Register Addresses **************************************************/
|
||||
|
||||
#define TIVA_SMPH_SMPH(n) (TIVA_SMPH_BASE + TIVA_SMPH_SMPH_OFFSET(n))
|
||||
# define TIVA_SMPH_SMPH0 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH0_OFFSET)
|
||||
# define TIVA_SMPH_SMPH1 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH1_OFFSET)
|
||||
# define TIVA_SMPH_SMPH2 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH2_OFFSET)
|
||||
# define TIVA_SMPH_SMPH3 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH3_OFFSET)
|
||||
# define TIVA_SMPH_SMPH4 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH4_OFFSET)
|
||||
# define TIVA_SMPH_SMPH5 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH5_OFFSET)
|
||||
# define TIVA_SMPH_SMPH6 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH6_OFFSET)
|
||||
# define TIVA_SMPH_SMPH7 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH7_OFFSET)
|
||||
# define TIVA_SMPH_SMPH8 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH8_OFFSET)
|
||||
# define TIVA_SMPH_SMPH9 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH9_OFFSET)
|
||||
# define TIVA_SMPH_SMPH10 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH10_OFFSET)
|
||||
# define TIVA_SMPH_SMPH11 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH11_OFFSET)
|
||||
# define TIVA_SMPH_SMPH12 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH12_OFFSET)
|
||||
# define TIVA_SMPH_SMPH13 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH13_OFFSET)
|
||||
# define TIVA_SMPH_SMPH14 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH14_OFFSET)
|
||||
# define TIVA_SMPH_SMPH15 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH15_OFFSET)
|
||||
# define TIVA_SMPH_SMPH16 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH16_OFFSET)
|
||||
# define TIVA_SMPH_SMPH17 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH17_OFFSET)
|
||||
# define TIVA_SMPH_SMPH18 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH18_OFFSET)
|
||||
# define TIVA_SMPH_SMPH19 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH19_OFFSET)
|
||||
# define TIVA_SMPH_SMPH20 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH20_OFFSET)
|
||||
# define TIVA_SMPH_SMPH21 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH21_OFFSET)
|
||||
# define TIVA_SMPH_SMPH22 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH22_OFFSET)
|
||||
# define TIVA_SMPH_SMPH23 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH23_OFFSET)
|
||||
# define TIVA_SMPH_SMPH24 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH24_OFFSET)
|
||||
# define TIVA_SMPH_SMPH25 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH25_OFFSET)
|
||||
# define TIVA_SMPH_SMPH26 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH26_OFFSET)
|
||||
# define TIVA_SMPH_SMPH27 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH27_OFFSET)
|
||||
# define TIVA_SMPH_SMPH28 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH28_OFFSET)
|
||||
# define TIVA_SMPH_SMPH29 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH29_OFFSET)
|
||||
# define TIVA_SMPH_SMPH30 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH30_OFFSET)
|
||||
# define TIVA_SMPH_SMPH31 (TIVA_SMPH_BASE + TIVA_SMPH_SMPH31_OFFSET)
|
||||
|
||||
#define TIVA_SMPH_PEEK(n) (TIVA_SMPH_BASE + TIVA_SMPH_PEEK_OFFSET(n))
|
||||
# define TIVA_SMPH_PEEK0 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK0_OFFSET)
|
||||
# define TIVA_SMPH_PEEK1 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK1_OFFSET)
|
||||
# define TIVA_SMPH_PEEK2 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK2_OFFSET)
|
||||
# define TIVA_SMPH_PEEK3 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK3_OFFSET)
|
||||
# define TIVA_SMPH_PEEK4 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK4_OFFSET)
|
||||
# define TIVA_SMPH_PEEK5 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK5_OFFSET)
|
||||
# define TIVA_SMPH_PEEK6 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK6_OFFSET)
|
||||
# define TIVA_SMPH_PEEK7 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK7_OFFSET)
|
||||
# define TIVA_SMPH_PEEK8 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK8_OFFSET)
|
||||
# define TIVA_SMPH_PEEK9 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK9_OFFSET)
|
||||
# define TIVA_SMPH_PEEK10 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK10_OFFSET)
|
||||
# define TIVA_SMPH_PEEK11 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK11_OFFSET)
|
||||
# define TIVA_SMPH_PEEK12 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK12_OFFSET)
|
||||
# define TIVA_SMPH_PEEK13 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK13_OFFSET)
|
||||
# define TIVA_SMPH_PEEK14 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK14_OFFSET)
|
||||
# define TIVA_SMPH_PEEK15 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK15_OFFSET)
|
||||
# define TIVA_SMPH_PEEK16 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK16_OFFSET)
|
||||
# define TIVA_SMPH_PEEK17 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK17_OFFSET)
|
||||
# define TIVA_SMPH_PEEK18 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK18_OFFSET)
|
||||
# define TIVA_SMPH_PEEK19 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK19_OFFSET)
|
||||
# define TIVA_SMPH_PEEK20 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK20_OFFSET)
|
||||
# define TIVA_SMPH_PEEK21 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK21_OFFSET)
|
||||
# define TIVA_SMPH_PEEK22 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK22_OFFSET)
|
||||
# define TIVA_SMPH_PEEK23 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK23_OFFSET)
|
||||
# define TIVA_SMPH_PEEK24 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK24_OFFSET)
|
||||
# define TIVA_SMPH_PEEK25 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK25_OFFSET)
|
||||
# define TIVA_SMPH_PEEK26 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK26_OFFSET)
|
||||
# define TIVA_SMPH_PEEK27 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK27_OFFSET)
|
||||
# define TIVA_SMPH_PEEK28 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK28_OFFSET)
|
||||
# define TIVA_SMPH_PEEK29 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK29_OFFSET)
|
||||
# define TIVA_SMPH_PEEK30 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK30_OFFSET)
|
||||
# define TIVA_SMPH_PEEK31 (TIVA_SMPH_BASE + TIVA_SMPH_PEEK31_OFFSET)
|
||||
|
||||
/* SMPH Register Bitfield Definitions ***************************************/
|
||||
|
||||
/* TIVA_SMPH_SMPH0-TIVA_SMPH_SMPH31 */
|
||||
|
||||
#define SMPH_SMPH_STAT (1 << 0) /* Bit 0: Semaphore is available */
|
||||
# define SMPH_SMPH0_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH1_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH2_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH3_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH4_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH5_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH6_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH7_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH8_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH9_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH10_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH11_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH12_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH13_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH14_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH15_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH16_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH17_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH18_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH19_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH20_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH21_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH22_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH23_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH24_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH25_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH26_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH27_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH28_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH29_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH30_STAT SMPH_SMPH_STAT
|
||||
# define SMPH_SMPH31_STAT SMPH_SMPH_STAT
|
||||
|
||||
/* TIVA_SMPH_PEEK0-TIVA_SMPH_PEEK31 */
|
||||
|
||||
#define SMPH_PEEK_STAT (1 << 0) /* Bit 0: Semaphore is available */
|
||||
# define SMPH_PEEK0_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK1_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK2_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK3_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK4_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK5_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK6_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK7_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK8_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK9_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK10_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK11_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK12_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK13_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK14_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK15_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK16_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK17_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK18_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK19_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK20_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK21_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK22_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK23_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK24_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK25_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK26_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK27_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK28_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK29_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK30_STAT SMPH_PEEK_STAT
|
||||
# define SMPH_PEEK31_STAT SMPH_PEEK_STAT
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X2_CC26X2_CC13X2_CC26X2_SMPH_H */
|
||||
73
arch/arm/src/tiva/hardware/tiva_aux_smph.h
Normal file
73
arch/arm/src/tiva/hardware/tiva_aux_smph.h
Normal file
@ -0,0 +1,73 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/tiva/hardware/tiva_aux_smph.h
|
||||
*
|
||||
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_SMPH_H
|
||||
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_SMPH_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
|
||||
/* These architectures do not support the AUX SMPH block */
|
||||
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
|
||||
# include "hardware/cc13x0/cc13x0_aux_smph.h"
|
||||
#elif defined(CONFIG_ARCH_CHIP_CC13X2)
|
||||
# include "hardware/cc13x2_cc26x2/cc13x2_cc26x2_aux_smph.h"
|
||||
#else
|
||||
# error "Unsupported Tiva/Stellaris/SimpleLink AUX SMPH"
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Function Prototypes
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AUX_SMPH_H */
|
||||
73
arch/arm/src/tiva/hardware/tiva_smph.h
Normal file
73
arch/arm/src/tiva/hardware/tiva_smph.h
Normal file
@ -0,0 +1,73 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/tiva/hardware/tiva_smph.h
|
||||
*
|
||||
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_SMPH_H
|
||||
#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_SMPH_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C)
|
||||
/* These architectures do not support the SMPH block */
|
||||
#elif defined(CONFIG_ARCH_CHIP_CC13X0)
|
||||
# include "hardware/cc13x0/cc13x0_smph.h"
|
||||
#elif defined(CONFIG_ARCH_CHIP_CC13X2)
|
||||
# include "hardware/cc13x2_cc26x2/cc13x2_cc26x2_smph.h"
|
||||
#else
|
||||
# error "Unsupported Tiva/Stellaris/SimpleLink SMPH"
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Function Prototypes
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_SMPH_H */
|
||||
@ -17,7 +17,8 @@ Status
|
||||
2019-01-21: Fragmentary board support in place. The initial intent
|
||||
of this board support is simply to assist in the CC13x0 architecture
|
||||
development. Serious board development will occur later. At present,
|
||||
the CC13x0 does not even compile error-free.
|
||||
the CC13x0 does not even compile error-free: Compilation of cc14x0_rom.c
|
||||
fails because the DDI0 OSC header file has not yet been ported.
|
||||
|
||||
Serial Console
|
||||
==============
|
||||
|
||||
@ -1,10 +1,11 @@
|
||||
# CONFIG_NSH_DISABLE_DATE is not set
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="launchxl-cc1310"
|
||||
CONFIG_ARCH_BOARD_LAUNCH_CC1310=y
|
||||
CONFIG_ARCH_BOARD_LAUNCHXL_CC1310=y
|
||||
CONFIG_ARCH_BUTTONS=y
|
||||
CONFIG_ARCH_CHIP_CC1310=y
|
||||
CONFIG_ARCH_CHIP_CC13X0=y
|
||||
CONFIG_ARCH_CHIP_CC13XX_V2=y
|
||||
CONFIG_ARCH_CHIP_SIMPLELINK=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=2048
|
||||
CONFIG_ARCH_IRQBUTTONS=y
|
||||
|
||||
@ -5,7 +5,7 @@ CONFIG_ARCH_BOARD_LAUNCHXL_CC1312R1=y
|
||||
CONFIG_ARCH_BUTTONS=y
|
||||
CONFIG_ARCH_CHIP_CC1312R1=y
|
||||
CONFIG_ARCH_CHIP_CC13X2=y
|
||||
CONFIG_ARCH_CHIP_CC13X2_V1=y
|
||||
CONFIG_ARCH_CHIP_CC13XX_V1=y
|
||||
CONFIG_ARCH_CHIP_SIMPLELINK=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=2048
|
||||
CONFIG_ARCH_IRQBUTTONS=y
|
||||
|
||||
Loading…
Reference in New Issue
Block a user