esp32_spiflash.c: Keep the index of the other CPU between SPI Flash

operations.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This commit is contained in:
Abdelatif Guettouche 2021-10-13 11:11:47 +02:00 committed by Xiang Xiao
parent eeb68bda3d
commit f54a929001

View File

@ -161,6 +161,9 @@ struct spiflash_map_req
struct spiflash_cachestate_s
{
int cpu;
#ifdef CONFIG_SMP
int other;
#endif
irqstate_t flags;
uint32_t val[2];
};
@ -405,26 +408,23 @@ static inline void spi_reset_regbits(struct esp32_spiflash_s *priv,
static inline void IRAM_ATTR
esp32_spiflash_opstart(struct spiflash_cachestate_s *state)
{
#ifdef CONFIG_SMP
int other;
#endif
state->flags = enter_critical_section();
state->cpu = up_cpu_index();
#ifdef CONFIG_SMP
other = state->cpu ? 0 : 1;
state->other = state->cpu ? 0 : 1;
#endif
DEBUGASSERT(state->cpu == 0 || state->cpu == 1);
#ifdef CONFIG_SMP
DEBUGASSERT(other == 0 || other == 1);
up_cpu_pause(other);
DEBUGASSERT(state->other == 0 || state->other == 1);
DEBUGASSERT(state->other != state->cpu);
up_cpu_pause(state->other);
#endif
spi_disable_cache(state->cpu, &state->val[state->cpu]);
#ifdef CONFIG_SMP
spi_disable_cache(other, &state->val[other]);
spi_disable_cache(state->other, &state->val[state->other]);
#endif
}
@ -439,23 +439,16 @@ static inline void IRAM_ATTR
static inline void IRAM_ATTR
esp32_spiflash_opdone(const struct spiflash_cachestate_s *state)
{
#ifdef CONFIG_SMP
int other;
#endif
#ifdef CONFIG_SMP
other = state->cpu ? 0 : 1;
#endif
DEBUGASSERT(state->cpu == 0 || state->cpu == 1);
#ifdef CONFIG_SMP
DEBUGASSERT(other == 0 || other == 1);
DEBUGASSERT(state->other == 0 || state->other == 1);
DEBUGASSERT(state->other != state->cpu);
#endif
spi_enable_cache(state->cpu, state->val[state->cpu]);
#ifdef CONFIG_SMP
spi_enable_cache(other, state->val[other]);
up_cpu_resume(other);
spi_enable_cache(state->other, state->val[state->other]);
up_cpu_resume(state->other);
#endif
leave_critical_section(state->flags);