From f54a9290015e2525223a8dac377efbfc8d48ca58 Mon Sep 17 00:00:00 2001
From: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Date: Wed, 13 Oct 2021 11:11:47 +0200
Subject: [PATCH] esp32_spiflash.c: Keep the index of the other CPU between SPI
 Flash operations.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
---
 arch/xtensa/src/esp32/esp32_spiflash.c | 31 ++++++++++----------------
 1 file changed, 12 insertions(+), 19 deletions(-)

diff --git a/arch/xtensa/src/esp32/esp32_spiflash.c b/arch/xtensa/src/esp32/esp32_spiflash.c
index 3f90bc879f..50604735b2 100644
--- a/arch/xtensa/src/esp32/esp32_spiflash.c
+++ b/arch/xtensa/src/esp32/esp32_spiflash.c
@@ -161,6 +161,9 @@ struct spiflash_map_req
 struct spiflash_cachestate_s
 {
   int cpu;
+#ifdef CONFIG_SMP
+  int other;
+#endif
   irqstate_t flags;
   uint32_t val[2];
 };
@@ -405,26 +408,23 @@ static inline void spi_reset_regbits(struct esp32_spiflash_s *priv,
 static inline void IRAM_ATTR
   esp32_spiflash_opstart(struct spiflash_cachestate_s *state)
 {
-#ifdef CONFIG_SMP
-  int other;
-#endif
-
   state->flags = enter_critical_section();
 
   state->cpu = up_cpu_index();
 #ifdef CONFIG_SMP
-  other = state->cpu ? 0 : 1;
+  state->other = state->cpu ? 0 : 1;
 #endif
 
   DEBUGASSERT(state->cpu == 0 || state->cpu == 1);
 #ifdef CONFIG_SMP
-  DEBUGASSERT(other == 0 || other == 1);
-  up_cpu_pause(other);
+  DEBUGASSERT(state->other == 0 || state->other == 1);
+  DEBUGASSERT(state->other != state->cpu);
+  up_cpu_pause(state->other);
 #endif
 
   spi_disable_cache(state->cpu, &state->val[state->cpu]);
 #ifdef CONFIG_SMP
-  spi_disable_cache(other, &state->val[other]);
+  spi_disable_cache(state->other, &state->val[state->other]);
 #endif
 }
 
@@ -439,23 +439,16 @@ static inline void IRAM_ATTR
 static inline void IRAM_ATTR
   esp32_spiflash_opdone(const struct spiflash_cachestate_s *state)
 {
-#ifdef CONFIG_SMP
-  int other;
-#endif
-
-#ifdef CONFIG_SMP
-  other = state->cpu ? 0 : 1;
-#endif
-
   DEBUGASSERT(state->cpu == 0 || state->cpu == 1);
 #ifdef CONFIG_SMP
-  DEBUGASSERT(other == 0 || other == 1);
+  DEBUGASSERT(state->other == 0 || state->other == 1);
+  DEBUGASSERT(state->other != state->cpu);
 #endif
 
   spi_enable_cache(state->cpu, state->val[state->cpu]);
 #ifdef CONFIG_SMP
-  spi_enable_cache(other, state->val[other]);
-  up_cpu_resume(other);
+  spi_enable_cache(state->other, state->val[state->other]);
+  up_cpu_resume(state->other);
 #endif
 
   leave_critical_section(state->flags);