xtensa: spit up_irq_disable and up_irq_save INTLEVEL MARCO

For up_irq_disable, use XCHAL_EXCM_LEVEL
For up_irq_save,  use XCHAL_IRQ_LEVEL.
Then we can use svcall in enter_crritical_section.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
This commit is contained in:
zhuyanlin 2022-01-14 16:52:11 +08:00 committed by Xiang Xiao
parent e8552156b6
commit f5d180bbdf
2 changed files with 7 additions and 1 deletions

View File

@ -37,6 +37,7 @@
#include <arch/types.h>
#include <arch/chip/tie.h>
#include <arch/chip/core-isa.h>
#include <arch/xtensa/core.h>
#include <arch/xtensa/xtensa_specregs.h>
#include <arch/xtensa/xtensa_corebits.h>
@ -233,7 +234,7 @@ static inline uint32_t up_irq_save(void)
__asm__ __volatile__
(
"rsil %0, %1" : "=r"(ps) : "i"(XCHAL_EXCM_LEVEL)
"rsil %0, %1" : "=r"(ps) : "i"(XCHAL_IRQ_LEVEL)
);
/* Return the previous PS value so that it can be restored with

View File

@ -90,6 +90,11 @@
/* Interrupts ***************************************************************/
/* Indexing macros: */
#ifndef XCHAL_SYSCALL_LEVEL
# define XCHAL_IRQ_LEVEL XCHAL_EXCM_LEVEL
#else
# define XCHAL_IRQ_LEVEL XCHAL_SYSCALL_LEVEL
#endif
#define _XCHAL_INTLEVEL_MASK(n) XCHAL_INTLEVEL ## n ## _MASK
#define XCHAL_INTLEVEL_MASK(n) _XCHAL_INTLEVEL_MASK(n) /* n = 0 .. 15 */