Based on the last PR, review all serial driver vector attachment. Found one additional error and updated all relevant drivers to current interrupt parameter passing.

This commit is contained in:
Gregory Nutt 2017-06-12 06:22:35 -06:00
parent 0f19a18d75
commit f5f1c73b54
6 changed files with 32 additions and 102 deletions

View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/a1x/a1x_serial.c
*
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2014, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -1035,7 +1035,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(priv->irq, uart_interrupt, priv);
ret = irq_attach(priv->irq, uart_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -1080,7 +1080,7 @@ static void up_detach(struct uart_dev_s *dev)
static int uart_interrupt(int irq, void *context, void *arg)
{
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv = (struct up_dev_s *)arg;
struct up_dev_s *priv;
uint32_t status;
int passes;

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@ -1,8 +1,7 @@
/****************************************************************************
* arch/arm/src/imx1/imx_serial.c
* arch/arm/src/chip/imx_serial.c
*
* Copyright (C) 2009, 2012-2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2012-2013, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -111,7 +110,6 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
static inline struct uart_dev_s *up_mapirq(int irq);
static int up_interrupt(int irq, void *context, FAR void *arg);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
static int up_receive(struct uart_dev_s *dev, uint32_t *status);
@ -753,13 +751,13 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
#if defined(CONFIG_ARCH_CHIP_IMX1) || defined(CONFIG_ARCH_CHIP_IMXL)
ret = irq_attach(priv->rxirq, up_interrupt, NULL);
ret = irq_attach(priv->rxirq, up_interrupt, dev);
if (ret < 0)
{
return ret;
}
ret = irq_attach(priv->txirq, up_interrupt, NULL);
ret = irq_attach(priv->txirq, up_interrupt, dev);
if (ret < 0)
{
irq_detach(priv->rxirq);
@ -772,7 +770,7 @@ static int up_attach(struct uart_dev_s *dev)
up_enable_irq(priv->txirq);
#else
ret = irq_attach(priv->irq, up_interrupt, NULL);
ret = irq_attach(priv->irq, up_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -810,60 +808,6 @@ static void up_detach(struct uart_dev_s *dev)
#endif
}
/****************************************************************************
* Name: up_mapirq
*
* Description:
* Map an IRQ number to internal UART state structure
*
****************************************************************************/
static inline struct uart_dev_s *up_mapirq(int irq)
{
struct uart_dev_s *dev;
switch (irq)
{
#ifdef CONFIG_IMX1_UART1
#if defined(CONFIG_ARCH_CHIP_IMX1) || defined(CONFIG_ARCH_CHIP_IMXL)
case IMX_IRQ_UART1RX:
case IMX_IRQ_UART1TX:
#else
case IMX_IRQ_UART1:
#endif
dev = &g_uart1port;
break;
#endif
#ifdef CONFIG_IMX1_UART2
#if defined(CONFIG_ARCH_CHIP_IMX1) || defined(CONFIG_ARCH_CHIP_IMXL)
case IMX_IRQ_UART2RX:
case IMX_IRQ_UART2TX:
#else
case IMX_IRQ_UART2:
#endif
dev = &g_uart2port;
break;
#endif
#ifdef CONFIG_IMX1_UART3
#if defined(CONFIG_ARCH_CHIP_IMX1) || defined(CONFIG_ARCH_CHIP_IMXL)
case IMX_IRQ_UART3RX:
case IMX_IRQ_UART3TX:
#else
case IMX_IRQ_UART3:
#endif
dev = &g_uart3port;
break;
#endif
default:
PANIC();
break;
}
return dev;
}
/****************************************************************************
* Name: up_interrupt (and front-ends)
*
@ -879,12 +823,12 @@ static inline struct uart_dev_s *up_mapirq(int irq)
static int up_interrupt(int irq, void *context, FAR void *arg)
{
struct uart_dev_s *dev;
struct up_dev_s *priv;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
uint32_t usr1;
int passes = 0;
int passes = 0;
dev = up_mapirq(irq);
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or,

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@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc31xx/lpc31_serial.c
*
* Copyright (C) 2009, 2012-2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2012-2013, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -444,7 +444,7 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(LPC31_IRQ_UART, up_interrupt, NULL);
ret = irq_attach(LPC31_IRQ_UART, up_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -453,6 +453,7 @@ static int up_attach(struct uart_dev_s *dev)
up_enable_irq(LPC31_IRQ_UART);
}
return ret;
}
@ -484,9 +485,9 @@ static void up_detach(struct uart_dev_s *dev)
static int up_interrupt(int irq, void *context, FAR void *arg)
{
struct uart_dev_s *dev = &g_uartport;
uint8_t status;
int passes;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
uint8_t status;
int passes;
/* Loop until there are no characters to be transferred or,
* until we have been looping for a long time.

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@ -287,7 +287,7 @@ static int dbgu_attach(struct uart_dev_s *dev)
/* Attach and enable the IRQ */
ret = irq_attach(SAM_IRQ_DBGU, dbgu_interrupt, NULL);
ret = irq_attach(SAM_IRQ_DBGU, dbgu_interrupt, dev);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
@ -330,13 +330,16 @@ static void dbgu_detach(struct uart_dev_s *dev)
static int dbgu_interrupt(int irq, void *context, FAR void *arg)
{
struct uart_dev_s *dev = &g_dbgu_port;
struct dbgu_dev_s *priv = (struct dbgu_dev_s *)dev->priv;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct dbgu_dev_s *priv;
uint32_t pending;
uint32_t imr;
int passes;
bool handled;
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct dbgu_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or, until we have
* been looping for a long time.
*/

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@ -313,7 +313,7 @@ static int misoc_attach(struct uart_dev_s *dev)
{
struct misoc_dev_s *priv = (struct misoc_dev_s *)dev->priv;
(void)irq_attach(priv->irq, misoc_uart_interrupt, NULL);
(void)irq_attach(priv->irq, misoc_uart_interrupt, dev);
up_enable_irq(priv->irq);
return OK;
@ -351,10 +351,10 @@ static void misoc_detach(struct uart_dev_s *dev)
static int misoc_uart_interrupt(int irq, void *context, FAR void *arg)
{
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
uint32_t stat;
struct uart_dev_s *dev = NULL;
dev = &g_uart1port;
DEBUGASSERT(dev != NULL);
/* Read as much as we can */

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@ -485,17 +485,17 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach the RDR full IRQ (RXI) that is enabled by the RIE SCR bit */
ret = irq_attach(priv->irq + SH1_RXI_IRQ_OFFSET, up_interrupt, NULL);
ret = irq_attach(priv->irq + SH1_RXI_IRQ_OFFSET, up_interrupt, dev);
if (ret == OK)
{
/* The RIE interrupt enable also enables the receive error interrupt (ERI) */
ret = irq_attach(priv->irq + SH1_ERI_IRQ_OFFSET, up_interrupt, NULL);
ret = irq_attach(priv->irq + SH1_ERI_IRQ_OFFSET, up_interrupt, dev);
if (ret == OK)
{
/* Attach the TDR empty IRQ (TXI) enabled by the TIE SCR bit */
ret = irq_attach(priv->irq + SH1_TXI_IRQ_OFFSET, up_interrupt, NULL);
ret = irq_attach(priv->irq + SH1_TXI_IRQ_OFFSET, up_interrupt, dev);
if (ret == OK)
{
#ifdef CONFIG_ARCH_IRQPRIO
@ -569,28 +569,10 @@ static void up_detach(struct uart_dev_s *dev)
static int up_interrupt(int irq, void *context, FAR void *arg)
{
struct uart_dev_s *dev = NULL;
struct up_dev_s *priv;
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv;
#ifdef CONFIG_SH1_SCI0
if ((irq >= g_sci0priv.irq) &&
(irq <= g_sci0priv.irq + SH1_SCI_NIRQS))
{
dev = &g_sci0port;
}
else
#endif
#ifdef CONFIG_SH1_SCI1
if ((irq >= g_sci1priv.irq) &&
(irq <= g_sci1priv.irq + SH1_SCI_NIRQS))
{
dev = &g_sci1port;
}
else
#endif
{
PANIC();
}
DEBUGASSERT(dev != NULL && dev->priv != NULL);
priv = (struct up_dev_s*)dev->priv;
/* Get the current SCI status */