Modify interrupt handling for privileged/unprivileged mode
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3480 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
0374d16b98
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f653a45904
@ -55,43 +55,50 @@
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/* IRQ Stack Frame Format: */
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/* On entry into an IRQ, the hardware automatically saves the following
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* registers on the stack in this (address) order:
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*/
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#define REG_XPSR (17) /* xPSR */
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#define REG_R15 (16) /* R15 = PC */
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#define REG_R14 (15) /* R14 = LR */
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#define REG_R12 (14) /* R12 */
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#define REG_R3 (13) /* R3 */
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#define REG_R2 (12) /* R2 */
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#define REG_R1 (11) /* R1 */
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#define REG_R0 (10) /* R0 */
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#define HW_XCPT_REGS (8)
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#define HW_XCPT_SIZE (4 * HW_XCPT_REGS)
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/* The following additional registers are stored by the interrupt handling
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* logic.
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*/
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#define REG_R11 (9) /* R11 */
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#define REG_R10 (8) /* R10 */
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#define REG_R9 (7) /* R9 */
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#define REG_R8 (6) /* R8 */
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#define REG_R7 (5) /* R7 */
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#define REG_R6 (4) /* R6 */
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#define REG_R5 (3) /* R5 */
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#define REG_R4 (2) /* R4 */
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#define REG_PRIMASK (1) /* PRIMASK */
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#define REG_R13 (0) /* R13 = SP at time of interrupt */
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#define REG_R13 (0) /* R13 = SP at time of interrupt */
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#define REG_PRIMASK (1) /* PRIMASK */
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#define REG_R4 (2) /* R4 */
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#define REG_R5 (3) /* R5 */
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#define REG_R6 (4) /* R6 */
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#define REG_R7 (5) /* R7 */
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#define REG_R8 (6) /* R8 */
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#define REG_R9 (7) /* R9 */
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#define REG_R10 (8) /* R10 */
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#define REG_R11 (9) /* R11 */
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#define SW_XCPT_REGS (10)
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#ifdef CONFIG_NUTTX_KERNEL
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# define REG_EXC_RETURN (10) /* EXC_RETURN */
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# define SW_XCPT_REGS (11)
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#else
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# define SW_XCPT_REGS (10)
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#endif
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#define SW_XCPT_SIZE (4 * SW_XCPT_REGS)
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/* On entry into an IRQ, the hardware automatically saves the following
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* registers on the stack in this (address) order:
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*/
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#define REG_R0 (SW_XCPT_REGS+0) /* R0 */
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#define REG_R1 (SW_XCPT_REGS+1) /* R1 */
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#define REG_R2 (SW_XCPT_REGS+2) /* R2 */
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#define REG_R3 (SW_XCPT_REGS+3) /* R3 */
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#define REG_R12 (SW_XCPT_REGS+4) /* R12 */
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#define REG_R14 (SW_XCPT_REGS+5) /* R14 = LR */
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#define REG_R15 (SW_XCPT_REGS+6) /* R15 = PC */
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#define REG_XPSR (SW_XCPT_REGS+7) /* xPSR */
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#define HW_XCPT_REGS (8)
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#define HW_XCPT_SIZE (4 * HW_XCPT_REGS)
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#define XCPTCONTEXT_REGS (HW_XCPT_REGS + SW_XCPT_REGS)
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#define XCPTCONTEXT_SIZE (HW_XCPT_SIZE + SW_XCPT_SIZE)
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/* Alternate register names */
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#define REG_A1 REG_R0
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#define REG_A2 REG_R1
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#define REG_A3 REG_R2
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@ -110,7 +110,7 @@ void up_initial_state(_TCB *tcb)
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}
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#endif
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/* Set supervisor- or user-mode, depending on how NuttX is configured nd
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/* Set supervisor- or user-mode, depending on how NuttX is configured and
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* what kind of thread is being started. Disable FIQs in any event
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*/
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90
arch/arm/src/cortexm3/exc_return.h
Normal file
90
arch/arm/src/cortexm3/exc_return.h
Normal file
@ -0,0 +1,90 @@
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/************************************************************************************
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* arch/arm/src/cortexm3/exc_return.h
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_COMMON_CORTEXM_EXC_RETURN_H
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#define __ARCH_ARM_SRC_COMMON_CORTEXM_EXC_RETURN_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* The processor saves an EXC_RETURN value to the LR on exception entry. The
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* exception mechanism relies on this value to detect when the processor has
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* completed an exception handler. Bits[31:4] of an EXC_RETURN value are
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* 0xfffffffX. When the processor loads a value matching this pattern to the
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* PC it detects that the operation is a not a normal branch operation and,
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* instead, that the exception is complete. Therefore, it starts the exception
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* return sequence. Bits[3:0] of the EXC_RETURN value indicate the required
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* return stack and processor mode:
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*/
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/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state from
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* the main stack. Execution uses MSP after return.
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*/
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#define EXC_RETURN_HANDLER 0xfffffff1
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/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return gets
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* state from the main stack. Execution uses MSP after return.
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*/
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#define EXC_RETURN_PRIVTHR 0xfffffff9
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/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return gets
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* state from the process stack. Execution uses PSP after return.
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*/
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#define EXC_RETURN_UNPRIVTHR 0xfffffffd
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/* In the kernel build is not selected, then all threads run in privileged thread
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* mode.
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*/
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#ifdef CONFIG_NUTTX_KERNEL
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# define EXC_RETURN 0xfffffff9
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#endif
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/************************Th************************************************************
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* Inline Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_COMMON_CORTEXM_EXC_RETURN_H */
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@ -47,7 +47,9 @@
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#include "up_internal.h"
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#include "up_arch.h"
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#include "psr.h"
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#include "exc_return.h"
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/****************************************************************************
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* Pre-processor Definitions
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@ -124,6 +126,28 @@ void up_initial_state(_TCB *tcb)
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#endif
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#endif
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/* Set privileged- or unprivileged-mode, depending on how NuttX is
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* configured and what kind of thread is being started.
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*
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* If the kernel build is not selected, then all threads run in
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* privileged thread mode.
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*/
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#ifdef CONFIG_NUTTX_KERNEL
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if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_KERNEL)
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{
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/* It is a kernel thread.. set privileged thread mode */
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xcp->regs[REG_EXC_RETURN] = EXC_RETURN_PRIVTHR;
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}
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else
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{
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/* It is a normal task or a pthread. Set user mode */
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xcp->regs[REG_EXC_RETURN] = EXC_RETURN_UNPRIVTHR;
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}
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#endif
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/* Enable or disable interrupts, based on user configuration */
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# ifdef CONFIG_SUPPRESS_INTERRUPTS
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@ -546,7 +546,8 @@ handlers:
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# error "Vectors not specified for this LM3S chip"
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#endif
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/* Common IRQ handling logic. On entry here, the stack is like the following:
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/* Common IRQ handling logic. On entry here, the return stack is on either
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* the PSP or the MSP and looks like the following:
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*
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* REG_XPSR
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* REG_R15
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@ -557,18 +558,38 @@ handlers:
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* REG_R1
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* MSP->REG_R0
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*
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* and R0 contains the IRQ number
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* And
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* R0 contains the IRQ number
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* R14 Contains the EXC_RETURN value
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* We are in handler mode and the current SP is the MSP
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*/
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lm3s_irqcommon:
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/* Complete the context save */
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#ifdef CONFIG_NUTTX_KERNEL
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/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
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* (handler mode) if the state is on the MSP. It can only be on the PSP if
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* EXC_RETURN is 0xfffffffd (unprivileged thread)
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*/
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adds r2, r14, #3 /* If R14=0xfffffffd, then r2 == 0 */
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ite ne /* Next two instructions are condition */
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mrsne r1, msp /* R1=The main stack pointer */
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mrseq r1, psp /* R1=The process stack pointer */
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#else
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mrs r1, msp /* R1=The main stack pointer */
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mov r2, r1 /* R2=Copy of the main stack pointer */
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add r2, #HW_XCPT_SIZE /* R2=MSP before the interrupt was taken */
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#endif
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mov r2, r1 /* R2=Copy of the main/process stack pointer */
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add r2, #HW_XCPT_SIZE /* R2=MSP/PSP before the interrupt was taken */
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mrs r3, primask /* R3=Current PRIMASK setting */
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#ifdef CONFIG_NUTTX_KERNEL
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stmdb r1!, {r2-r11,r14} /* Save the remaining registers plus the SP value */
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#else
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stmdb r1!, {r2-r11} /* Save the remaining registers plus the SP value */
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#endif
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/* Disable interrupts, select the stack to use for interrupt handling
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* and call up_doirq to handle the interrupt
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@ -581,7 +602,7 @@ lm3s_irqcommon:
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* Otherwise, we will re-use the main stack for interrupt level processing.
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*/
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#ifdef CONFIG_ARCH_INTERRUPTSTACK
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#if CONFIG_ARCH_INTERRUPTSTACK > 3
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ldr sp, =g_intstackbase
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str r1, [sp, #-4]! /* Save the MSP on the interrupt stack */
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bl up_doirq /* R0=IRQ, R1=register save (msp) */
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@ -610,23 +631,45 @@ lm3s_irqcommon:
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ldmia r1, {r4-r11} /* Fetch eight registers in HW save area */
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ldr r1, [r0, #(4*REG_SP)] /* R1=Value of SP before interrupt */
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stmdb r1!, {r4-r11} /* Store eight registers in HW save area */
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#ifdef CONFIG_NUTTX_KERNEL
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ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
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#else
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ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
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#endif
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b 2f /* Re-join common logic */
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/* We are returning with no context switch. We simply need to "unwind"
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* the same stack frame that we created
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*/
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1:
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ldmia r1!, {r2-r11} /* Recover R4-R11 + 2 temp values */
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#ifdef CONFIG_NUTTX_KERNEL
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ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
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#else
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ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
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#endif
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2:
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#ifdef CONFIG_NUTTX_KERNEL
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/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
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* (handler mode) if the state is on the MSP. It can only be on the PSP if
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* EXC_RETURN is 0xfffffffd (unprivileged thread)
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*/
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adds r0, r14, #3 /* If R14=0xfffffffd, then r0 == 0 */
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ite ne /* Next two instructions are condition */
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msrne msp, r1 /* R1=The main stack pointer */
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msreq psp, r1 /* R1=The process stack pointer */
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#else
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msr msp, r1 /* Recover the return MSP value */
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/* Restore the interrupt state. Preload r14 with the special return
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* value first (so that the return actually occurs with interrupts
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* still disabled).
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/* Preload r14 with the special return value first (so that the return
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* actually occurs with interrupts still disabled).
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*/
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ldr r14, =EXC_RETURN /* Load the special value */
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#endif
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/* Restore the interrupt state */
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msr primask, r3 /* Restore interrupts */
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/* Always return with R14 containing the special value that will: (1)
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@ -220,7 +220,8 @@ handlers:
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HANDLER lpc17_usbact, LPC17_IRQ_USBACT /* Vector 16+33: USB Activity Interrupt */
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HANDLER lpc17_canact, LPC17_IRQ_CANACT /* Vector 16+34: CAN Activity Interrupt */
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/* Common IRQ handling logic. On entry here, the stack is like the following:
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/* Common IRQ handling logic. On entry here, the return stack is on either
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* the PSP or the MSP and looks like the following:
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*
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* REG_XPSR
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* REG_R15
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@ -231,18 +232,38 @@ handlers:
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* REG_R1
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* MSP->REG_R0
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*
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* and R0 contains the IRQ number
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* And
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* R0 contains the IRQ number
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* R14 Contains the EXC_RETURN value
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* We are in handler mode and the current SP is the MSP
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*/
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lpc17_common:
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/* Complete the context save */
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#ifdef CONFIG_NUTTX_KERNEL
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/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
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* (handler mode) if the state is on the MSP. It can only be on the PSP if
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* EXC_RETURN is 0xfffffffd (unprivileged thread)
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*/
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adds r2, r14, #3 /* If R14=0xfffffffd, then r2 == 0 */
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ite ne /* Next two instructions are condition */
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mrsne r1, msp /* R1=The main stack pointer */
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mrseq r1, psp /* R1=The process stack pointer */
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#else
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mrs r1, msp /* R1=The main stack pointer */
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mov r2, r1 /* R2=Copy of the main stack pointer */
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add r2, #HW_XCPT_SIZE /* R2=MSP before the interrupt was taken */
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#endif
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mov r2, r1 /* R2=Copy of the main/process stack pointer */
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add r2, #HW_XCPT_SIZE /* R2=MSP/PSP before the interrupt was taken */
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mrs r3, primask /* R3=Current PRIMASK setting */
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#ifdef CONFIG_NUTTX_KERNEL
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stmdb r1!, {r2-r11,r14} /* Save the remaining registers plus the SP value */
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#else
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stmdb r1!, {r2-r11} /* Save the remaining registers plus the SP value */
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#endif
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/* Disable interrupts, select the stack to use for interrupt handling
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* and call up_doirq to handle the interrupt
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@ -257,13 +278,13 @@ lpc17_common:
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#if CONFIG_ARCH_INTERRUPTSTACK > 3
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ldr sp, =g_intstackbase
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str r1, [sp, #-4]! /* Save the MSP on the interrupt stack */
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bl up_doirq /* R0=IRQ, R1=register save (msp) */
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ldr r1, [sp, #+4]! /* Recover R1=main stack pointer */
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str r1, [sp, #-4]! /* Save the MSP on the interrupt stack */
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bl up_doirq /* R0=IRQ, R1=register save (msp) */
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ldr r1, [sp, #+4]! /* Recover R1=main stack pointer */
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#else
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mov sp, r1 /* We are using the main stack pointer */
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bl up_doirq /* R0=IRQ, R1=register save (msp) */
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mov r1, sp /* Recover R1=main stack pointer */
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mov sp, r1 /* We are using the main stack pointer */
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bl up_doirq /* R0=IRQ, R1=register save (msp) */
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mov r1, sp /* Recover R1=main stack pointer */
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#endif
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/* On return from up_doirq, R0 will hold a pointer to register context
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@ -271,8 +292,8 @@ lpc17_common:
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* as current stack pointer, then things are relatively easy.
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*/
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cmp r0, r1 /* Context switch? */
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beq 1f /* Branch if no context switch */
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cmp r0, r1 /* Context switch? */
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beq 1f /* Branch if no context switch */
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/* We are returning with a pending context switch. This case is different
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* because in this case, the register save structure does not lie on the
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@ -280,34 +301,56 @@ lpc17_common:
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* values to the stack.
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*/
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add r1, r0, #SW_XCPT_SIZE /* R1=Address of HW save area in reg array */
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ldmia r1, {r4-r11} /* Fetch eight registers in HW save area */
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add r1, r0, #SW_XCPT_SIZE /* R1=Address of HW save area in reg array */
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ldmia r1, {r4-r11} /* Fetch eight registers in HW save area */
|
||||
ldr r1, [r0, #(4*REG_SP)] /* R1=Value of SP before interrupt */
|
||||
stmdb r1!, {r4-r11} /* Store eight registers in HW save area */
|
||||
ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
|
||||
b 2f /* Re-join common logic */
|
||||
stmdb r1!, {r4-r11} /* Store eight registers in HW save area */
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
|
||||
#else
|
||||
ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
|
||||
#endif
|
||||
b 2f /* Re-join common logic */
|
||||
|
||||
/* We are returning with no context switch. We simply need to "unwind"
|
||||
* the same stack frame that we created
|
||||
*/
|
||||
1:
|
||||
ldmia r1!, {r2-r11} /* Recover R4-R11 + 2 temp values */
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
|
||||
#else
|
||||
ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
|
||||
#endif
|
||||
2:
|
||||
msr msp, r1 /* Recover the return MSP value */
|
||||
|
||||
/* Restore the interrupt state. Preload r14 with the special return
|
||||
* value first (so that the return actually occurs with interrupts
|
||||
* still disabled).
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
|
||||
* (handler mode) if the state is on the MSP. It can only be on the PSP if
|
||||
* EXC_RETURN is 0xfffffffd (unprivileged thread)
|
||||
*/
|
||||
|
||||
ldr r14, =EXC_RETURN /* Load the special value */
|
||||
msr primask, r3 /* Restore interrupts */
|
||||
adds r0, r14, #3 /* If R14=0xfffffffd, then r0 == 0 */
|
||||
ite ne /* Next two instructions are condition */
|
||||
msrne msp, r1 /* R1=The main stack pointer */
|
||||
msreq psp, r1 /* R1=The process stack pointer */
|
||||
#else
|
||||
msr msp, r1 /* Recover the return MSP value */
|
||||
|
||||
/* Preload r14 with the special return value first (so that the return
|
||||
* actually occurs with interrupts still disabled).
|
||||
*/
|
||||
|
||||
ldr r14, =EXC_RETURN /* Load the special value */
|
||||
#endif
|
||||
|
||||
/* Restore the interrupt state */
|
||||
|
||||
msr primask, r3 /* Restore interrupts */
|
||||
|
||||
/* Always return with R14 containing the special value that will: (1)
|
||||
* return to thread mode, and (2) continue to use the MSP
|
||||
*/
|
||||
|
||||
bx r14 /* And return */
|
||||
bx r14 /* And return */
|
||||
.size handlers, .-handlers
|
||||
|
||||
/************************************************************************************************
|
||||
|
||||
@ -211,7 +211,8 @@ handlers:
|
||||
HANDLER sam3u_dmac, SAM3U_IRQ_DMAC /* Vector 16+28: DMA Controller */
|
||||
HANDLER sam3u_udphs, SAM3U_IRQ_UDPHS /* Vector 16+29: USB Device High Speed */
|
||||
|
||||
/* Common IRQ handling logic. On entry here, the stack is like the following:
|
||||
/* Common IRQ handling logic. On entry here, the return stack is on either
|
||||
* the PSP or the MSP and looks like the following:
|
||||
*
|
||||
* REG_XPSR
|
||||
* REG_R15
|
||||
@ -222,18 +223,38 @@ handlers:
|
||||
* REG_R1
|
||||
* MSP->REG_R0
|
||||
*
|
||||
* and R0 contains the IRQ number
|
||||
* And
|
||||
* R0 contains the IRQ number
|
||||
* R14 Contains the EXC_RETURN value
|
||||
* We are in handler mode and the current SP is the MSP
|
||||
*/
|
||||
|
||||
sam3u_common:
|
||||
|
||||
/* Complete the context save */
|
||||
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
|
||||
* (handler mode) if the state is on the MSP. It can only be on the PSP if
|
||||
* EXC_RETURN is 0xfffffffd (unprivileged thread)
|
||||
*/
|
||||
|
||||
adds r2, r14, #3 /* If R14=0xfffffffd, then r2 == 0 */
|
||||
ite ne /* Next two instructions are condition */
|
||||
mrsne r1, msp /* R1=The main stack pointer */
|
||||
mrseq r1, psp /* R1=The process stack pointer */
|
||||
#else
|
||||
mrs r1, msp /* R1=The main stack pointer */
|
||||
mov r2, r1 /* R2=Copy of the main stack pointer */
|
||||
add r2, #HW_XCPT_SIZE /* R2=MSP before the interrupt was taken */
|
||||
#endif
|
||||
|
||||
mov r2, r1 /* R2=Copy of the main/process stack pointer */
|
||||
add r2, #HW_XCPT_SIZE /* R2=MSP/PSP before the interrupt was taken */
|
||||
mrs r3, primask /* R3=Current PRIMASK setting */
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
stmdb r1!, {r2-r11,r14} /* Save the remaining registers plus the SP value */
|
||||
#else
|
||||
stmdb r1!, {r2-r11} /* Save the remaining registers plus the SP value */
|
||||
#endif
|
||||
|
||||
/* Disable interrupts, select the stack to use for interrupt handling
|
||||
* and call up_doirq to handle the interrupt
|
||||
@ -246,7 +267,7 @@ sam3u_common:
|
||||
* Otherwise, we will re-use the main stack for interrupt level processing.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ARCH_INTERRUPTSTACK
|
||||
#if CONFIG_ARCH_INTERRUPTSTACK > 3
|
||||
ldr sp, =g_intstackbase
|
||||
str r1, [sp, #-4]! /* Save the MSP on the interrupt stack */
|
||||
bl up_doirq /* R0=IRQ, R1=register save (msp) */
|
||||
@ -275,23 +296,45 @@ sam3u_common:
|
||||
ldmia r1, {r4-r11} /* Fetch eight registers in HW save area */
|
||||
ldr r1, [r0, #(4*REG_SP)] /* R1=Value of SP before interrupt */
|
||||
stmdb r1!, {r4-r11} /* Store eight registers in HW save area */
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
|
||||
#else
|
||||
ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
|
||||
#endif
|
||||
b 2f /* Re-join common logic */
|
||||
|
||||
/* We are returning with no context switch. We simply need to "unwind"
|
||||
* the same stack frame that we created
|
||||
*/
|
||||
1:
|
||||
ldmia r1!, {r2-r11} /* Recover R4-R11 + 2 temp values */
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
|
||||
#else
|
||||
ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
|
||||
#endif
|
||||
2:
|
||||
msr msp, r1 /* Recover the return MSP value */
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
|
||||
* (handler mode) if the state is on the MSP. It can only be on the PSP if
|
||||
* EXC_RETURN is 0xfffffffd (unprivileged thread)
|
||||
*/
|
||||
|
||||
/* Restore the interrupt state. Preload r14 with the special return
|
||||
* value first (so that the return actually occurs with interrupts
|
||||
* still disabled).
|
||||
adds r0, r14, #3 /* If R14=0xfffffffd, then r0 == 0 */
|
||||
ite ne /* Next two instructions are condition */
|
||||
msrne msp, r1 /* R1=The main stack pointer */
|
||||
msreq psp, r1 /* R1=The process stack pointer */
|
||||
#else
|
||||
msr msp, r1 /* Recover the return MSP value */
|
||||
|
||||
/* Preload r14 with the special return value first (so that the return
|
||||
* actually occurs with interrupts still disabled).
|
||||
*/
|
||||
|
||||
ldr r14, =EXC_RETURN /* Load the special value */
|
||||
#endif
|
||||
|
||||
/* Restore the interrupt state */
|
||||
|
||||
msr primask, r3 /* Restore interrupts */
|
||||
|
||||
/* Always return with R14 containing the special value that will: (1)
|
||||
|
||||
@ -403,7 +403,8 @@ handlers:
|
||||
HANDLER stm32_dma2ch45, STM32_IRQ_DMA2CH45 /* Vector 16+59: DMA2 Channel 4&5 global interrupt */
|
||||
#endif
|
||||
|
||||
/* Common IRQ handling logic. On entry here, the stack is like the following:
|
||||
/* Common IRQ handling logic. On entry here, the return stack is on either
|
||||
* the PSP or the MSP and looks like the following:
|
||||
*
|
||||
* REG_XPSR
|
||||
* REG_R15
|
||||
@ -414,18 +415,38 @@ handlers:
|
||||
* REG_R1
|
||||
* MSP->REG_R0
|
||||
*
|
||||
* and R0 contains the IRQ number
|
||||
* And
|
||||
* R0 contains the IRQ number
|
||||
* R14 Contains the EXC_RETURN value
|
||||
* We are in handler mode and the current SP is the MSP
|
||||
*/
|
||||
|
||||
stm32_common:
|
||||
|
||||
/* Complete the context save */
|
||||
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
|
||||
* (handler mode) if the state is on the MSP. It can only be on the PSP if
|
||||
* EXC_RETURN is 0xfffffffd (unprivileged thread)
|
||||
*/
|
||||
|
||||
adds r2, r14, #3 /* If R14=0xfffffffd, then r2 == 0 */
|
||||
ite ne /* Next two instructions are condition */
|
||||
mrsne r1, msp /* R1=The main stack pointer */
|
||||
mrseq r1, psp /* R1=The process stack pointer */
|
||||
#else
|
||||
mrs r1, msp /* R1=The main stack pointer */
|
||||
mov r2, r1 /* R2=Copy of the main stack pointer */
|
||||
add r2, #HW_XCPT_SIZE /* R2=MSP before the interrupt was taken */
|
||||
#endif
|
||||
|
||||
mov r2, r1 /* R2=Copy of the main/process stack pointer */
|
||||
add r2, #HW_XCPT_SIZE /* R2=MSP/PSP before the interrupt was taken */
|
||||
mrs r3, primask /* R3=Current PRIMASK setting */
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
stmdb r1!, {r2-r11,r14} /* Save the remaining registers plus the SP value */
|
||||
#else
|
||||
stmdb r1!, {r2-r11} /* Save the remaining registers plus the SP value */
|
||||
#endif
|
||||
|
||||
/* Disable interrupts, select the stack to use for interrupt handling
|
||||
* and call up_doirq to handle the interrupt
|
||||
@ -438,7 +459,7 @@ stm32_common:
|
||||
* Otherwise, we will re-use the main stack for interrupt level processing.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ARCH_INTERRUPTSTACK
|
||||
#if CONFIG_ARCH_INTERRUPTSTACK > 3
|
||||
ldr sp, =g_intstackbase
|
||||
str r1, [sp, #-4]! /* Save the MSP on the interrupt stack */
|
||||
bl up_doirq /* R0=IRQ, R1=register save (msp) */
|
||||
@ -467,23 +488,45 @@ stm32_common:
|
||||
ldmia r1, {r4-r11} /* Fetch eight registers in HW save area */
|
||||
ldr r1, [r0, #(4*REG_SP)] /* R1=Value of SP before interrupt */
|
||||
stmdb r1!, {r4-r11} /* Store eight registers in HW save area */
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
|
||||
#else
|
||||
ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
|
||||
#endif
|
||||
b 2f /* Re-join common logic */
|
||||
|
||||
/* We are returning with no context switch. We simply need to "unwind"
|
||||
* the same stack frame that we created
|
||||
*/
|
||||
1:
|
||||
ldmia r1!, {r2-r11} /* Recover R4-R11 + 2 temp values */
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
ldmia r0, {r2-r11,r14} /* Recover R4-R11, r14 + 2 temp values */
|
||||
#else
|
||||
ldmia r0, {r2-r11} /* Recover R4-R11 + 2 temp values */
|
||||
#endif
|
||||
2:
|
||||
#ifdef CONFIG_NUTTX_KERNEL
|
||||
/* The EXC_RETURN value will be 0xfffffff9 (privileged thread) or 0xfffffff1
|
||||
* (handler mode) if the state is on the MSP. It can only be on the PSP if
|
||||
* EXC_RETURN is 0xfffffffd (unprivileged thread)
|
||||
*/
|
||||
|
||||
adds r0, r14, #3 /* If R14=0xfffffffd, then r0 == 0 */
|
||||
ite ne /* Next two instructions are condition */
|
||||
msrne msp, r1 /* R1=The main stack pointer */
|
||||
msreq psp, r1 /* R1=The process stack pointer */
|
||||
#else
|
||||
msr msp, r1 /* Recover the return MSP value */
|
||||
|
||||
/* Restore the interrupt state. Preload r14 with the special return
|
||||
* value first (so that the return actually occurs with interrupts
|
||||
* still disabled).
|
||||
/* Preload r14 with the special return value first (so that the return
|
||||
* actually occurs with interrupts still disabled).
|
||||
*/
|
||||
|
||||
ldr r14, =EXC_RETURN /* Load the special value */
|
||||
#endif
|
||||
|
||||
/* Restore the interrupt state */
|
||||
|
||||
msr primask, r3 /* Restore interrupts */
|
||||
|
||||
/* Always return with R14 containing the special value that will: (1)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user