Redesign of the LPC178x GPIO logic by Rommel Marcelo
This commit is contained in:
parent
31804030b2
commit
f66e89b8cf
@ -320,6 +320,8 @@
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#define IOCON_ADMODE_MASK (1 << IOCON_ADMODE_SHIFT)
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#define IOCON_FILTER_SHIFT (8) /* Bit 8: Type A */
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#define IOCON_FILTER_MASK (1 << IOCON_FILTER_SHIFT)
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#define IOCON_I2CHS_SHIFT (8)/* Bits 8: Type I */
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#define IOCON_I2CHS_MASK (1 << IOCON_I2CHS_SHIFT)
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#define IOCON_SLEW_SHIFT (9) /* Bit 9: Type W */
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#define IOCON_SLEW_MASK (1 << IOCON_SLEW_SHIFT)
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#define IOCON_HIDRIVE_SHIFT (9) /* Bit 9: Type I */
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@ -344,6 +346,20 @@
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#define IOCON_TYPE_I_MASK (0x00000347) /* I2C/USB P0:27-28, P5:2-3 */
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#define IOCON_TYPE_W_MASK (0x000007ff) /* I2S P0:7-9 */
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/* Slew rate modes */
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#define IOCON_SLEWMODE_NORMAL (0 << IOCON_SLEW_SHIFT)
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#define IOCON_SLEWMODE_FAST (1 << IOCON_SLEW_SHIFT)
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/* I2C modes */
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#define IOCON_I2CMODE_SHIFT (IOCON_I2CHS_SHIFT)
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#define IOCON_I2CMODE_MASK (3 << IOCON_I2CMODE_SHIFT)
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#define IOCON_I2CMODE_FAST (0 << IOCON_I2CMODE_SHIFT)
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#define IOCON_I2CMODE_FASTPLUS (1 << IOCON_I2CMODE_SHIFT)/* */
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#define IOCON_I2CMODE_HIOPENDRAIN (2 << IOCON_I2CMODE_SHIFT)/* */
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#define IOCON_I2CMODE_OPENDRAIN (3 << IOCON_I2CMODE_SHIFT)/* */
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/************************************************************************************
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* Public Types
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************************************************************************************/
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@ -119,10 +119,10 @@ const uint32_t g_intbase[GPIO_NPORTS] =
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****************************************************************************/
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/****************************************************************************
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* Name: lpc17_configiocon
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* Name: lpc17_getioconmask
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*
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* Description:
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* Set the LPC178x IOCON register
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* Get the LPC178x IOCON register mask.
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*
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* Type D: FUNC, MODE, HYS, INV, SLEW, OD -
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* Type A: FUNC, MODE, INV, ADMODE, FILTER, OD, DACEN -P0[12:13,23:26],P1[30:31]
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@ -132,11 +132,9 @@ const uint32_t g_intbase[GPIO_NPORTS] =
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*
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****************************************************************************/
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static int lpc17_configiocon(unsigned int port, unsigned int pin,
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unsigned int value)
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#if 0 /* Not used */
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static uint32_t lpc17_getioconmask(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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uint32_t typemask = IOCON_TYPE_D_MASK;
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/* Select the mask based on pin usage */
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@ -207,13 +205,352 @@ static int lpc17_configiocon(unsigned int port, unsigned int pin,
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break;
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}
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return typemask;
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}
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#endif
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/****************************************************************************
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* Name: lpc17_seti2cmode
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*
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* Description:
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* Configure I2C pin drive mode. Applies to Type I pins
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*
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****************************************************************************/
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#if 0 /* Not used */
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static void lpc17_seti2cmode(unsigned int port,unsigned int pin, uint32_t value)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval |= value;
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regval &= typemask;
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regval &= ~IOCON_I2CMODE_MASK;
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regval |= ((value << IOCON_I2CMODE_SHIFT) & IOCON_I2CMODE_MASK);
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putreg32(regval, regaddr);
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}
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#endif
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return OK;
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/****************************************************************************
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* Name: lpc17_setpinfunction
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*
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* Description:
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* Select pin function.
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*
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****************************************************************************/
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static void lpc17_setpinfunction(unsigned int port, unsigned int pin,
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unsigned int value)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval &= ~IOCON_FUNC_MASK;
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regval |= ((value << IOCON_FUNC_SHIFT) & IOCON_FUNC_MASK);
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putreg32(regval, regaddr);
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}
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/****************************************************************************
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* Name: lpc17_setinvertinput
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*
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* Description:
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* Configure pin input polarity. Applies to Type D, A, I and W pins.
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*
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****************************************************************************/
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#if 0 /* Not used */
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static void lpc17_setinvertinput(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval |= IOCON_INV_MASK;
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putreg32(regval, regaddr);
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}
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#endif
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/****************************************************************************
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* Name: lpc17_setslewfast
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*
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* Description:
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* Configure pin mode slew rate drive. Applies to Type D and Type W pins
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*
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****************************************************************************/
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static void lpc17_setslewfast(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval |= IOCON_SLEW_MASK;
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putreg32(regval, regaddr);
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}
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/****************************************************************************
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* Name: lpc17_setslewnormal
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*
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* Description:
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* Configure pin mode slew rate drive. Applies to Type D and Type W pins
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*
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****************************************************************************/
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static void lpc17_setslewnormal(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval &= ~IOCON_SLEW_MASK;
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putreg32(regval, regaddr);
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}
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/****************************************************************************
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* Name: lpc17_setmodedigital
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*
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* Description:
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* Configure pin mode as analog or digital IO. Applies to Type A pins
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*
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****************************************************************************/
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#if 0 /* Not used */
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static void lpc17_setmodedigital(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval |= IOCON_ADMODE_MASK;
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putreg32(regval, regaddr);
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}
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#endif
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/****************************************************************************
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* Name: lpc17_setmodeanalog
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*
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* Description:
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* Configure pin mode as analog or digital IO. Applies to Type A pins
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*
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****************************************************************************/
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#if 0 /* Not used */
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static void lpc17_setmodeanalog(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval &= ~IOCON_ADMODE_MASK;
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putreg32(regval, regaddr);
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}
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#endif
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/****************************************************************************
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* Name: lpc17_setdacenable
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*
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* Description:
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* Configure DAC output. Applies to Type A pins P0:26 only
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*
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****************************************************************************/
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#if 0 /* Not used */
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static void lpc17_setdacenable(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval |= IOCON_DACEN_MASK;
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putreg32(regval, regaddr);
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}
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#endif
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/****************************************************************************
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* Name: lpc17_setdacdisable
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*
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* Description:
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* Configure DAC output. Applies to Type A pins P0:26 only
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*
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****************************************************************************/
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#if 0 /* Not used */
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static void lpc17_setdacdisable(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval &= ~IOCON_DACEN_MASK;
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putreg32(regval, regaddr);
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}
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#endif
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/****************************************************************************
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* Name: lpc17_setfilter
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*
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* Description:
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* Configure analog pin's glitch filter. Applies to Type A and Type W pins
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*
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****************************************************************************/
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#if 0 /* Not used */
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static void lpc17_setfilter(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval &= ~IOCON_FILTER_MASK;
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putreg32(regval, regaddr);
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}
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#endif
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/****************************************************************************
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* Name: lpc17_clrfilter
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*
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* Description:
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* Configure analog pin's glitch filter. Applies to Type A and Type W pins
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*
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****************************************************************************/
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#if 0 /* Not used */
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static void lpc17_clrfilter(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval |= IOCON_FILTER_MASK;
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putreg32(regval, regaddr);
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}
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#endif
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/****************************************************************************
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* Name: lpc17_setopendrain
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*
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* Description:
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* Configure a GPIO's opendrain mode. Applies to Type A, Type D, and
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* Type W pins.
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*
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****************************************************************************/
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static void lpc17_setopendrain(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval |= IOCON_OD_MASK;
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putreg32(regval, regaddr);
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}
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/****************************************************************************
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* Name: lpc17_clropendrain
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*
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* Description:
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* Configure a GPIO's opendrain mode. Applies to Type A, Type D, and
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* Type W pins.
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*
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****************************************************************************/
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static void lpc17_clropendrain(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval &= ~IOCON_OD_MASK;
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putreg32(regval, regaddr);
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}
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/****************************************************************************
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* Name: lpc17_clrhysteresis
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*
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* Description:
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* Configure a GPIO's hysteresis mode. Applies to Type D and Type W pins
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* Default is enabled.
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*
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****************************************************************************/
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#if 0 /* Not used */
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static void lpc17_clrhysteresis(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval &= ~IOCON_HYS_MASK;
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putreg32(regval, regaddr);
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}
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#endif
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/****************************************************************************
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* Name: lpc17_sethysteresis
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*
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* Description:
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* Configure a GPIO's hysteresis mode. Applies to Type D and Type W pins
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* Default is enabled.
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*
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****************************************************************************/
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#if 0 /* Not used */
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static void lpc17_sethysteresis(unsigned int port, unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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regval |= IOCON_HYS_MASK;
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putreg32(regval, regaddr);
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}
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#endif
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/****************************************************************************
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* Name: lpc17_pullup
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*
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* Description:
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* Clear and set the pin mode bits. Applies to Type A, Type D, and
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* Type W pins.
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*
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****************************************************************************/
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static void lpc17_setpullup(lpc17_pinset_t cfgset, unsigned int port,
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unsigned int pin)
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{
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uint32_t regaddr;
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uint32_t regval;
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uint32_t pinmode;
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/* Decode the request pull-up mode */
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pinmode = ((cfgset & GPIO_PUMODE_MASK) >> GPIO_PUMODE_SHIFT);
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/* Get the current IOCON register contents */
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regaddr = LPC17_IOCON_P(port, pin);
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regval = getreg32(regaddr);
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/* Set the new mode bits */
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regval &= ~IOCON_MODE_MASK;
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regval |= (pinmode << IOCON_MODE_SHIFT);
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putreg32(regval, regaddr);
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}
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/****************************************************************************
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@ -259,11 +596,12 @@ static void lpc17_setintedge(unsigned int port, unsigned int pin,
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* Name: lpc17_configinput
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*
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* Description:
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* Configure a GPIO inpue pin based on bit-encoded description of the pin.
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* Configure a GPIO input pin based on bit-encoded description of the pin.
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*
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****************************************************************************/
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static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port, unsigned int pin)
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static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port,
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unsigned int pin)
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{
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uint32_t regval;
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uint32_t fiobase;
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@ -276,7 +614,7 @@ static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port, un
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/* Set as input */
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regval = getreg32(fiobase + LPC17_FIO_DIR_OFFSET);
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regval = getreg32(fiobase + LPC17_FIO_DIR_OFFSET);
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regval &= ~pinmask;
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putreg32(regval, fiobase + LPC17_FIO_DIR_OFFSET);
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@ -293,7 +631,7 @@ static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port, un
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/* Disable any falling edge interrupts */
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regval = getreg32(intbase + LPC17_GPIOINT_INTENF_OFFSET);
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regval = getreg32(intbase + LPC17_GPIOINT_INTENF_OFFSET);
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regval &= ~pinmask;
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putreg32(regval, intbase + LPC17_GPIOINT_INTENF_OFFSET);
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@ -304,36 +642,26 @@ static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port, un
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#endif
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}
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/* Set up PINSEL registers */
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/* Configure the pin as a GPIO. Clear opendrain, input inversion,
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* hysteris, slew. Set analog pins as digital.
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*/
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/* Configure as GPIO */
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regval = IOCON_FUNC_GPIO;
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lpc17_setpinfunction(port, pin, IOCON_FUNC_GPIO);
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/* Set pull-up mode. Isolate the field from the cfgset and move it
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* into the correct position in the register value.
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*/
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/* Set pull-up mode */
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regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PUMODE_SHIFT) << IOCON_MODE_SHIFT);
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lpc17_setpullup(cfgset, port, pin);
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/* Select input polarity */
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/* Clear opendrain */
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if ((cfgset & GPIO_INVERT) != 0)
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{
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regval |= IOCON_INV_MASK;
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}
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lpc17_clropendrain(port, pin);
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/* Select hysteresis enable */
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/* Set analog pins as digital */
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//Todo
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if ((cfgset & GPIO_HYSTERESIS) != 0)
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{
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regval |= IOCON_HYS_MASK;
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}
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/* Set input polarity */
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//Todo
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/* Set IOCON register */
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lpc17_configiocon(port, pin, regval);
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/* Set hysteresis mode */
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//Todo
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return OK;
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}
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@ -391,39 +719,42 @@ static inline int lpc17_configoutput(lpc17_pinset_t cfgset, unsigned int port,
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regval |= (1 << pin);
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||||
putreg32(regval, fiobase + LPC17_FIO_DIR_OFFSET);
|
||||
|
||||
/* Configure the pin as a GPIO. Clear opendrain, input inversion,
|
||||
* hysteris, slew. Set analog pins as digital.
|
||||
*/
|
||||
|
||||
regval = IOCON_FUNC_GPIO;
|
||||
|
||||
/* Select open drain output */
|
||||
/* Check for open drain output */
|
||||
|
||||
if ((cfgset & GPIO_OPEN_DRAIN) != 0)
|
||||
{
|
||||
regval |= IOCON_OD_MASK;
|
||||
/* Set pull-up mode. This normally only applies to input pins, but does have
|
||||
* meaning if the port is an open drain output.
|
||||
*/
|
||||
|
||||
lpc17_setpullup(cfgset, port, pin);
|
||||
|
||||
/* Select open drain output */
|
||||
|
||||
lpc17_setopendrain(port, pin);
|
||||
}
|
||||
|
||||
/* Select slew output */
|
||||
/* Check for slew rate output */
|
||||
|
||||
if ((cfgset & GPIO_SLEW) != 0)
|
||||
{
|
||||
regval |= IOCON_SLEW_MASK;
|
||||
/* Slew rate is normal mode at reset */
|
||||
|
||||
lpc17_setslewfast(port, pin);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* But we still may need to set the normal mode because we may
|
||||
* be reconfiguring the GPIO pin.
|
||||
*/
|
||||
|
||||
/* Set pull-up mode. Isolate the field from the cfgset and move it
|
||||
* into the correct position in the register value.
|
||||
*/
|
||||
|
||||
regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PUMODE_SHIFT) << IOCON_MODE_SHIFT);
|
||||
|
||||
/* Set IOCON register */
|
||||
|
||||
lpc17_configiocon(port, pin, regval);
|
||||
lpc17_setslewnormal(port, pin);
|
||||
}
|
||||
|
||||
/* Set the initial value of the output */
|
||||
|
||||
lpc17_gpiowrite(cfgset, ((cfgset & GPIO_VALUE) != GPIO_VALUE_ZERO));
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
@ -439,8 +770,6 @@ static inline int lpc17_configoutput(lpc17_pinset_t cfgset, unsigned int port,
|
||||
static int lpc17_configalternate(lpc17_pinset_t cfgset, unsigned int port,
|
||||
unsigned int pin, uint32_t alt)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* First, configure the port as an input so that we have a known
|
||||
* starting point and consistent behavior during the re-configuration.
|
||||
*/
|
||||
@ -449,32 +778,24 @@ static int lpc17_configalternate(lpc17_pinset_t cfgset, unsigned int port,
|
||||
|
||||
/* Select the alternate pin */
|
||||
|
||||
regval = (alt & IOCON_FUNC_MASK);
|
||||
lpc17_setpinfunction(port, pin, alt);
|
||||
|
||||
/* Select analog mode */
|
||||
/* Set IO mode: Analog/Digital */
|
||||
//Todo
|
||||
|
||||
if ((cfgset & GPIO_ADMODE) != 0)
|
||||
{
|
||||
regval |= IOCON_ADMODE_MASK;
|
||||
}
|
||||
/* Set pull-up mode */
|
||||
|
||||
/* Set pull-up mode. Isolate the field from the cfgset and move it
|
||||
* into the correct position in the register value.
|
||||
*/
|
||||
lpc17_setpullup(cfgset, port, pin);
|
||||
|
||||
regval |= (((cfgset & GPIO_PUMODE_MASK) >> GPIO_PUMODE_SHIFT) << IOCON_MODE_SHIFT);
|
||||
|
||||
/* Select open drain output */
|
||||
/* Check for open drain output */
|
||||
|
||||
if ((cfgset & GPIO_OPEN_DRAIN) != 0)
|
||||
{
|
||||
regval |= IOCON_OD_MASK;
|
||||
/* Select open drain output */
|
||||
|
||||
lpc17_setopendrain(port, pin);
|
||||
}
|
||||
|
||||
/* Set IOCON register */
|
||||
|
||||
lpc17_configiocon(port, pin, regval);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
@ -494,6 +815,7 @@ int lpc17_configgpio(lpc17_pinset_t cfgset)
|
||||
{
|
||||
unsigned int port;
|
||||
unsigned int pin;
|
||||
|
||||
int ret = -EINVAL;
|
||||
|
||||
/* Verify that this hardware supports the select GPIO port */
|
||||
@ -501,7 +823,9 @@ int lpc17_configgpio(lpc17_pinset_t cfgset)
|
||||
port = (cfgset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
|
||||
if (port < GPIO_NPORTS)
|
||||
{
|
||||
/* Get the pin number and select the port configuration register for that pin */
|
||||
/* Get the pin number and select the port configuration register for
|
||||
* that pin.
|
||||
*/
|
||||
|
||||
pin = (cfgset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user