ARM: Move address environment switch from the task switchers to the interrupt handler. That may save doing the actin multiple times per interrupt
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27bf67c2d0
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@ -95,6 +95,7 @@ void up_doirq(int irq, uint32_t *regs)
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irq_dispatch(irq, regs);
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#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
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/* Check for a context switch. If a context switch occurred, then
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* current_regs will have a different value than it did on entry. If an
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* interrupt level context switch has occurred, then restore the floating
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@ -102,7 +103,6 @@ void up_doirq(int irq, uint32_t *regs)
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* returning from the interrupt.
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*/
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#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
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if (regs != current_regs)
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{
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#ifdef CONFIG_ARCH_FPU
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@ -95,6 +95,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
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irq_dispatch(irq, regs);
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#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
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/* Check for a context switch. If a context switch occurred, then
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* current_regs will have a different value than it did on entry. If an
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* interrupt level context switch has occurred, then restore the floating
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@ -102,7 +103,6 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
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* returning from the interrupt.
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*/
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#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
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if (regs != current_regs)
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{
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#ifdef CONFIG_ARCH_FPU
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@ -1,8 +1,7 @@
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/********************************************************************************
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* arch/arm/src/dm320/dm320_decodeirq.c
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* arch/arm/src/chip/dm320_decodeirq.c
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*
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* Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2007, 2009, 2011, 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -50,6 +49,8 @@
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#include "up_arch.h"
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#include "up_internal.h"
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#include "group/group.h"
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/********************************************************************************
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* Pre-processor Definitions
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********************************************************************************/
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@ -67,7 +68,7 @@
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********************************************************************************/
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/********************************************************************************
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* Public Funtions
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* Public Functions
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********************************************************************************/
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void up_decodeirq(uint32_t* regs)
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@ -93,29 +94,56 @@ void up_decodeirq(uint32_t* regs)
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if ((unsigned)irq < NR_IRQS)
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{
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uint32_t *savestate;
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/* Mask and acknowledge the interrupt */
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up_maskack_irq(irq);
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/* Current regs non-zero indicates that we are processing an interrupt;
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* current_regs is also used to manage interrupt level context switches.
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*
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* Nested interrupts are not supported.
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*/
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savestate = (uint32_t*)current_regs;
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DEBUGASSERT(current_regs == NULL);
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current_regs = regs;
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/* Deliver the IRQ */
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irq_dispatch(irq, regs);
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/* Restore the previous value of current_regs. NULL would indicate that
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* we are no longer in an interrupt handler. It will be non-NULL if we
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* are returning from a nested interrupt.
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#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
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/* Check for a context switch. If a context switch occurred, then
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* current_regs will have a different value than it did on entry.
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* If an interrupt level context switch has occurred, then restore
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* the floating point state and the establish the correct address
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* environment before returning from the interrupt.
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*/
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current_regs = savestate;
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if (regs != current_regs)
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{
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#ifdef CONFIG_ARCH_FPU
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/* Restore floating point registers */
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up_restorefpu((uint32_t*)current_regs);
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#endif
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#ifdef CONFIG_ARCH_ADDRENV
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/* Make sure that the address environment for the previously
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* running task is closed down gracefully (data caches dump,
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* MMU flushed) and set up the address environment for the new
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* thread at the head of the ready-to-run list.
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*/
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(void)group_addrenv(rtcb);
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#endif
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}
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#endif
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/* Set current_regs to NULL to indicate that we are no longer in
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* an interrupt handler.
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*/
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current_regs = NULL;
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/* Unmask the last interrupt (global interrupts are still
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* disabled).
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@ -1,8 +1,7 @@
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/********************************************************************************
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* arch/arm/src/imx/imx_decodeirq.c
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* arch/arm/src/chip/imx_decodeirq.c
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*
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* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2009, 2011, 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -50,6 +49,8 @@
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#include "up_arch.h"
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#include "up_internal.h"
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#include "group/group.h"
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/********************************************************************************
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* Pre-processor Definitions
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********************************************************************************/
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@ -67,7 +68,7 @@
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********************************************************************************/
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/********************************************************************************
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* Public Funtions
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* Public Functions
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********************************************************************************/
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void up_decodeirq(uint32_t* regs)
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@ -77,15 +78,16 @@ void up_decodeirq(uint32_t* regs)
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current_regs = regs;
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PANIC();
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#else
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uint32_t* savestate;
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uint32_t regval;
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int irq;
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/* Current regs non-zero indicates that we are processing an interrupt;
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* current_regs is also used to manage interrupt level context switches.
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*
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* Nested interrupts are not supported.
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*/
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savestate = (uint32_t*)current_regs;
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DEBUGASSERT(current_regs == NULL);
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current_regs = regs;
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/* Loop while there are pending interrupts to be processed */
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@ -116,6 +118,33 @@ void up_decodeirq(uint32_t* regs)
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irq_dispatch(irq, regs);
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#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
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/* Check for a context switch. If a context switch occurred, then
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* current_regs will have a different value than it did on entry.
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* If an interrupt level context switch has occurred, then restore
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* the floating point state and the establish the correct address
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* environment before returning from the interrupt.
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*/
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if (regs != current_regs)
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{
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#ifdef CONFIG_ARCH_FPU
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/* Restore floating point registers */
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up_restorefpu((uint32_t*)current_regs);
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#endif
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#ifdef CONFIG_ARCH_ADDRENV
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/* Make sure that the address environment for the previously
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* running task is closed down gracefully (data caches dump,
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* MMU flushed) and set up the address environment for the new
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* thread at the head of the ready-to-run list.
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*/
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(void)group_addrenv(rtcb);
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#endif
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}
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#endif
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/* Unmask the last interrupt (global interrupts are still
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* disabled).
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*/
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@ -125,11 +154,10 @@ void up_decodeirq(uint32_t* regs)
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}
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while (irq < NR_IRQS);
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/* Restore the previous value of current_regs. NULL would indicate that
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* we are no longer in an interrupt handler. It will be non-NULL if we
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* are returning from a nested interrupt.
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/* Set current_regs to NULL to indicate that we are no longer in
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* an interrupt handler.
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*/
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current_regs = savestate;
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current_regs = NULL;
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#endif
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}
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@ -2,7 +2,7 @@
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* arch/arm/src/lpc31xx/lpc31_decodeirq.c
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* arch/arm/src/chip/lpc31_decodeirq.c
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -50,6 +50,7 @@
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#include "up_arch.h"
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#include "up_internal.h"
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#include "group/group.h"
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#include "lpc31_intc.h"
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@ -101,29 +102,55 @@ void up_decodeirq(uint32_t *regs)
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if ((unsigned)irq < NR_IRQS)
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{
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uint32_t* savestate;
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/* Mask and acknowledge the interrupt */
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up_maskack_irq(irq);
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/* Current regs non-zero indicates that we are processing an interrupt;
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* current_regs is also used to manage interrupt level context switches.
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*
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* Nested interrupts are not supported.
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*/
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savestate = (uint32_t*)current_regs;
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DEBUGASSERT(current_regs == NULL);
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current_regs = regs;
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/* Deliver the IRQ */
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irq_dispatch(irq, regs);
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/* Restore the previous value of current_regs. NULL would indicate that
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* we are no longer in an interrupt handler. It will be non-NULL if we
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* are returning from a nested interrupt.
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#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
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/* Check for a context switch. If a context switch occurred, then
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* current_regs will have a different value than it did on entry.
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* If an interrupt level context switch has occurred, then restore
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* the floating point state and the establish the correct address
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* environment before returning from the interrupt.
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*/
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current_regs = savestate;
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if (regs != current_regs)
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{
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#ifdef CONFIG_ARCH_FPU
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/* Restore floating point registers */
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up_restorefpu((uint32_t*)current_regs);
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#endif
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#ifdef CONFIG_ARCH_ADDRENV
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/* Make sure that the address environment for the previously
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* running task is closed down gracefully (data caches dump,
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* MMU flushed) and set up the address environment for the new
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* thread at the head of the ready-to-run list.
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*/
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(void)group_addrenv(rtcb);
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#endif
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}
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#endif
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/* Set current_regs to NULL to indicate that we are no longer in an
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* interrupt handler.
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*/
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current_regs = NULL;
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/* Unmask the last interrupt (global interrupts are still
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* disabled).
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