ARM: Move address environment switch from the task switchers to the interrupt handler. That may save doing the actin multiple times per interrupt

arch/arm/src/arm/up_doirq.c

@@ -95,6 +95,7 @@ void up_doirq(int irq, uint32_t *regs)
 
   irq_dispatch(irq, regs);
 
+#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
   /* Check for a context switch.  If a context switch occurred, then
    * current_regs will have a different value than it did on entry.  If an
    * interrupt level context switch has occurred, then restore the floating
@@ -102,7 +103,6 @@ void up_doirq(int irq, uint32_t *regs)
    * returning from the interrupt.
    */
 
-#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
   if (regs != current_regs)
     {
 #ifdef CONFIG_ARCH_FPU

arch/arm/src/armv7-a/arm_doirq.c

@@ -95,6 +95,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
 
   irq_dispatch(irq, regs);
 
+#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
   /* Check for a context switch.  If a context switch occurred, then
    * current_regs will have a different value than it did on entry.  If an
    * interrupt level context switch has occurred, then restore the floating
@@ -102,7 +103,6 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
    * returning from the interrupt.
    */
 
-#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
   if (regs != current_regs)
     {
 #ifdef CONFIG_ARCH_FPU

arch/arm/src/dm320/dm320_decodeirq.c

@@ -1,8 +1,7 @@
 /********************************************************************************
  * arch/arm/src/dm320/dm320_decodeirq.c
- * arch/arm/src/chip/dm320_decodeirq.c
  *
- *   Copyright (C) 2007, 2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007, 2009, 2011, 2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,6 +49,8 @@
 #include "up_arch.h"
 #include "up_internal.h"
 
+#include "group/group.h"
+
 /********************************************************************************
  * Pre-processor Definitions
  ********************************************************************************/
@@ -67,7 +68,7 @@
  ********************************************************************************/
 
 /********************************************************************************
- * Public Funtions
+ * Public Functions
  ********************************************************************************/
 
 void up_decodeirq(uint32_t* regs)
@@ -93,29 +94,56 @@ void up_decodeirq(uint32_t* regs)
 
       if ((unsigned)irq < NR_IRQS)
         {
-          uint32_t *savestate;
-
           /* Mask and acknowledge the interrupt */
 
           up_maskack_irq(irq);
 
           /* Current regs non-zero indicates that we are processing an interrupt;
            * current_regs is also used to manage interrupt level context switches.
+           *
+           * Nested interrupts are not supported.
            */
 
-          savestate    = (uint32_t*)current_regs;
+          DEBUGASSERT(current_regs == NULL);
           current_regs = regs;
 
           /* Deliver the IRQ */
 
           irq_dispatch(irq, regs);
 
-          /* Restore the previous value of current_regs.  NULL would indicate that
+#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
-           * we are no longer in an interrupt handler.  It will be non-NULL if we
+          /* Check for a context switch.  If a context switch occurred, then
-           * are returning from a nested interrupt.
+           * current_regs will have a different value than it did on entry.
+           * If an interrupt level context switch has occurred, then restore
+           * the floating point state and the establish the correct address
+           * environment before returning from the interrupt.
            */
 
-          current_regs = savestate;
+          if (regs != current_regs)
+            {
+#ifdef CONFIG_ARCH_FPU
+              /* Restore floating point registers */
+
+              up_restorefpu((uint32_t*)current_regs);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+              /* Make sure that the address environment for the previously
+               * running task is closed down gracefully (data caches dump,
+               * MMU flushed) and set up the address environment for the new
+               * thread at the head of the ready-to-run list.
+               */
+
+              (void)group_addrenv(rtcb);
+#endif
+            }
+#endif
+
+          /* Set current_regs to NULL to indicate that we are no longer in
+           * an interrupt handler.
+           */
+
+          current_regs = NULL;
 
           /* Unmask the last interrupt (global interrupts are still
            * disabled).

arch/arm/src/imx/imx_decodeirq.c

@@ -1,8 +1,7 @@
 /********************************************************************************
  * arch/arm/src/imx/imx_decodeirq.c
- * arch/arm/src/chip/imx_decodeirq.c
  *
- *   Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2011, 2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,6 +49,8 @@
 #include "up_arch.h"
 #include "up_internal.h"
 
+#include "group/group.h"
+
 /********************************************************************************
  * Pre-processor Definitions
  ********************************************************************************/
@@ -67,7 +68,7 @@
  ********************************************************************************/
 
 /********************************************************************************
- * Public Funtions
+ * Public Functions
  ********************************************************************************/
 
 void up_decodeirq(uint32_t* regs)
@@ -77,15 +78,16 @@ void up_decodeirq(uint32_t* regs)
   current_regs = regs;
   PANIC();
 #else
-  uint32_t* savestate;
   uint32_t regval;
   int irq;
 
   /* Current regs non-zero indicates that we are processing an interrupt;
    * current_regs is also used to manage interrupt level context switches.
+   *
+   * Nested interrupts are not supported.
    */
 
-  savestate    = (uint32_t*)current_regs;
+  DEBUGASSERT(current_regs == NULL);
   current_regs = regs;
 
   /* Loop while there are pending interrupts to be processed */
@@ -116,6 +118,33 @@ void up_decodeirq(uint32_t* regs)
 
           irq_dispatch(irq, regs);
 
+#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
+          /* Check for a context switch.  If a context switch occurred, then
+           * current_regs will have a different value than it did on entry.
+           * If an interrupt level context switch has occurred, then restore
+           * the floating point state and the establish the correct address
+           * environment before returning from the interrupt.
+           */
+
+          if (regs != current_regs)
+            {
+#ifdef CONFIG_ARCH_FPU
+              /* Restore floating point registers */
+
+              up_restorefpu((uint32_t*)current_regs);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+              /* Make sure that the address environment for the previously
+               * running task is closed down gracefully (data caches dump,
+               * MMU flushed) and set up the address environment for the new
+               * thread at the head of the ready-to-run list.
+               */
+
+              (void)group_addrenv(rtcb);
+#endif
+            }
+#endif
           /* Unmask the last interrupt (global interrupts are still
            * disabled).
            */
@@ -125,11 +154,10 @@ void up_decodeirq(uint32_t* regs)
     }
   while (irq < NR_IRQS);
 
-  /* Restore the previous value of current_regs.  NULL would indicate that
+  /* Set current_regs to NULL to indicate that we are no longer in
-   * we are no longer in an interrupt handler.  It will be non-NULL if we
+   * an interrupt handler.
-   * are returning from a nested interrupt.
    */
 
-  current_regs = savestate;
+  current_regs = NULL;
 #endif
 }

arch/arm/src/lpc31xx/lpc31_decodeirq.c

@@ -2,7 +2,7 @@
  * arch/arm/src/lpc31xx/lpc31_decodeirq.c
  * arch/arm/src/chip/lpc31_decodeirq.c
  *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,6 +50,7 @@
 #include "up_arch.h"
 
 #include "up_internal.h"
+#include "group/group.h"
 
 #include "lpc31_intc.h"
 
@@ -101,29 +102,55 @@ void up_decodeirq(uint32_t *regs)
 
       if ((unsigned)irq < NR_IRQS)
         {
-          uint32_t* savestate;
-
           /* Mask and acknowledge the interrupt */
 
           up_maskack_irq(irq);
 
           /* Current regs non-zero indicates that we are processing an interrupt;
            * current_regs is also used to manage interrupt level context switches.
+           *
+           * Nested interrupts are not supported.
            */
 
-          savestate    = (uint32_t*)current_regs;
+          DEBUGASSERT(current_regs == NULL);
           current_regs = regs;
 
           /* Deliver the IRQ */
 
           irq_dispatch(irq, regs);
 
-          /* Restore the previous value of current_regs.  NULL would indicate that
+#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
-           * we are no longer in an interrupt handler.  It will be non-NULL if we
+          /* Check for a context switch.  If a context switch occurred, then
-           * are returning from a nested interrupt.
+           * current_regs will have a different value than it did on entry.
+           * If an interrupt level context switch has occurred, then restore
+           * the floating point state and the establish the correct address
+           * environment before returning from the interrupt.
            */
 
-          current_regs = savestate;
+          if (regs != current_regs)
+            {
+#ifdef CONFIG_ARCH_FPU
+              /* Restore floating point registers */
+
+              up_restorefpu((uint32_t*)current_regs);
+#endif
+
+#ifdef CONFIG_ARCH_ADDRENV
+              /* Make sure that the address environment for the previously
+               * running task is closed down gracefully (data caches dump,
+               * MMU flushed) and set up the address environment for the new
+               * thread at the head of the ready-to-run list.
+               */
+
+              (void)group_addrenv(rtcb);
+#endif
+            }
+#endif
+          /* Set current_regs to NULL to indicate that we are no longer in an
+           * interrupt handler.
+           */
+
+          current_regs = NULL;
 
           /* Unmask the last interrupt (global interrupts are still
            * disabled).