From f6ad8ffbbadb05228f1040ffce28b69a296b494c Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Sat, 8 Jun 2013 09:21:20 -0600
Subject: [PATCH] SM4L:  USB clock configuration and WDT register definition
 file

---
 configs/sam4l-xplained/include/board.h      | 31 ++++++++++++++++++++-
 configs/sam4l-xplained/ostest/defconfig     |  4 +--
 configs/sam4l-xplained/src/sam4l-xplained.h |  8 +++---
 3 files changed, 36 insertions(+), 7 deletions(-)

diff --git a/configs/sam4l-xplained/include/board.h b/configs/sam4l-xplained/include/board.h
index ff75a4f2f6..fe0e2018da 100644
--- a/configs/sam4l-xplained/include/board.h
+++ b/configs/sam4l-xplained/include/board.h
@@ -84,9 +84,11 @@
 #define BOARD_RCFAST12M_FREQUENCY  12000000 /* Nominal frequency of RCFAST12M (Hz) */
 #define BOARD_RC1M_FREQUENCY       1000000  /* Nominal frequency of RC1M (Hz) */
 
-/* On-board crystal frequencies */
+/* OSC32 Configuration */
 
 #define BOARD_OSC32_FREQUENCY      32768
+#define BOARD_OSC32_STARTUP_US     6100
+#define BOARD_OSC32_SELCURR        BSCIF_OSCCTRL32_SELCURR_300
 
 /* Digital Frequency Locked Loop configuration
  *  Fdfll = (Fclk * DFLLmul) / DFLLdiv
@@ -149,6 +151,33 @@
 #define BOARD_PBC_FREQUENCY        (BOARD_MAIN_FREQUENCY >> BOARD_PBC_SHIFT)
 #define BOARD_PBD_FREQUENCY        (BOARD_MAIN_FREQUENCY >> BOARD_PBD_SHIFT)
 
+/* USBC.
+ *
+ * "The USBC has two bus clocks connected: One High Speed Bus clock
+ *  (CLK_USBC_AHB) and one Peripheral Bus clock (CLK_USBC_APB). These clocks
+ *  are generated by the Power Manager.  Both clocks are enabled at reset
+ *  and can be disabled by the Power Manager. It is recommended to disable
+ *  the USBC before disabling the clocks, to avoid freezing the USBC in
+ *  an undefined state.
+ *
+ * "To follow the usb data rate at 12Mbit/s in full-speed mode, the
+ *  CLK_USBC_AHB clock should be at minimum 12MHz.
+ *
+ * "The 48MHz USB clock is generated by a dedicated generic clock from
+ *  the SCIF module. Before using the USB, the user must ensure that the
+ *  USB generic clock (GCLK_USBC) is enabled at 48MHz in the SCIF module."
+ *
+ * USB Generic Clock 7 (GCLK_USBC) source selection (one only)
+ *
+ *   BOARD_USBC_SRC_OSC0
+ *   BOARD_USBC_SRC_PLL0
+ *   BOARD_USBC_SRC_DFLL
+ *   BOARD_USBC_SRC_GCLKIN0
+ */
+
+#define BOARD_USBC_SRC_DFLL        1 /* Source DFLL0 at 48MHz */
+#define BOARD_USBC_GCLK_DIV        1 /* Fusb = Fdfll / 1 = 48MHz */
+
 /* LED definitions ******************************************************************/
 /* There are three LEDs on board the SAM4L Xplained Pro board:  The EDBG
  * controls two of the LEDs, a power LED and a status LED.  There is only
diff --git a/configs/sam4l-xplained/ostest/defconfig b/configs/sam4l-xplained/ostest/defconfig
index 6d4bcab946..fdc5a3039d 100644
--- a/configs/sam4l-xplained/ostest/defconfig
+++ b/configs/sam4l-xplained/ostest/defconfig
@@ -94,7 +94,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y
 CONFIG_ARMV7M_OABI_TOOLCHAIN=y
 
 #
-# AT91SAM3/SAM4 Configuration Options
+# AT91SAM3/4 Configuration Options
 #
 # CONFIG_ARCH_CHIP_AT91SAM3U4E is not set
 # CONFIG_ARCH_CHIP_SAM34_NDMACHANC2C is not set
@@ -172,7 +172,7 @@ CONFIG_SAM34_USART1=y
 CONFIG_USART1_ISUART=y
 
 #
-# AT91SAM3 GPIO Interrupt Configuration
+# AT91SAM3/4 GPIO Interrupt Configuration
 #
 # CONFIG_GPIOA_IRQ is not set
 # CONFIG_GPIOB_IRQ is not set
diff --git a/configs/sam4l-xplained/src/sam4l-xplained.h b/configs/sam4l-xplained/src/sam4l-xplained.h
index e9efe88fea..9f7904327c 100644
--- a/configs/sam4l-xplained/src/sam4l-xplained.h
+++ b/configs/sam4l-xplained/src/sam4l-xplained.h
@@ -80,8 +80,8 @@
  * 2Hz, then a fatal error has been detected and the system has halted.
  */
 
-#define GPIO_LED0     (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_PORTC | \
-                       GPIO_OUTPUT_SET | GPIO_PIN7)
+#define GPIO_LED0     (GPIO_OUTPUT | GPIO_PULL_NONE GPIO_OUTPUT_SET | \
+                       GPIO_PORTC | GPIO_PIN7)
 
 /* QTouch button: The SAM4L Xplained Pro kit has one QTouch button.  The connection
  * to the SAM4L is:
@@ -99,8 +99,8 @@
  *   PC24 SW0
  */
 
-#define GPIO_SW0      (GPIO_INPUT | GPIO_PULL_UP | GPIO_GLITCH_FILTER | GPIO_PORTC | \
-                       GPIO_PIN24)
+#define GPIO_SW0      (GPIO_INPUT | GPIO_PULL_UP | GPIO_GLITCH_FILTER | \
+                       GPIO_PORTC | GPIO_PIN24)
 #define IRQ_SW0       SAM_IRQ_PC24
 
 /************************************************************************************