STM32 ADC changes suggested by Max Kriegleder
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949cea035c
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@ -3114,7 +3114,7 @@ config STM32_TIM14_DAC2
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endchoice
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menu "ADC Configuration"
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depends on STM32_ADC1
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depends on STM32_ADC
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config STM32_ADC1_DMA
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bool "ADC1 DMA"
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@ -1596,7 +1596,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
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DEBUGASSERT(priv->nchannels <= ADC_MAX_CHANNELS_NODMA);
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}
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regval |= (((uint32_t)priv->nchannels-1) << ADC_SQR1_L_SHIFT);
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regval |= (((uint32_t)priv->nchannels - 1) << ADC_SQR1_L_SHIFT);
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adc_putreg(priv, STM32_ADC_SQR1_OFFSET, regval);
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/* Set the channel index of the first conversion */
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@ -2284,6 +2284,7 @@ static int adc_set_ch(FAR struct adc_dev_s *dev, uint8_t ch)
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}
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#else
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priv->nchannels = priv->cchannels;
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regval = adc_getreg(priv, STM32_ADC_SQR3_OFFSET) & ADC_SQR3_RESERVED;
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for (i = 0, offset = 0; i < priv->nchannels && i < 6; i++, offset += 5)
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{
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@ -2320,10 +2321,11 @@ static int adc_set_ch(FAR struct adc_dev_s *dev, uint8_t ch)
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break;
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}
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regval = adc_getreg(priv, STM32_ADC_SQR1_OFFSET) & ADC_SQR1_RESERVED;
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regval = adc_getreg(priv, STM32_ADC_SQR1_OFFSET) & ADC_SQR1_RESERVED;
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regval &= ~(ADC_SQR1_L_MASK);
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adc_putreg(priv, STM32_ADC_SQR1_OFFSET, regval);
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priv->current = i;
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priv->current = i;
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priv->nchannels = 1;
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return ret;
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}
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@ -2761,7 +2763,7 @@ void stm32_adcchange_sample_time(FAR struct adc_dev_s *dev,
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* Input Parameters:
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* intf - Could be {1,2,3} for ADC1, ADC2, or ADC3
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* chanlist - The list of channels
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* nchannels - Number of channels
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* cchannels - Number of channels
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*
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* Returned Value:
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* Valid ADC device structure reference on succcess; a NULL on failure
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@ -2774,7 +2776,7 @@ struct adc_dev_s *stm32_adcinitialize(int intf, const uint8_t *chanlist,
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FAR struct adc_dev_s *dev;
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FAR struct stm32_dev_s *priv;
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allvdbg("intf: %d nchannels: %d\n", intf, cchannels);
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allvdbg("intf: %d cchannels: %d\n", intf, cchannels);
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#ifdef CONFIG_STM32_ADC1
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if (intf == 1)
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