SAMA5: LCDC driver incorporated into the build system.
This commit is contained in:
Gregory Nutt
parent
1807a662a8
commit
f8397f8238
@ -5722,6 +5722,6 @@
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free connections available. From Max Holtzberg (2013-10-6).
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* net/net_close.c and other: Update of change of 2013-10-6 from
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Max Holtzberg (2013-10-8).
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* arch/arm/src/sama5/sam_lcd.c: LCDC driver is code complete but still
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untested (2013-10-8).
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* arch/arm/src/sama5/sam_lcd.c: LCDC driver is code complete and
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incorporated into the build system (but still untested (2013-10-8).
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@ -15,16 +15,19 @@ config ARCH_CHIP_ATSAMA5D31
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bool "Atmel ATSAMA5D31"
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select ARCH_CHIP_SAMA5D3
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select SAMA5_HAVE_EMAC
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select SAMA5_HAVE_LCDC
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config ARCH_CHIP_ATSAMA5D33
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bool "Atmel ATSAMA5D33"
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select ARCH_CHIP_SAMA5D3
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select SAMA5_HAVE_GMAC
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select SAMA5_HAVE_LCDC
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config ARCH_CHIP_ATSAMA5D34
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bool "Atmel ATSAMA5D34"
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select ARCH_CHIP_SAMA5D3
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select SAMA5_HAVE_GMAC
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select SAMA5_HAVE_LCDC
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config ARCH_CHIP_ATSAMA5D35
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bool "Atmel ATSAMA5D35"
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@ -173,6 +176,7 @@ config SAMA5_EMAC
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config SAMA5_LCDC
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bool "LCD Controller (LCDC)"
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default n
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depends on SAMA5_HAVE_LCDC
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config SAMA5_ISI
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bool "Image Sensor Interface (ISI)"
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@ -253,6 +257,485 @@ config SAMA5_PIOE_IRQ
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endif # PIO_IRQ
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config SAMA5_HAVE_LCDC
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bool
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if SAMA5_LCDC
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menu "LCDC Configuration"
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config SAMA5_LCDC_BACKLIGHT
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bool "Backlight support"
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default y
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config SAMA5_LCDC_DEFBACKLIGHT
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hex "Default backlight level"
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default 0xf0
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config SAMA5_LCDC_BACKCOLOR
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hex "Background color"
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default 0x0
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choice
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prompt "Frame buffer allocation strategy"
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default SAMA5_LCDC_FBALLOCATED
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config SAMA5_LCDC_FBALLOCATED
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bool "Allocate from heap"
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config SAMA5_LCDC_FBFIXED
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bool "Fixed allocation outside the heap"
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config SAMA5_LCDC_FBPREALLOCATED
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bool "Pre-allocated in .bss"
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endchoice # Frame buffer allocatin strategy
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if SAMA5_LCDC_FBFIXED
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config SAMA5_LCDC_FBFIXED_BASE
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hex "Framebuffer memory start address"
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config SAMA5_LCDC_FBFIXED_SIZE
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int "Framebuffer memory size"
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default 0
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endif # SAMA5_LCDC_FBFIXED
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comment "Base layer configuration"
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config SAMA5_LCDC_BASE_HEIGHT
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int "Layer height (rows)"
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default 480
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config SAMA5_LCDC_BASE_WIDTH
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int "Layer width (pixels)"
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default 800
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choice
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prompt "Base layer rotation"
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default SAMA5_LCDC_BASE_ROT0
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config SAMA5_LCDC_BASE_ROT0
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bool "No rotation"
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config SAMA5_LCDC_BASE_ROT90
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bool "90 degrees"
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config SAMA5_LCDC_BASE_ROT180
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bool "180 degrees"
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config SAMA5_LCDC_BASE_ROT270
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bool "270 degrees"
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endchoice # Base layer rotation
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choice
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prompt "Base layer color format"
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default SAMA5_LCDC_BASE_RGB888P
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config SAMA5_LCDC_BASE_RGB444
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bool "12 bpp RGB 444"
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config SAMA5_LCDC_BASE_ARGB4444
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bool "16 bpp ARGB 4444"
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config SAMA5_LCDC_BASE_RGBA4444
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bool "16 bpp RGBA 4444"
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config SAMA5_LCDC_BASE_RGB565
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bool "16 bpp RGB 565"
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config SAMA5_LCDC_BASE_TRGB1555
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bool "16 bpp TRGB 1555"
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config SAMA5_LCDC_BASE_RGB666
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bool "18 bpp RGB 666"
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config SAMA5_LCDC_BASE_RGB666P
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bool "18 bpp RGB 666 packed"
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config SAMA5_LCDC_BASE_TRGB1666
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bool "19 bpp TRGB 1666"
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config SAMA5_LCDC_BASE_TRGBP
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bool "19 bpp TRGB 1666 packed"
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config SAMA5_LCDC_BASE_RGB888
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bool "24 bpp RGB 888"
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config SAMA5_LCDC_BASE_RGB888P
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bool "24 bpp RGB 888 packed"
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config SAMA5_LCDC_BASE_TRGB1888
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bool "25 bpp TRGB 1888"
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config SAMA5_LCDC_BASE_ARGB8888
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bool "32 bpp ARGB 8888"
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config SAMA5_LCDC_BASE_RGBA8888
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bool "32 bpp RGBA 8888"
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endchoice # Base layer color format
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menuconfig SAMA5_LCDC_OVR1
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bool "Enable overlay 1 window"
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default n
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depends on EXPERIMENTAL
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if SAMA5_LCDC_OVR1
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config SAMA5_LCDC_OVR1_MAXHEIGHT
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int "Overlay 1 height (rows)"
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default 480
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config SAMA5_LCDC_OVR1_MAXWIDTH
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int "Overlay 1 width (pixels)"
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default 800
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config SAMA5_LCDC_OVR1_BOTTOMUP
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bool "Raster bottom-up"
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default n
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config SAMA5_LCDC_OVR1_RIGHTLEFT
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bool "Raster right-to-left"
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default n
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choice
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prompt "Overlay 1 rotation"
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default SAMA5_LCDC_OVR1_ROT0
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config SAMA5_LCDC_OVR1_ROT0
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bool "No rotation"
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config SAMA5_LCDC_OVR1_ROT90
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bool "90 degrees"
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config SAMA5_LCDC_OVR1_ROT180
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bool "180 degrees"
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config SAMA5_LCDC_OVR1_ROT270
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bool "270 degrees"
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endchoice # Overlay 1 rotation
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choice
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prompt "Overlay 1 color format"
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default SAMA5_LCDC_OVR1_RGB888P
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config SAMA5_LCDC_OVR1_RGB444
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bool "12 bpp RGB 444"
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config SAMA5_LCDC_OVR1_ARGB4444
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bool "16 bpp ARGB 4444"
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config SAMA5_LCDC_OVR1_RGBA4444
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bool "16 bpp RGBA 4444"
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config SAMA5_LCDC_OVR1_RGB565
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bool "16 bpp RGB 565"
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config SAMA5_LCDC_OVR1_TRGB1555
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bool "16 bpp TRGB 1555"
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config SAMA5_LCDC_OVR1_RGB666
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bool "18 bpp RGB 666"
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config SAMA5_LCDC_OVR1_RGB666P
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bool "18 bpp RGB 666 packed"
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config SAMA5_LCDC_OVR1_TRGB1666
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bool "19 bpp TRGB 1666"
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config SAMA5_LCDC_OVR1_TRGBP
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bool "19 bpp TRGB 1666 packed"
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config SAMA5_LCDC_OVR1_RGB888
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bool "24 bpp RGB 888"
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config SAMA5_LCDC_OVR1_RGB888P
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bool "24 bpp RGB 888 packed"
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config SAMA5_LCDC_OVR1_TRGB1888
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bool "25 bpp TRGB 1888"
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config SAMA5_LCDC_OVR1_ARGB8888
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bool "32 bpp ARGB 8888"
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config SAMA5_LCDC_OVR1_RGBA8888
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bool "32 bpp RGBA 8888"
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endchoice # Base layer color format
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endif # SAMA5_LCDC_OVR1
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menuconfig SAMA5_LCDC_OVR2
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bool "Enable overlay 2 window"
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default n
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depends on EXPERIMENTAL
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if SAMA5_LCDC_OVR2
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config SAMA5_LCDC_OVR2_MAXHEIGHT
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int "Overlay 2 height (rows)"
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default 480
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config SAMA5_LCDC_OVR2_MAXWIDTH
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int "Overlay 2 width (pixels)"
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default 800
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config SAMA5_LCDC_OVR2_BOTTOMUP
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bool "Raster bottom-up"
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default n
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config SAMA5_LCDC_OVR2_RIGHTLEFT
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bool "Raster right-to-left"
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default n
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choice
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prompt "Overlay 2 rotation"
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default SAMA5_LCDC_OVR2_ROT0
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config SAMA5_LCDC_OVR2_ROT0
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bool "No rotation"
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config SAMA5_LCDC_OVR2_ROT90
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bool "90 degrees"
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config SAMA5_LCDC_OVR2_ROT180
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bool "180 degrees"
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config SAMA5_LCDC_OVR2_ROT270
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bool "270 degrees"
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endchoice # Overlay 2 rotation
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choice
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prompt "Overlay 2 layer color format"
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default SAMA5_LCDC_OVR2_RGB888P
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config SAMA5_LCDC_OVR2_RGB444
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bool "12 bpp RGB 444"
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config SAMA5_LCDC_OVR2_ARGB4444
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bool "16 bpp ARGB 4444"
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config SAMA5_LCDC_OVR2_RGBA4444
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bool "16 bpp RGBA 4444"
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config SAMA5_LCDC_OVR2_RGB565
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bool "16 bpp RGB 565"
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config SAMA5_LCDC_OVR2_TRGB1555
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bool "16 bpp TRGB 1555"
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config SAMA5_LCDC_OVR2_RGB666
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bool "18 bpp RGB 666"
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config SAMA5_LCDC_OVR2_RGB666P
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bool "18 bpp RGB 666 packed"
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config SAMA5_LCDC_OVR2_TRGB1666
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bool "19 bpp TRGB 1666"
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config SAMA5_LCDC_OVR2_TRGBP
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bool "19 bpp TRGB 1666 packed"
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config SAMA5_LCDC_OVR2_RGB888
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bool "24 bpp RGB 888"
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config SAMA5_LCDC_OVR2_RGB888P
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bool "24 bpp RGB 888 packed"
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config SAMA5_LCDC_OVR2_TRGB1888
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bool "25 bpp TRGB 1888"
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config SAMA5_LCDC_OVR2_ARGB8888
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bool "32 bpp ARGB 8888"
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config SAMA5_LCDC_OVR2_RGBA8888
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bool "32 bpp RGBA 8888"
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endchoice # Base layer color format
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endif # SAMA5 LCDC_OVR2
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config SAMA5_LCDC_HEO
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bool "High end overlay (HEO) window"
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default n
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depends on EXPERIMENTAL
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if SAMA5_LCDC_HEO
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config SAMA5_LCDC_HEO_MAXHEIGHT
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int "HEO layer height (rows)"
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default 480
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config SAMA5_LCDC_HEO_MAXWIDTH
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int "HEO layer width (pixels)"
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default 800
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config SAMA5_LCDC_HEO_BOTTOMUP
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bool "Raster bottom-up"
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default n
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config SAMA5_LCDC_HEO_RIGHTLEFT
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bool "Raster right-to-left"
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default n
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choice
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prompt "HEO layer rotation"
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default SAMA5_LCDC_HEO_ROT0
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config SAMA5_LCDC_HEO_ROT0
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bool "No rotation"
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config SAMA5_LCDC_HEO_ROT90
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bool "90 degrees"
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config SAMA5_LCDC_HEO_ROT180
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bool "180 degrees"
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config SAMA5_LCDC_HEO_ROT270
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bool "270 degrees"
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endchoice # HEO layer rotation
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choice
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prompt "HEO layer color format"
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default SAMA5_LCDC_HEO_RGB888P
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config SAMA5_LCDC_HEO_RGB444
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bool "12 bpp RGB 444"
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config SAMA5_LCDC_HEO_ARGB4444
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bool "16 bpp ARGB 4444"
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config SAMA5_LCDC_HEO_RGBA4444
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bool "16 bpp RGBA 4444"
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config SAMA5_LCDC_HEO_RGB565
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bool "16 bpp RGB 565"
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config SAMA5_LCDC_HEO_TRGB1555
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bool "16 bpp TRGB 1555"
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config SAMA5_LCDC_HEO_RGB666
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bool "18 bpp RGB 666"
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config SAMA5_LCDC_HEO_RGB666P
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bool "18 bpp RGB 666 packed"
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config SAMA5_LCDC_HEO_TRGB1666
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bool "19 bpp TRGB 1666"
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config SAMA5_LCDC_HEO_TRGBP
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bool "19 bpp TRGB 1666 packed"
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config SAMA5_LCDC_HEO_RGB888
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bool "24 bpp RGB 888"
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config SAMA5_LCDC_HEO_RGB888P
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bool "24 bpp RGB 888 packed"
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config SAMA5_LCDC_HEO_TRGB1888
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bool "25 bpp TRGB 1888"
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config SAMA5_LCDC_HEO_ARGB8888
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bool "32 bpp ARGB 8888"
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config SAMA5_LCDC_HEO_RGBA8888
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bool "32 bpp RGBA 8888"
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endchoice # Base layer color format
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endif # SAMA5_LCDC_HEO
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config SAMA5_LCDC_HCR
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bool "Enable hardware cursor (HCR)"
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default n
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depends on EXPERIMENTAL
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if SAMA5_LCDC_HCR
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config SAMA5_LCDC_HCR_MAXHEIGHT
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int "Hardware cursor height (rows)"
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default 32
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config SAMA5_LCDC_HCR_MAXWIDTH
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int "Hardware cursor width (pixels)"
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default 32
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choice
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prompt "Hardware cursor rotation"
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default SAMA5_LCDC_HCR_ROT0
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config SAMA5_LCDC_HCR_ROT0
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bool "No rotation"
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config SAMA5_LCDC_HCR_ROT90
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bool "90 degrees"
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config SAMA5_LCDC_HCR_ROT180
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bool "180 degrees"
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config SAMA5_LCDC_HCR_ROT270
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bool "270 degrees"
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endchoice # Hardware cursor rotation
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choice
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prompt "Hardware cursor layer color format"
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default SAMA5_LCDC_HCR_RGB888P
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config SAMA5_LCDC_HCR_RGB444
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bool "12 bpp RGB 444"
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config SAMA5_LCDC_HCR_ARGB4444
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bool "16 bpp ARGB 4444"
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config SAMA5_LCDC_HCR_RGBA4444
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bool "16 bpp RGBA 4444"
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config SAMA5_LCDC_HCR_RGB565
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bool "16 bpp RGB 565"
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config SAMA5_LCDC_HCR_TRGB1555
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bool "16 bpp TRGB 1555"
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config SAMA5_LCDC_HCR_RGB666
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bool "18 bpp RGB 666"
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config SAMA5_LCDC_HCR_RGB666P
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bool "18 bpp RGB 666 packed"
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config SAMA5_LCDC_HCR_TRGB1666
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bool "19 bpp TRGB 1666"
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config SAMA5_LCDC_HCR_TRGBP
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bool "19 bpp TRGB 1666 packed"
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config SAMA5_LCDC_HCR_RGB888
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bool "24 bpp RGB 888"
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config SAMA5_LCDC_HCR_RGB888P
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bool "24 bpp RGB 888 packed"
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config SAMA5_LCDC_HCR_TRGB1888
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bool "25 bpp TRGB 1888"
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config SAMA5_LCDC_HCR_ARGB8888
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bool "32 bpp ARGB 8888"
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config SAMA5_LCDC_HCR_RGBA8888
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bool "32 bpp RGBA 8888"
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endchoice # Base layer color format
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endif # SAMA5_LCDC_HCR
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config SAMA5_LCDC_REGDEBUG
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bool "Low level register debug"
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depends on DEBUG
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endmenu # LCDC configuration
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endif # SAMA5_LCDC
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config SAMA5_HAVE_GMAC
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bool
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default n
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@ -119,6 +119,10 @@ else
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endif
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endif
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ifeq ($(CONFIG_SAMA5_LCDC),y)
|
||||
CHIP_CSRCS += sam_lcd.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_SAMA5_UHPHS),y)
|
||||
ifeq ($(CONFIG_SAMA5_OHCI),y)
|
||||
CHIP_CSRCS += sam_ohci.c
|
||||
|
||||
@ -540,7 +540,7 @@
|
||||
# define LCDC_LCDCFG6_PWMPS_DIV8 (3 << LCDC_LCDCFG6_PWMPS_SHIFT) /* Fcounter = Fpwm_selected_clock/8 */
|
||||
# define LCDC_LCDCFG6_PWMPS_DIV (4 << LCDC_LCDCFG6_PWMPS_SHIFT) /* Fcounter = Fpwm_selected_clock/16 */
|
||||
# define LCDC_LCDCFG6_PWMPS_DIV32 (5 << LCDC_LCDCFG6_PWMPS_SHIFT) /* Fcounter = Fpwm_selected_clock/32 */
|
||||
# define LCDC_LCDCFG6_PWMPS _DIV64 (6 << LCDC_LCDCFG6_PWMPS_SHIFT) /* Fcounter = Fpwm_selected_clock/64 */
|
||||
# define LCDC_LCDCFG6_PWMPS_DIV64 (6 << LCDC_LCDCFG6_PWMPS_SHIFT) /* Fcounter = Fpwm_selected_clock/64 */
|
||||
#define LCDC_LCDCFG6_PWMPOL (1 << 4) /* Bit 4: LCD Controller PWM Signal Polarity */
|
||||
#define LCDC_LCDCFG6_PWMCVAL_SHIFT (8) /* Bits 8-15: LCD Controller PWM Compare Value */
|
||||
#define LCDC_LCDCFG6_PWMCVAL_MASK (0xff << LCDC_LCDCFG6_PWMCVAL_SHIFT)
|
||||
@ -686,7 +686,7 @@
|
||||
|
||||
#define LCDC_BASECFG4_DMA (1 << 8) /* Bit 8: Use DMA Data Path */
|
||||
#define LCDC_BASECFG4_REP (1 << 9) /* Bit 9: Use Replication logic to expand RGB */
|
||||
#define LCDC_BASECFG4_DISCEN (1 << 11) /* Bit 11: Discard Area Enable
|
||||
#define LCDC_BASECFG4_DISCEN (1 << 11) /* Bit 11: Discard Area Enable */
|
||||
|
||||
/* Base Configuration register 5 */
|
||||
|
||||
@ -1568,7 +1568,7 @@
|
||||
#define LCDC_HCRCHSR_A2Q (1 << 2) /* Bit 2: Add To Queue Pending */
|
||||
|
||||
/* Hardware Cursor Interrupt Enable Register, Hardware Cursor Interrupt Disable Register,
|
||||
/* Hardware Cursor Interrupt Mask Register, and Hardware Cursor Interrupt Status Register
|
||||
* Hardware Cursor Interrupt Mask Register, and Hardware Cursor Interrupt Status Register
|
||||
*/
|
||||
|
||||
#define LCDC_HCRINT_DMA (1 << 2) /* Bit 2: End of DMA Transfer */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -51,105 +51,6 @@
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
/* Configuration */
|
||||
|
||||
/* Base address of the video RAM frame buffer */
|
||||
|
||||
#ifndef CONFIG_SAM_LCD_VRAMBASE
|
||||
# define CONFIG_SAM_LCD_VRAMBASE ((uint32_t)SAM_EXTDRAM_CS0 + 0x00010000)
|
||||
#endif
|
||||
|
||||
/* LCD refresh rate */
|
||||
|
||||
#ifndef CONFIG_SAM_LCD_REFRESH_FREQ
|
||||
# define CONFIG_SAM_LCD_REFRESH_FREQ (50) /* Hz */
|
||||
#endif
|
||||
|
||||
/* Bits per pixel / color format */
|
||||
|
||||
#undef SAM_COLOR_FMT
|
||||
#if defined(CONFIG_SAM_LCD_BPP1)
|
||||
# define SAM_BPP 1
|
||||
# define SAM_COLOR_FMT FB_FMT_Y1
|
||||
#elif defined(CONFIG_SAM_LCD_BPP2)
|
||||
# define SAM_BPP 2
|
||||
# define SAM_COLOR_FMT FB_FMT_Y2
|
||||
#elif defined(CONFIG_SAM_LCD_BPP4)
|
||||
# define SAM_BPP 4
|
||||
# define SAM_COLOR_FMT FB_FMT_Y4
|
||||
#elif defined(CONFIG_SAM_LCD_BPP8)
|
||||
# define SAM_BPP 8
|
||||
# define SAM_COLOR_FMT FB_FMT_Y8
|
||||
#elif defined(CONFIG_SAM_LCD_BPP16)
|
||||
# define SAM_BPP 16
|
||||
# define SAM_COLOR_FMT FB_FMT_Y16
|
||||
#elif defined(CONFIG_SAM_LCD_BPP24)
|
||||
# define SAM_BPP 32 /* Only 24 of 32 bits used for RGB */
|
||||
# define SAM_COLOR_FMT FB_FMT_RGB24
|
||||
# ifndef CONFIG_SAM_LCD_TFTPANEL
|
||||
# error "24 BPP is only available for a TFT panel"
|
||||
# endif
|
||||
#elif defined(CONFIG_SAM_LCD_BPP16_565)
|
||||
# define SAM_BPP 16
|
||||
# define SAM_COLOR_FMT FB_FMT_RGB16_565
|
||||
#elif defined(CONFIG_SAM_LCD_BPP12_444)
|
||||
# define SAM_BPP 1 2
|
||||
# define SAM_COLOR_FMT FB_FMT_RGB12_444
|
||||
#else
|
||||
# ifndef CONFIG_SAM_LCD_TFTPANEL
|
||||
# warning "Assuming 24 BPP"
|
||||
# define SAM_BPP 24
|
||||
# define CONFIG_SAM_LCD_BPP24 1
|
||||
# define SAM_COLOR_FMT FB_FMT_RGB24
|
||||
# else
|
||||
# warning "Assuming 16 BPP 5:6:5"
|
||||
# define SAM_BPP 16
|
||||
# define CONFIG_SAM_LCD_BPP16_565 1
|
||||
# define SAM_COLOR_FMT FB_FMT_RGB16_565
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/* Background color */
|
||||
|
||||
#ifndef CONFIG_SAM_LCD_BACKCOLOR
|
||||
# define CONFIG_SAM_LCD_BACKCOLOR 0 /* Initial background color */
|
||||
#endif
|
||||
|
||||
/* Horizontal video characteristics */
|
||||
|
||||
#ifndef CONFIG_SAM_LCD_HWIDTH
|
||||
# define CONFIG_SAM_LCD_HWIDTH 480 /* Width in pixels */
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_SAM_LCD_HPULSE
|
||||
# define CONFIG_SAM_LCD_HPULSE 2
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_SAM_LCD_HFRONTPORCH
|
||||
# define CONFIG_SAM_LCD_HFRONTPORCH 5
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_SAM_LCD_HBACKPORCH
|
||||
# define CONFIG_SAM_LCD_HBACKPORCH 40
|
||||
#endif
|
||||
|
||||
/* Vertical video characteristics */
|
||||
|
||||
#ifndef CONFIG_SAM_LCD_VHEIGHT
|
||||
# define CONFIG_SAM_LCD_VHEIGHT 272 /* Height in rows */
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_SAM_LCD_VPULSE
|
||||
# define CONFIG_SAM_LCD_VPULSE 2
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_SAM_LCD_VFRONTPORCH
|
||||
# define CONFIG_SAM_LCD_VFRONTPORCH 8
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_SAM_LCD_VBACKPORCH
|
||||
# define CONFIG_SAM_LCD_VBACKPORCH 8
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
|
||||
@ -71,6 +71,33 @@
|
||||
|
||||
#endif
|
||||
|
||||
/* LCD Geometry and Timing */
|
||||
|
||||
#define BOARD_LCD_WIDTH 800 /* Display width (pixels) */
|
||||
#define BOARD_LCD_HEIGHT 480 /* Display height (pixels) */
|
||||
#define BOARD_LCD_IFWIDTH 24 /* Display interface width (bits) */
|
||||
#define BOARD_LCD_TIMING_VFP 22 /* Vertical front porch (lines) */
|
||||
#define BOARD_LCD_TIMING_VBP 21 /* Vertical back porch (lines) */
|
||||
#define BOARD_LCD_TIMING_VPW 2 /* Vertical pulse width (lines) */
|
||||
#define BOARD_LCD_TIMING_HFP 64 /* Horizontal front porch (LCDDOTCLK cycles) */
|
||||
#define BOARD_LCD_TIMING_HBP 64 /* Horizontal back porch (LCDDOTCLK cycles) */
|
||||
#define BOARD_LCD_TIMING_HPW 128 /* Horizontal pulse width (LCDDOTCLK cycles) */
|
||||
#define BOARD_LCD_FRAMERATE 40 /* Frame rate (Hz) */
|
||||
|
||||
/* Frame size (words) (height * width * bpp / 32) */
|
||||
|
||||
#define BOARD_LCD_FRAMESIZE \
|
||||
(BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT * BOARD_LCD_IFWIDTH / 32)
|
||||
|
||||
/* Pixel clock rate (Hz )(HS period * VS period * BOARD_LCD_FRAMERATE). */
|
||||
|
||||
#define BOARD_LCD_HSPERIOD \
|
||||
(BOARD_LCD_TIMING_HPW + BOARD_LCD_TIMING_HBP + BOARD_LCD_WIDTH + BOARD_LCD_TIMING_HFP)
|
||||
#define BOARD_LCD_VSPERIOD \
|
||||
(BOARD_LCD_TIMING_VPW + BOARD_LCD_TIMING_VBP + BOARD_LCD_HEIGHT + BOARD_LCD_TIMING_VFP)
|
||||
#define BOARD_LCD_PIXELCLOCK \
|
||||
(BOARD_LCD_HSPERIOD * BOARD_LCD_VSPERIOD * BOARD_LCD_FRAMERATE)
|
||||
|
||||
/* LED definitions ******************************************************************/
|
||||
/* There are two LEDs on the SAMA5D3 series-CM board that can be controlled
|
||||
* by software. A blue LED is controlled via PIO pins. A red LED normally
|
||||
|
||||
Loading…
Reference in New Issue
Block a user