libc: add risc-v libc function
Porting memory and string optimize functions from newlib and bionic Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
This commit is contained in:
zhangyuan21
Xiang Xiao
parent
fc9aeb8c70
commit
f8f29c8147
14
LICENSE
14
LICENSE
@ -739,6 +739,20 @@ libs/libc/machine/arm/armv8-m/gnu/arch_strlen.S
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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libs/libc/machine/risc-v/gnu/arch_memset.S
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libs/libc/machine/risc-v/gnu/arch_strcmp.S
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================================================
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Copyright (c) 2017 SiFive Inc. All rights reserved.
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This copyrighted material is made available to anyone wishing to use,
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modify, copy, or redistribute it subject to the terms and conditions
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of the FreeBSD License. This program is distributed in the hope that
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it will be useful, but WITHOUT ANY WARRANTY expressed or implied,
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including the implied warranties of MERCHANTABILITY or FITNESS FOR
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A PARTICULAR PURPOSE. A copy of this license is available at
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http://www.opensource.org/licenses.
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libs/libc/misc/lib_crc32.c
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libs/libc/misc/lib_crc32.c
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=========================
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=========================
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@ -3,7 +3,26 @@
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# see the file kconfig-language.txt in the NuttX tools repository.
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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#
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if ARCH_RV64
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config RISCV_MEMCPY
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source "libs/libc/machine/risc-v/rv64/Kconfig"
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bool "Enable optimized memcpy() for RISC-V"
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endif
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select LIBC_ARCH_MEMCPY
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depends on ARCH_TOOLCHAIN_GNU
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---help---
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Enable optimized RISC-V specific memcpy() library function
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config RISCV_MEMSET
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bool "Enable optimized memset() for RISC-V"
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default n
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select LIBC_ARCH_MEMSET
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depends on ARCH_TOOLCHAIN_GNU
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---help---
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Enable optimized RISC-V specific memset() library function
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config RISCV_STRCMP
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bool "Enable optimized strcmp() for RISC-V"
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default n
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select LIBC_ARCH_STRCMP
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depends on ARCH_TOOLCHAIN_GNU
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---help---
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Enable optimized RISC-V specific strcmp() library function
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@ -18,12 +18,30 @@
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#
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#
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############################################################################
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############################################################################
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include $(TOPDIR)/libs/libc/machine/risc-v/common/Make.defs
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ifeq ($(CONFIG_RISCV_MEMCPY),y)
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ASRCS += arch_memcpy.S
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ifeq ($(CONFIG_ARCH_RV64),y)
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include $(TOPDIR)/libs/libc/machine/risc-v/rv64/Make.defs
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endif
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endif
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ifeq ($(CONFIG_ARCH_RV32),y)
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ifeq ($(CONFIG_RISCV_MEMSET),y)
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include $(TOPDIR)/libs/libc/machine/risc-v/rv32/Make.defs
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ASRCS += arch_memset.S
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endif
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endif
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ifeq ($(CONFIG_RISCV_STRCMP),y)
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ASRCS += arch_strcmp.S
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endif
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ifeq ($(CONFIG_ARCH_SETJMP_H),y)
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ASRCS += arch_setjmp.S
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endif
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ifeq ($(CONFIG_LIBC_ARCH_ELF),y)
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CSRCS += arch_elf.c
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endif
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ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
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DEPPATH += --dep-path machine/risc-v/gnu
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VPATH += :machine/risc-v/gnu
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endif
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DEPPATH += --dep-path machine/risc-v
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VPATH += :machine/risc-v
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@ -1,5 +1,5 @@
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/****************************************************************************
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/****************************************************************************
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* libs/libc/machine/risc-v/common/arch_elf.c
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* libs/libc/machine/risc-v/arch_elf.c
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*
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* contributor license agreements. See the NOTICE file distributed with
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@ -1,30 +0,0 @@
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############################################################################
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# libs/libc/machine/risc-v/common/Make.defs
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# contributor license agreements. See the NOTICE file distributed with
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# this work for additional information regarding copyright ownership. The
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# ASF licenses this file to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance with the
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# License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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#
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############################################################################
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ifeq ($(CONFIG_LIBC_ARCH_ELF),y)
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CSRCS += arch_elf.c
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endif
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ifeq ($(CONFIG_ARCH_SETJMP_H),y)
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ASRCS += arch_setjmp.S
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endif
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DEPPATH += --dep-path machine/risc-v/common
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VPATH += :machine/risc-v/common
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@ -1,5 +1,5 @@
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/****************************************************************************
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/****************************************************************************
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* libs/libc/machine/risc-v/rv32/arch_memcpy.S
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* libs/libc/machine/risc-v/gnu/arch_memcpy.S
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*
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* contributor license agreements. See the NOTICE file distributed with
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106
libs/libc/machine/risc-v/gnu/arch_memset.S
Normal file
106
libs/libc/machine/risc-v/gnu/arch_memset.S
Normal file
@ -0,0 +1,106 @@
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/****************************************************************************
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* libs/libc/machine/risc-v/gnu/arch_memset.S
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*
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* Copyright (c) 2017 SiFive Inc. All rights reserved.
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*
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* This copyrighted material is made available to anyone wishing to use,
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* modify, copy, or redistribute it subject to the terms and conditions
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* of the FreeBSD License. This program is distributed in the hope that
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* it will be useful, but WITHOUT ANY WARRANTY expressed or implied,
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* including the implied warranties of MERCHANTABILITY or FITNESS FOR
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* A PARTICULAR PURPOSE. A copy of this license is available at
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* http://www.opensource.org/licenses.
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*
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****************************************************************************/
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.text
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.global memset
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.type memset, @function
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memset:
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li t1, 15
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move a4, a0
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bleu a2, t1, .Ltiny
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and a5, a4, 15
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bnez a5, .Lmisaligned
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.Laligned:
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bnez a1, .Lwordify
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.Lwordified:
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and a3, a2, ~15
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and a2, a2, 15
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add a3, a3, a4
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#if __riscv_xlen == 64
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1:
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sd a1, 0(a4)
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sd a1, 8(a4)
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#else
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1:
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sw a1, 0(a4)
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sw a1, 4(a4)
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sw a1, 8(a4)
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sw a1, 12(a4)
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#endif
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add a4, a4, 16
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bltu a4, a3, 1b
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bnez a2, .Ltiny
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ret
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.Ltiny:
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sub a3, t1, a2
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sll a3, a3, 2
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1:
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auipc t0, %pcrel_hi(.Ltable)
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add a3, a3, t0
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.option push
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.option norvc
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.Ltable_misaligned:
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jr a3, %pcrel_lo(1b)
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.Ltable:
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sb a1,14(a4)
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sb a1,13(a4)
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sb a1,12(a4)
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sb a1,11(a4)
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sb a1,10(a4)
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sb a1, 9(a4)
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sb a1, 8(a4)
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sb a1, 7(a4)
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sb a1, 6(a4)
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sb a1, 5(a4)
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sb a1, 4(a4)
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sb a1, 3(a4)
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sb a1, 2(a4)
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sb a1, 1(a4)
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sb a1, 0(a4)
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.option pop
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ret
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.Lwordify:
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and a1, a1, 0xFF
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sll a3, a1, 8
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or a1, a1, a3
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sll a3, a1, 16
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or a1, a1, a3
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#if __riscv_xlen == 64
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sll a3, a1, 32
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or a1, a1, a3
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#endif
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j .Lwordified
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.Lmisaligned:
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sll a3, a5, 2
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1:
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auipc t0, %pcrel_hi(.Ltable_misaligned)
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add a3, a3, t0
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mv t0, ra
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jalr a3, %pcrel_lo(1b)
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mv ra, t0
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add a5, a5, -16
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sub a4, a4, a5
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add a2, a2, a5
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bleu a2, t1, .Ltiny
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j .Laligned
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.size memset, .-memset
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@ -1,5 +1,5 @@
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############################################################################
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############################################################################
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# libs/libc/machine/risc-v/common/arch_setjmp.S
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# libs/libc/machine/risc-v/gnu/arch_setjmp.S
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#
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# contributor license agreements. See the NOTICE file distributed with
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# contributor license agreements. See the NOTICE file distributed with
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@ -18,31 +18,7 @@
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#
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#
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############################################################################
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############################################################################
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#include <nuttx/config.h>
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#include "asm.h"
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#ifdef CONFIG_ARCH_RV64
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# define SZREG 8
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# define REG_S sd
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# define REG_L ld
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#elif defined(CONFIG_ARCH_RV32)
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# define SZREG 4
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# define REG_S sw
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# define REG_L lw
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#endif
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#ifdef CONFIG_ARCH_QPFPU
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# define SZFREG 16
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# define FREG_S fsq
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# define FREG_L flq
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#elif defined(CONFIG_ARCH_DPFPU)
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# define SZFREG 8
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# define FREG_S fsd
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# define FREG_L fld
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#elif defined(CONFIG_ARCH_FPU)
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# define SZFREG 4
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# define FREG_S fsw
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# define FREG_L flw
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#endif
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.section .text
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.section .text
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.globl setjmp
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.globl setjmp
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187
libs/libc/machine/risc-v/gnu/arch_strcmp.S
Normal file
187
libs/libc/machine/risc-v/gnu/arch_strcmp.S
Normal file
@ -0,0 +1,187 @@
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/****************************************************************************
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* libs/libc/machine/risc-v/gnu/arch_strcmp.S
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*
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* Copyright (c) 2017 SiFive Inc. All rights reserved.
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*
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* This copyrighted material is made available to anyone wishing to use,
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* modify, copy, or redistribute it subject to the terms and conditions
|
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* of the FreeBSD License. This program is distributed in the hope that
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|
* it will be useful, but WITHOUT ANY WARRANTY expressed or implied,
|
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|
* including the implied warranties of MERCHANTABILITY or FITNESS FOR
|
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|
* A PARTICULAR PURPOSE. A copy of this license is available at
|
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* http://www.opensource.org/licenses.
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*
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****************************************************************************/
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#include "asm.h"
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.text
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.globl strcmp
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.type strcmp, @function
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strcmp:
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or a4, a0, a1
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li t2, -1
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and a4, a4, SZREG-1
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bnez a4, .Lmisaligned
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#if SZREG == 4
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li a5, 0x7f7f7f7f
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#else
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ld a5, mask
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#endif
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.macro check_one_word i n
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REG_L a2, \i*SZREG(a0)
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REG_L a3, \i*SZREG(a1)
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and t0, a2, a5
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or t1, a2, a5
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add t0, t0, a5
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or t0, t0, t1
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bne t0, t2, .Lnull\i
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.if \i+1-\n
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bne a2, a3, .Lmismatch
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.else
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add a0, a0, \n*SZREG
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add a1, a1, \n*SZREG
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beq a2, a3, .Lloop
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# fall through to .Lmismatch
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.endif
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.endm
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.macro foundnull i n
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.ifne \i
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.Lnull\i:
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add a0, a0, \i*SZREG
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add a1, a1, \i*SZREG
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.ifeq \i-1
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.Lnull0:
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.endif
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bne a2, a3, .Lmisaligned
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li a0, 0
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ret
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.endif
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.endm
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.Lloop:
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# examine full words at a time, favoring strings of a couple dozen chars
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#if __riscv_xlen == 32
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check_one_word 0 5
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check_one_word 1 5
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check_one_word 2 5
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check_one_word 3 5
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check_one_word 4 5
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#else
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check_one_word 0 3
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check_one_word 1 3
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check_one_word 2 3
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#endif
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# backwards branch to .Lloop contained above
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.Lmismatch:
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# words don't match, but a2 has no null byte.
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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#if __riscv_xlen == 64
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sll a4, a2, 48
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sll a5, a3, 48
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bne a4, a5, .Lmismatch_upper
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sll a4, a2, 32
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sll a5, a3, 32
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bne a4, a5, .Lmismatch_upper
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|
#endif
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sll a4, a2, 16
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sll a5, a3, 16
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bne a4, a5, .Lmismatch_upper
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srl a4, a2, 8*SZREG-16
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srl a5, a3, 8*SZREG-16
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||||||
|
sub a0, a4, a5
|
||||||
|
and a1, a0, 0xff
|
||||||
|
bnez a1, 1f
|
||||||
|
ret
|
||||||
|
|
||||||
|
.Lmismatch_upper:
|
||||||
|
srl a4, a4, 8*SZREG-16
|
||||||
|
srl a5, a5, 8*SZREG-16
|
||||||
|
sub a0, a4, a5
|
||||||
|
and a1, a0, 0xff
|
||||||
|
bnez a1, 1f
|
||||||
|
ret
|
||||||
|
|
||||||
|
1:
|
||||||
|
and a4, a4, 0xff
|
||||||
|
and a5, a5, 0xff
|
||||||
|
sub a0, a4, a5
|
||||||
|
ret
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
|
#if __riscv_xlen == 64
|
||||||
|
srl a4, a2, 48
|
||||||
|
srl a5, a3, 48
|
||||||
|
bne a4, a5, .Lmismatch_lower
|
||||||
|
srl a4, a2, 32
|
||||||
|
srl a5, a3, 32
|
||||||
|
bne a4, a5, .Lmismatch_lower
|
||||||
|
#endif
|
||||||
|
srl a4, a2, 16
|
||||||
|
srl a5, a3, 16
|
||||||
|
bne a4, a5, .Lmismatch_lower
|
||||||
|
|
||||||
|
srl a4, a2, 8
|
||||||
|
srl a5, a3, 8
|
||||||
|
bne a4, a5, 1f
|
||||||
|
and a4, a2, 0xff
|
||||||
|
and a5, a3, 0xff
|
||||||
|
1:
|
||||||
|
sub a0, a4, a5
|
||||||
|
ret
|
||||||
|
|
||||||
|
.Lmismatch_lower:
|
||||||
|
srl a2, a4, 8
|
||||||
|
srl a3, a5, 8
|
||||||
|
bne a2, a3, 1f
|
||||||
|
and a2, a4, 0xff
|
||||||
|
and a3, a5, 0xff
|
||||||
|
1:
|
||||||
|
sub a0, a2, a3
|
||||||
|
ret
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
.Lmisaligned:
|
||||||
|
# misaligned
|
||||||
|
lbu a2, 0(a0)
|
||||||
|
lbu a3, 0(a1)
|
||||||
|
add a0, a0, 1
|
||||||
|
add a1, a1, 1
|
||||||
|
bne a2, a3, 1f
|
||||||
|
bnez a2, .Lmisaligned
|
||||||
|
|
||||||
|
1:
|
||||||
|
sub a0, a2, a3
|
||||||
|
ret
|
||||||
|
|
||||||
|
# cases in which a null byte was detected
|
||||||
|
#if __riscv_xlen == 32
|
||||||
|
foundnull 0 5
|
||||||
|
foundnull 1 5
|
||||||
|
foundnull 2 5
|
||||||
|
foundnull 3 5
|
||||||
|
foundnull 4 5
|
||||||
|
#else
|
||||||
|
foundnull 0 3
|
||||||
|
foundnull 1 3
|
||||||
|
foundnull 2 3
|
||||||
|
#endif
|
||||||
|
.size strcmp, .-strcmp
|
||||||
|
|
||||||
|
#if SZREG == 8
|
||||||
|
.section .srodata.cst8,"aM",@progbits,8
|
||||||
|
.align 3
|
||||||
|
mask:
|
||||||
|
.dword 0x7f7f7f7f7f7f7f7f
|
||||||
|
#endif
|
||||||
52
libs/libc/machine/risc-v/gnu/asm.h
Normal file
52
libs/libc/machine/risc-v/gnu/asm.h
Normal file
@ -0,0 +1,52 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* libs/libc/machine/risc-v/gnu/asm.h
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 SiFive Inc. All rights reserved.
|
||||||
|
*
|
||||||
|
* This copyrighted material is made available to anyone wishing to use,
|
||||||
|
* modify, copy, or redistribute it subject to the terms and conditions
|
||||||
|
* of the FreeBSD License. This program is distributed in the hope that
|
||||||
|
* it will be useful, but WITHOUT ANY WARRANTY expressed or implied,
|
||||||
|
* including the implied warranties of MERCHANTABILITY or FITNESS FOR
|
||||||
|
* A PARTICULAR PURPOSE. A copy of this license is available at
|
||||||
|
* http://www.opensource.org/licenses.
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __LIBS_LIBC_MACHINE_RISCV_GNU_ASM_H
|
||||||
|
#define __LIBS_LIBC_MACHINE_RISCV_GNU_ASM_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_RV64
|
||||||
|
# define SZREG 8
|
||||||
|
# define REG_S sd
|
||||||
|
# define REG_L ld
|
||||||
|
#else
|
||||||
|
# define SZREG 4
|
||||||
|
# define REG_S sw
|
||||||
|
# define REG_L lw
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_QPFPU
|
||||||
|
# define SZFREG 16
|
||||||
|
# define FREG_S fsq
|
||||||
|
# define FREG_L flq
|
||||||
|
#elif defined(CONFIG_ARCH_DPFPU)
|
||||||
|
# define SZFREG 8
|
||||||
|
# define FREG_S fsd
|
||||||
|
# define FREG_L fld
|
||||||
|
#elif defined(CONFIG_ARCH_FPU)
|
||||||
|
# define SZFREG 4
|
||||||
|
# define FREG_S fsw
|
||||||
|
# define FREG_L flw
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __LIBS_LIBC_MACHINE_RISCV_GNU_ASM_H */
|
||||||
@ -1,10 +0,0 @@
|
|||||||
#
|
|
||||||
# For a description of the syntax of this configuration file,
|
|
||||||
# see the file kconfig-language.txt in the NuttX tools repository.
|
|
||||||
#
|
|
||||||
|
|
||||||
config RISCV_MEMCPY
|
|
||||||
bool "Enable optimized memcpy() for RISC-V"
|
|
||||||
select LIBC_ARCH_MEMCPY
|
|
||||||
---help---
|
|
||||||
Enable optimized RISC-V specific memcpy() library function
|
|
||||||
@ -1,27 +0,0 @@
|
|||||||
############################################################################
|
|
||||||
# libs/libc/machine/risc-v/rv32/Make.defs
|
|
||||||
#
|
|
||||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
|
||||||
# contributor license agreements. See the NOTICE file distributed with
|
|
||||||
# this work for additional information regarding copyright ownership. The
|
|
||||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
|
||||||
# "License"); you may not use this file except in compliance with the
|
|
||||||
# License. You may obtain a copy of the License at
|
|
||||||
#
|
|
||||||
# http://www.apache.org/licenses/LICENSE-2.0
|
|
||||||
#
|
|
||||||
# Unless required by applicable law or agreed to in writing, software
|
|
||||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
|
||||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
|
||||||
# License for the specific language governing permissions and limitations
|
|
||||||
# under the License.
|
|
||||||
#
|
|
||||||
############################################################################
|
|
||||||
|
|
||||||
ifeq ($(CONFIG_RISCV_MEMCPY),y)
|
|
||||||
ASRCS += arch_memcpy.S
|
|
||||||
endif
|
|
||||||
|
|
||||||
DEPPATH += --dep-path machine/risc-v/rv32
|
|
||||||
VPATH += :machine/risc-v/rv32
|
|
||||||
|
|
||||||
@ -1,4 +0,0 @@
|
|||||||
#
|
|
||||||
# For a description of the syntax of this configuration file,
|
|
||||||
# see the file kconfig-language.txt in the NuttX tools repository.
|
|
||||||
#
|
|
||||||
@ -1,20 +0,0 @@
|
|||||||
############################################################################
|
|
||||||
# libs/libc/machine/risc-v/rv64/Make.defs
|
|
||||||
#
|
|
||||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
|
||||||
# contributor license agreements. See the NOTICE file distributed with
|
|
||||||
# this work for additional information regarding copyright ownership. The
|
|
||||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
|
||||||
# "License"); you may not use this file except in compliance with the
|
|
||||||
# License. You may obtain a copy of the License at
|
|
||||||
#
|
|
||||||
# http://www.apache.org/licenses/LICENSE-2.0
|
|
||||||
#
|
|
||||||
# Unless required by applicable law or agreed to in writing, software
|
|
||||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
|
||||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
|
||||||
# License for the specific language governing permissions and limitations
|
|
||||||
# under the License.
|
|
||||||
#
|
|
||||||
############################################################################
|
|
||||||
|
|
||||||
Loading…
Reference in New Issue
Block a user