From f8ffcbbf3677d9a0124fb4b242f54ddfc5bbc970 Mon Sep 17 00:00:00 2001 From: Ville Juven Date: Wed, 2 Feb 2022 13:40:24 +0200 Subject: [PATCH] MPFS: Remove definition and reference to MPFS_PLIC_CTRL The register does not exist. c906 implementation has it, but MPFS does not. --- arch/risc-v/src/mpfs/hardware/mpfs_plic.h | 2 -- arch/risc-v/src/mpfs/mpfs_irq.c | 4 ---- 2 files changed, 6 deletions(-) diff --git a/arch/risc-v/src/mpfs/hardware/mpfs_plic.h b/arch/risc-v/src/mpfs/hardware/mpfs_plic.h index 1789524436..e805d31beb 100755 --- a/arch/risc-v/src/mpfs/hardware/mpfs_plic.h +++ b/arch/risc-v/src/mpfs/hardware/mpfs_plic.h @@ -97,8 +97,6 @@ #define MPFS_PLIC_H4_SIE4 (MPFS_PLIC_BASE + 0x002410) #define MPFS_PLIC_H4_SIE5 (MPFS_PLIC_BASE + 0x002414) -#define MPFS_PLIC_CTRL (MPFS_PLIC_BASE + 0x1FFFFC) - #define MPFS_PLIC_NEXTHART_OFFSET (0x2000) #define MPFS_PLIC_MTHRESHOLD_OFFSET (0x0000) #define MPFS_PLIC_MCLAIM_OFFSET (0x0004) diff --git a/arch/risc-v/src/mpfs/mpfs_irq.c b/arch/risc-v/src/mpfs/mpfs_irq.c index e914961343..ca7d6046ae 100755 --- a/arch/risc-v/src/mpfs/mpfs_irq.c +++ b/arch/risc-v/src/mpfs/mpfs_irq.c @@ -60,10 +60,6 @@ void up_irqinitialize(void) up_disable_irq(RISCV_IRQ_MTIMER); - /* enable access from supervisor mode */ - - putreg32(0x1, MPFS_PLIC_CTRL); - /* Disable all global interrupts for current hart */ uint64_t hart_id = READ_CSR(mhartid);