stm32g4: add CORDIC driver
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@ -2752,6 +2752,7 @@ config STM32_CORDIC
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bool "CORDIC Accelerator"
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default n
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depends on STM32_HAVE_CORDIC
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select MATH_CORDIC_USE_Q31
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config STM32_BKP
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bool "BKP"
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@ -267,3 +267,7 @@ endif
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ifeq ($(CONFIG_STM32_FOC),y)
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CHIP_CSRCS += stm32_foc.c
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endif
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ifeq ($(CONFIG_STM32_CORDIC),y)
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CHIP_CSRCS += stm32_cordic.c
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endif
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330
arch/arm/src/stm32/stm32_cordic.c
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330
arch/arm/src/stm32/stm32_cordic.c
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@ -0,0 +1,330 @@
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/****************************************************************************
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* arch/arm/src/stm32/stm32_cordic.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <errno.h>
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#include <assert.h>
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#include <debug.h>
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#include <arch/board/board.h>
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#include <nuttx/math/cordic.h>
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#include "arm_arch.h"
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#include "chip.h"
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#include "hardware/stm32g4xxxx_cordic.h"
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#include "stm32_cordic.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define STM32_CORDIC_PRECISION (3)
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#define STM32_CORDIC_ARGSIZE (0) /* Argument size is 32-bit */
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#define STM32_CORDIC_RESSIZE (0) /* Result size is 32-bit */
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* This structure represents the state of one PWM timer */
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struct stm32_cordic_s
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{
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FAR const struct cordic_ops_s *ops; /* Lower half operations */
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uint32_t base; /* The base address of the CORDIC */
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bool inuse; /* True: driver is in-use */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* Register access */
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static uint32_t cordic_getreg(FAR struct stm32_cordic_s *priv, int offset);
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static void cordic_putreg(FAR struct stm32_cordic_s *priv, int offset,
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uint32_t value);
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/* Ops */
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int cordic_calc(FAR struct cordic_lowerhalf_s *lower,
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FAR struct cordic_calc_s *calc);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* STM32 specific CORDIC ops */
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struct cordic_ops_s g_stm32_cordic_ops =
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{
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.calc = cordic_calc
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};
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/* STM32 CORDIC device */
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struct stm32_cordic_s g_stm32_cordic_dev =
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{
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.ops = &g_stm32_cordic_ops,
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.base = STM32_CORDIC_BASE,
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.inuse = false
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: cordic_getreg
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****************************************************************************/
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static uint32_t cordic_getreg(FAR struct stm32_cordic_s *priv, int offset)
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{
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return getreg32(priv->base + offset);
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}
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/****************************************************************************
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* Name: cordic_putreg
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****************************************************************************/
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static void cordic_putreg(FAR struct stm32_cordic_s *priv, int offset,
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uint32_t value)
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{
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putreg32(value, priv->base + offset);
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}
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/****************************************************************************
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* Name: cordic_calc
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****************************************************************************/
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int cordic_calc(FAR struct cordic_lowerhalf_s *lower,
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FAR struct cordic_calc_s *calc)
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{
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FAR struct stm32_cordic_s *priv = (FAR struct stm32_cordic_s *)lower;
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int ret = OK;
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uint32_t csr = 0;
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bool arg2_inc = false;
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uint8_t scale = 0;
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DEBUGASSERT(lower);
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DEBUGASSERT(calc);
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/* Configure CORDIC function */
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switch (calc->func)
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{
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case CORDIC_CALC_FUNC_COS:
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{
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csr |= CORDIC_CSR_FUNC_COS;
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arg2_inc = true;
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scale = 0;
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break;
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}
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case CORDIC_CALC_FUNC_SIN:
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{
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csr |= CORDIC_CSR_FUNC_SIN;
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arg2_inc = true;
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scale = 0;
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break;
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}
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case CORDIC_CALC_FUNC_PHASE:
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{
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csr |= CORDIC_CSR_FUNC_PHASE;
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arg2_inc = true;
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scale = 0;
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break;
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}
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case CORDIC_CALC_FUNC_MOD:
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{
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csr |= CORDIC_CSR_FUNC_MOD;
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arg2_inc = true;
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scale = 0;
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break;
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}
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case CORDIC_CALC_FUNC_ARCTAN:
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{
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csr |= CORDIC_CSR_FUNC_ARCTAN;
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arg2_inc = true;
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scale = 0;
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break;
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}
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case CORDIC_CALC_FUNC_HCOS:
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{
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csr |= CORDIC_CSR_FUNC_HCOS;
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arg2_inc = false;
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scale = 1;
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break;
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}
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case CORDIC_CALC_FUNC_HSIN:
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{
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csr |= CORDIC_CSR_FUNC_HSIN;
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arg2_inc = false;
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scale = 1;
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break;
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}
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case CORDIC_CALC_FUNC_HARCTAN:
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{
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csr |= CORDIC_CSR_FUNC_HARCTAN;
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arg2_inc = false;
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scale = 1;
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break;
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}
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case CORDIC_CALC_FUNC_LN:
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{
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csr |= CORDIC_CSR_FUNC_LN;
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arg2_inc = false;
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scale = 1;
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break;
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}
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case CORDIC_CALC_FUNC_SQRT:
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{
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csr |= CORDIC_CSR_FUNC_SQRT;
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arg2_inc = false;
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scale = 1;
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break;
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}
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default:
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{
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ret = -EINVAL;
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goto errout;
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}
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}
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/* Configure precision */
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csr |= ((STM32_CORDIC_PRECISION << CORDIC_CSR_PRECISION_SHIFT) &
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CORDIC_CSR_PRECISION_MASK);
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/* Configure scale */
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csr |= ((scale << CORDIC_CSR_SCALE_SHIFT) & CORDIC_CSR_SCALE_MASK);
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/* Configure width of output data */
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csr |= STM32_CORDIC_RESSIZE;
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/* Configure width of input data */
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csr |= STM32_CORDIC_ARGSIZE;
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/* Include secondary argument */
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if (arg2_inc == true)
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{
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csr |= CORDIC_CSR_NARGS;
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}
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/* Include secondary result */
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if (calc->res2_incl == true)
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{
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csr |= CORDIC_CSR_NRES;
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}
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/* Write CSR */
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cordic_putreg(priv, STM32_CORDIC_CSR_OFFSET, csr);
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/* Write arguments */
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cordic_putreg(priv, STM32_CORDIC_WDATA_OFFSET, calc->arg1);
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if (arg2_inc == true)
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{
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cordic_putreg(priv, STM32_CORDIC_WDATA_OFFSET, calc->arg2);
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}
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/* Read results - blocking.
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* NOTE: We don't need to wait for RRDY flag as wait sates are
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* inserted automatically on RDATA read.
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*/
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calc->res1 = cordic_getreg(priv, STM32_CORDIC_RDATA_OFFSET);
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if (calc->res2_incl == true)
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{
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calc->res2 = cordic_getreg(priv, STM32_CORDIC_RDATA_OFFSET);
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}
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else
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{
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calc->res2 = 0;
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}
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errout:
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return ret;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_cordicinitialize
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*
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* Description:
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* Initialize a CORDIC device. This function must be called
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* from board-specific logic.
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*
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* Returned Value:
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* On success, a pointer to the lower half CORDIC driver is returned.
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* NULL is returned on any failure.
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*
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****************************************************************************/
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FAR struct cordic_lowerhalf_s *stm32_cordicinitialize(void)
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{
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FAR struct cordic_lowerhalf_s *lower = NULL;
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if (g_stm32_cordic_dev.inuse == true)
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{
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_err("STM32 CORDIC device already in use\n");
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set_errno(EBUSY);
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goto errout;
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}
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/* Get lower-half device */
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lower = (FAR struct cordic_lowerhalf_s *) &g_stm32_cordic_dev;
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/* The driver is now in-use */
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g_stm32_cordic_dev.inuse = true;
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errout:
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return lower;
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}
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55
arch/arm/src/stm32/stm32_cordic.h
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55
arch/arm/src/stm32/stm32_cordic.h
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@ -0,0 +1,55 @@
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/****************************************************************************
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* arch/arm/src/stm32/stm32_cordic.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_STM32_CORDIC_H
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#define __ARCH_ARM_SRC_STM32_STM32_CORDIC_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_cordicinitialize
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*
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* Description:
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* Initialize a CORDIC device. This function must be called
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* from board-specific logic.
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*
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* Returned Value:
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* On success, a pointer to the lower half CORDIC driver is returned.
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* NULL is returned on any failure.
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*
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****************************************************************************/
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FAR struct cordic_lowerhalf_s *stm32_cordicinitialize(void);
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#endif /* __ARCH_ARM_SRC_STM32_STM32_CORDIC_H */
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