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The basic Kinetis K60 port works

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3892 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-08-18 22:37:09 +00:00
parent 6269c828b8
commit fa1e267b3b
8 changed files with 236 additions and 66 deletions
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2
ChangeLog
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@ -2004,4 +2004,6 @@
(TWR-K60N512).
* drivers/can.c: Fixe a semaphore overflow problem in the CAN driver
(reported by Li Zhouy (Lzzy)).
* 8/18/2011: The basic port to the FreeScale Kinetics TWR-K60N512 board is
now functional.

107
Documentation/NuttX.html
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@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
<p>Last Updated: August 1, 2011</p>
<p>Last Updated: August 18, 2011</p>
</td>
</tr>
</table>
@ -953,6 +953,7 @@
<li><a href="#arm920t">ARM920T</a> (1) </li>
<li><a href="#arm926ejs">ARM926EJS</a> (3) </li>
<li><a href="#armcortexm3">ARM Cortex-M3</a> (10)</li>
<li><a href="#armcortexm4">ARM Cortex-M4</a> (2)</li>
</ul>
<li>Atmel AVR
<ul>
@ -1556,6 +1557,69 @@
</p>
</td>
</tr>
<tr>
<td valign="top"><img height="20" width="20" src="favicon.ico"></td>
<td bgcolor="#5eaee1">
<a name="armcortexm4"><b>ARM Cortex-M4</b>.</a>
</td>
</tr>
<tr>
<td><br></td>
<td>
<p>
<b>FreeScale Kinetics K40</b>.
This port uses the Freescale Kinetis KwiStick K40.
Refer to the <a href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KWIKSTIK-K40">Freescale web site</a> for further information about this board.
The Kwikstik is used with the FreeScale Tower System (mostly just to provide a simple UART connection)
</p>
<p>
<b>STATUS:</b>
As of this writing, the basic port is complete but I accidentally locked my board during the initial bringup.
Further development is stalled unless I learn how to unlock the device (or unless I get another K40).
Additional work remaining includes, among other things: (1) complete the basic bring-up,
(2) bring up the NuttShell NSH, (3) develop support for the SDHC-based SD card, and
(4) develop support for USB host and device.
NOTE: most of these remaining tasks are shared with the K60 work described below.
</p>
</td>
</tr>
<tr>
<td><br></td>
<td><hr></td>
</tr>
<td><br></td>
<td>
<p>
<b>FreeScale Kinetics K60</b>.
This port uses the Freescale Kinetis TWR-K60N512 tower system.
Refer to the <a href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=TWR-K60N512-KIT">Freescale web site</a> for further information about this board.
The TWR-K60N51 includes with the FreeScale Tower System which provides (among other things) a DBP UART connection.
</p>
<p>
<b>STATUS:</b>
As of this writing, the basic port is complete and passes the NuttX OS test.
Additional work remaining includes, among other things: (1) bring up the NuttShell NSH,
(2) integrate the Ethernet driver, (3) develop support for the SDHC-based SD card, and
(4) develop support for USB host and device.
NOTE: most of these remaining tasks are shared with the K40 work described above.
</p>
</td>
</tr>
<tr>
<td><br></td>
<td><hr></td>
</tr>
<tr>
<td><br></td>
<td>
<p>
<b>Development Environments:</b>
1) Linux with native Linux GNU toolchain, 2) Cygwin with Cygwin GNU Cortex-M3 or 4toolchain, or 3) Cygwin with Windows native GNU Cortex-M3 or M4 toolchain (CodeSourcery or devkitARM). A DIY toolchain for Linux or Cygwin is provided by the NuttX
<a href="http://sourceforge.net/projects/nuttx/files/buildroot/">buildroot</a> package.
I use FreeScale's <i>CodeWarrior</i> IDE only to work with the JTAG debugger built into the boards.
</p>
</td>
</tr>
<tr>
<td valign="top"><img height="20" width="20" src="favicon.ico"></td>
@ -2598,8 +2662,49 @@ buildroot-1.10 2011-05-06 &lt;spudmonkey@racsa.co.cr&gt;
<ul><pre>
nuttx-6.8 2011-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
* arch/arm/src/lpc17xx/chip.h: Fix some chip memory configuration errors
for the LPC1764, LPC1756, and LPC1754 (submitted by Li Zhuoy (Lzzy))
* arch/arm/src/lpc17xx/lpc17_can.h: Revised CAN driver submitted by
Li Zhuoy (Lzzy). The driver now supports both CAN1 and CAN2.
* arch/arm/sim/up_lcd.c: Add a simulated LCD driver.
* configs/stm3210e-eval/nxlines: Added a configuration to build
examples/nxlines.
* arch/graphics: Used apps/examples/nxlines to (finally) verify the NX
trapezoid drawing functions and (wide) line drawing functions.
* arch/rgmp and configs/rgmp. Yu Qiang has ported RGMP to the OMAP4430 (arm)
pandaboard and release the new RGMP 0.3 version. The main changes are: (1)
Separate configs/rgmp/x86 and configs/rgmp/arm configuration directory, and
(2) Extract architecture dependent code in arch/rgmp/include and
arch/rgmp/src into corresponding x86/ and arm/ directories.
* arch/arm/src/kinetis, arch/arm/include/kinetis, configs/kwikstick-k40:
Add a directory structure to support the port to the Kinesis KwikStik-K40.
There is no real substance in the initial check-in; only the directory
structure and skeleton files (Code complete on 8/15/11).
* arch/arm/include/armv7-m, arch/arm/src/armv7-m, etc.: Rename all cortexm3
directories and files to armv7-m; Change name of of all CORTEXM3 constants
to ARMV7M. This is a major namespace change needed to cleanly support the
ARM Cortex-M4 which is also in the ARMv7 M Series (specifically, ARMv7E-M).
* sched/sig_initialize.c, sig_received.c, and mq_waitirq.c. Fixed several
critical bugs related to signal handling initialization and for signals
the wake up tasks that are waiting to send or receive message queues. In
the first two files, errors would prevent proper allocation of signal-related
structures from interrupt handlers. In the second, there was missing
"clean-up" logic after a signal occurred, leaving the message queue in
a bad state and resulting in PANICs. All are important. (submitted by
hkwilton).
* arch/arm/src/kinetis: Added header files defining all Kinetis registers
and bit fields within all Kinetis registers.
* configs/twr-k60n512: Add support for the Kinetis K60 Tower board
(TWR-K60N512).
* drivers/can.c: Fixe a semaphore overflow problem in the CAN driver
(reported by Li Zhouy (Lzzy)).
* 8/18/2011: The basic port to the FreeScale Kinetics TWR-K60N512 board is
now functional.
apps-6.8 2011-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
* apps/examples/nxlines: Added a test for NX line drawing capabilities.
pascal-3.1 2011-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
buildroot-1.11 2011-xx-xx &lt;spudmonkey@racsa.co.cr&gt;

14
arch/arm/src/kinetis/kinetis_lowputc.c
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@ -218,14 +218,14 @@ void kinetis_lowsetup(void)
#if defined(CONFIG_KINETIS_UART4) || defined(CONFIG_KINETIS_UART5)
regval = getreg32(KINETIS_SIM_SCGC4);
regval = getreg32(KINETIS_SIM_SCGC1);
# ifdef CONFIG_KINETIS_UART4
regval |= SIM_SCGC1_UART4;
# endif
# ifdef CONFIG_KINETIS_UART5
regval |= SIM_SCGC1_UART5;
# endif
putreg32(regval, KINETIS_SIM_SCGC4);
putreg32(regval, KINETIS_SIM_SCGC1);
#endif
@ -371,7 +371,7 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
regval |= (((uint8_t)tmp) << UART_BDH_SBR_SHIFT) & UART_BDH_SBR_MASK;
putreg8(regval, uart_base+KINETIS_UART_BDH_OFFSET);
tmp = sbr & 0xff;
regval = sbr & 0xff;
putreg8(regval, uart_base+KINETIS_UART_BDL_OFFSET);
/* Calculate a fractional divider to get closer to the requested baud.
@ -411,14 +411,14 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
{
depth = (3 * depth) >> 2;
}
putreg8(depth , uart_base+KINETIS_UART5_RWFIFO);
putreg8(depth , uart_base+KINETIS_UART_RWFIFO_OFFSET);
depth = g_sizemap[(regval & UART_PFIFO_TXFIFOSIZE_MASK) >> UART_PFIFO_TXFIFOSIZE_SHIFT];
if (depth > 3)
{
depth = (depth >> 2);
}
putreg8(depth, uart_base+KINETIS_UART5_TWFIFO);
putreg8(depth, uart_base+KINETIS_UART_TWFIFO_OFFSET);
/* Enable RX and TX FIFOs */
@ -426,8 +426,8 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
#else
/* Set the watermarks to zero and disable the FIFOs */
putreg8(0, uart_base+KINETIS_UART5_RWFIFO);
putreg8(0, uart_base+KINETIS_UART5_TWFIFO);
putreg8(0, uart_base+KINETIS_UART_RWFIFO_OFFSET);
putreg8(0, uart_base+KINETIS_UART_TWFIFO_OFFSET);
putreg8(0, uart_base+KINETIS_UART_PFIFO_OFFSET);
#endif

25
configs/kwikstik-k40/README.txt
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@ -18,6 +18,7 @@ Contents
- Connections via the General Purpose Tower Plug-in (TWRPI) Socket
- Connections via the Tower Primary Connector Side A
- Connections via the Tower Primary Connector Side B
- TWR-SER Serial Board Connection
o Development Environment
o GNU Toolchain Options
o IDEs
@ -121,6 +122,30 @@ B50 SCL1 PTE1/I2C1_SCL
B51 SDA1 PTE0/I2C1_SDA
B52 GPIO5 / SD_CARD_DET PTA16
TWR-SER Serial Board Connection
===============================
The serial board connects into the tower and then maps to the tower pins to
yet other functions (see TWR-SER.pdf).
For the serial port, the following jumpers are required:
J15: 1-2 (default)
J17: 1-2 (default)
J18: 1-2 (default)
J19: 1-2 (default)
The two connections map as follows:
A41 RXD0 - Not connected
A42 TXD0 - Not connected
A43 RXD1 - ELE_RXD (connects indirectory to DB-9 connector J8)
A44 TXD1 - ELE_TXD (connects indirectory to DB-9 connector J8)
Finally, we can conclude that
UART5 (PTE8/9) is associated with the DB9 connector
Development Environment
=======================

64
configs/twr-k60n512/README.txt
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@ -18,6 +18,7 @@ Contents
- Connections via the General Purpose Tower Plug-in (TWRPI) Socket
- Connections via the Tower Primary Connector Side A
- Connections via the Tower Primary Connector Side B
- TWR-SER Serial Board Connection
o LEDs
o Development Environment
o GNU Toolchain Options
@ -69,24 +70,24 @@ LEDs E1 / Orange LED PTA11 PTA11
E2 / Yellow LED PTA28 PTA28
E3 / Green LED PTA29 PTA29
E4 / Blue LED PTA10 PTA10
Potentiometer Potentiometer (R71) ? ADC1_DM1
Accelerometer I2C SDA PTD9 I2C0_SDA
I2C SCL PTD8 I2C0_SCL
IRQ PTD10 PTD10
Touch Pad / Segment Electrode 0 (J3 Pin 3) PTB0 TSI0_CH0
LCD TWRPI Socket Electrode 1 (J3 Pin 5) PTB1 TSI0_CH6
Electrode 2 (J3 Pin 7) PTB2 TSI0_CH7
Electrode 3 (J3 Pin 8) PTB3 TSI0_CH8
Electrode 4 (J3 Pin 9) PTC0 TSI0_CH13
Electrode 5 (J3 Pin 10) PTC1 TSI0_CH14
Electrode 6 (J3 Pin 11) PTC2 TSI0_CH15
Electrode 7 (J3 Pin 12) PTA4 TSI0_CH5
Electrode 8 (J3 Pin 13) PTB16 TSI0_CH9
Electrode 9 (J3 Pin 14) PTB17 TSI0_CH10
Electrode 10 (J3 Pin 15) PTB18 TSI0_CH11
Electrode 11 (J3 Pin 16) PTB19 TSI0_CH12
TWRPI ID0 (J3 Pin 17) ? ADC1_DP1
TWRPI ID1 (J3 Pin 18) ? ADC1_SE16
Potentiometer Potentiometer (R71) ? ADC1_DM1
Accelerometer I2C SDA PTD9 I2C0_SDA
I2C SCL PTD8 I2C0_SCL
IRQ PTD10 PTD10
Touch Pad / Segment Electrode 0 (J3 Pin 3) PTB0 TSI0_CH0
LCD TWRPI Socket Electrode 1 (J3 Pin 5) PTB1 TSI0_CH6
Electrode 2 (J3 Pin 7) PTB2 TSI0_CH7
Electrode 3 (J3 Pin 8) PTB3 TSI0_CH8
Electrode 4 (J3 Pin 9) PTC0 TSI0_CH13
Electrode 5 (J3 Pin 10) PTC1 TSI0_CH14
Electrode 6 (J3 Pin 11) PTC2 TSI0_CH15
Electrode 7 (J3 Pin 12) PTA4 TSI0_CH5
Electrode 8 (J3 Pin 13) PTB16 TSI0_CH9
Electrode 9 (J3 Pin 14) PTB17 TSI0_CH10
Electrode 10 (J3 Pin 15) PTB18 TSI0_CH11
Electrode 11 (J3 Pin 16) PTB19 TSI0_CH12
TWRPI ID0 (J3 Pin 17) ? ADC1_DP1
TWRPI ID1 (J3 Pin 18) ? ADC1_SE16
Connections via the General Purpose Tower Plug-in (TWRPI) Socket
-------------------- ------------------------- -------- -------------------
@ -229,6 +230,33 @@ B78 EBI_D2 PTC13
B79 EBI_D1 PTC14
B80 EBI_D0 PTC15
TWR-SER Serial Board Connection
===============================
The serial board connects into the tower and then maps to the tower pins to
yet other functions (see TWR-SER.pdf).
For the serial port, the following jumpers are required:
J15: 1-2 (default)
J17: 1-2 (default)
J18: 1-2 (default)
J19: 1-2 (default)
The two connections map as follows:
A41 RXD0 - Not connected
A42 TXD0 - Not connected
A43 RXD1 - ELE_RXD (connects indirectory to DB-9 connector J8)
A44 TXD1 - ELE_TXD (connects indirectory to DB-9 connector J8)
Finally, we can conclude that:
UART4 (PTE24/25) is not connected, and
UART3 (PTC16/17) is associated with the DB9 connector
NOTE: UART5 is associated with OSJTAG bridge and may also be usable.
LEDs
====

46
configs/twr-k60n512/include/board.h
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@ -153,24 +153,24 @@
* E2 / Yellow LED PTA28 PTA28
* E3 / Green LED PTA29 PTA29
* E4 / Blue LED PTA10 PTA10
* Potentiometer Potentiometer (R71) ? ADC1_DM1
* Accelerometer I2C SDA PTD9 I2C0_SDA
* I2C SCL PTD8 I2C0_SCL
* IRQ PTD10 PTD10
* Touch Pad / Segment Electrode 0 (J3 Pin 3) PTB0 TSI0_CH0
* LCD TWRPI Socket Electrode 1 (J3 Pin 5) PTB1 TSI0_CH6
* Electrode 2 (J3 Pin 7) PTB2 TSI0_CH7
* Electrode 3 (J3 Pin 8) PTB3 TSI0_CH8
* Electrode 4 (J3 Pin 9) PTC0 TSI0_CH13
* Electrode 5 (J3 Pin 10) PTC1 TSI0_CH14
* Electrode 6 (J3 Pin 11) PTC2 TSI0_CH15
* Electrode 7 (J3 Pin 12) PTA4 TSI0_CH5
* Electrode 8 (J3 Pin 13) PTB16 TSI0_CH9
* Electrode 9 (J3 Pin 14) PTB17 TSI0_CH10
* Electrode 10 (J3 Pin 15) PTB18 TSI0_CH11
* Electrode 11 (J3 Pin 16) PTB19 TSI0_CH12
* TWRPI ID0 (J3 Pin 17) ? ADC1_DP1
* TWRPI ID1 (J3 Pin 18) ? ADC1_SE16
* Potentiometer Potentiometer (R71) ? ADC1_DM1
* Accelerometer I2C SDA PTD9 I2C0_SDA
* I2C SCL PTD8 I2C0_SCL
* IRQ PTD10 PTD10
* Touch Pad / Segment Electrode 0 (J3 Pin 3) PTB0 TSI0_CH0
* LCD TWRPI Socket Electrode 1 (J3 Pin 5) PTB1 TSI0_CH6
* Electrode 2 (J3 Pin 7) PTB2 TSI0_CH7
* Electrode 3 (J3 Pin 8) PTB3 TSI0_CH8
* Electrode 4 (J3 Pin 9) PTC0 TSI0_CH13
* Electrode 5 (J3 Pin 10) PTC1 TSI0_CH14
* Electrode 6 (J3 Pin 11) PTC2 TSI0_CH15
* Electrode 7 (J3 Pin 12) PTA4 TSI0_CH5
* Electrode 8 (J3 Pin 13) PTB16 TSI0_CH9
* Electrode 9 (J3 Pin 14) PTB17 TSI0_CH10
* Electrode 10 (J3 Pin 15) PTB18 TSI0_CH11
* Electrode 11 (J3 Pin 16) PTB19 TSI0_CH12
* TWRPI ID0 (J3 Pin 17) ? ADC1_DP1
* TWRPI ID1 (J3 Pin 18) ? ADC1_SE16
*/
#define PIN_UART5_RX PIN_UART5_RX_2
@ -257,6 +257,16 @@
* A80 EBI_AD0 PTD6
*/
/* PTE 26/27 */
#define PIN_UART3_RX PIN_UART3_RX_2
#define PIN_UART3_TX PIN_UART3_TX_2
/* PTE 24/25 */
#define PIN_UART4_RX PIN_UART4_RX_2
#define PIN_UART4_TX PIN_UART4_TX_2
/* Connections via the Tower Primary Connector Side B
* --- -------------------- --------------------------------
* PIN NAME USAGE

8
configs/twr-k60n512/ostest/defconfig
View File

@ -152,9 +152,9 @@ CONFIG_KINETIS_FLEXBUS=n
CONFIG_KINETIS_UART0=n
CONFIG_KINETIS_UART1=n
CONFIG_KINETIS_UART2=n
CONFIG_KINETIS_UART3=n
CONFIG_KINETIS_UART3=y
CONFIG_KINETIS_UART4=n
CONFIG_KINETIS_UART5=y
CONFIG_KINETIS_UART5=n
CONFIG_KINETIS_ENET=n
CONFIG_KINETIS_RNGB=n
CONFIG_KINETIS_FLEXCAN0=n
@ -225,9 +225,9 @@ CONFIG_KINETIS_PORTEINTS=n
CONFIG_UART0_SERIAL_CONSOLE=n
CONFIG_UART1_SERIAL_CONSOLE=n
CONFIG_UART2_SERIAL_CONSOLE=n
CONFIG_UART3_SERIAL_CONSOLE=n
CONFIG_UART3_SERIAL_CONSOLE=y
CONFIG_UART4_SERIAL_CONSOLE=n
CONFIG_UART5_SERIAL_CONSOLE=y
CONFIG_UART5_SERIAL_CONSOLE=n
CONFIG_UART0_TXBUFSIZE=256
CONFIG_UART1_TXBUFSIZE=256

36
configs/twr-k60n512/src/twrk60-internal.h
View File

@ -89,24 +89,24 @@
* E2 / Yellow LED PTA28 PTA28
* E3 / Green LED PTA29 PTA29
* E4 / Blue LED PTA10 PTA10
* Potentiometer Potentiometer (R71) ? ADC1_DM1
* Accelerometer I2C SDA PTD9 I2C0_SDA
* I2C SCL PTD8 I2C0_SCL
* IRQ PTD10 PTD10
* Touch Pad / Segment Electrode 0 (J3 Pin 3) PTB0 TSI0_CH0
* LCD TWRPI Socket Electrode 1 (J3 Pin 5) PTB1 TSI0_CH6
* Electrode 2 (J3 Pin 7) PTB2 TSI0_CH7
* Electrode 3 (J3 Pin 8) PTB3 TSI0_CH8
* Electrode 4 (J3 Pin 9) PTC0 TSI0_CH13
* Electrode 5 (J3 Pin 10) PTC1 TSI0_CH14
* Electrode 6 (J3 Pin 11) PTC2 TSI0_CH15
* Electrode 7 (J3 Pin 12) PTA4 TSI0_CH5
* Electrode 8 (J3 Pin 13) PTB16 TSI0_CH9
* Electrode 9 (J3 Pin 14) PTB17 TSI0_CH10
* Electrode 10 (J3 Pin 15) PTB18 TSI0_CH11
* Electrode 11 (J3 Pin 16) PTB19 TSI0_CH12
* TWRPI ID0 (J3 Pin 17) ? ADC1_DP1
* TWRPI ID1 (J3 Pin 18) ? ADC1_SE16
* Potentiometer Potentiometer (R71) ? ADC1_DM1
* Accelerometer I2C SDA PTD9 I2C0_SDA
* I2C SCL PTD8 I2C0_SCL
* IRQ PTD10 PTD10
* Touch Pad / Segment Electrode 0 (J3 Pin 3) PTB0 TSI0_CH0
* LCD TWRPI Socket Electrode 1 (J3 Pin 5) PTB1 TSI0_CH6
* Electrode 2 (J3 Pin 7) PTB2 TSI0_CH7
* Electrode 3 (J3 Pin 8) PTB3 TSI0_CH8
* Electrode 4 (J3 Pin 9) PTC0 TSI0_CH13
* Electrode 5 (J3 Pin 10) PTC1 TSI0_CH14
* Electrode 6 (J3 Pin 11) PTC2 TSI0_CH15
* Electrode 7 (J3 Pin 12) PTA4 TSI0_CH5
* Electrode 8 (J3 Pin 13) PTB16 TSI0_CH9
* Electrode 9 (J3 Pin 14) PTB17 TSI0_CH10
* Electrode 10 (J3 Pin 15) PTB18 TSI0_CH11
* Electrode 11 (J3 Pin 16) PTB19 TSI0_CH12
* TWRPI ID0 (J3 Pin 17) ? ADC1_DP1
* TWRPI ID1 (J3 Pin 18) ? ADC1_SE16
*/
#define GPIO_SD_CARDDETECT (GPIO_PULLUP | PIN_INT_BOTH | PIN_PORTE | PIN28)