NucleoF401RE Oled

Stm NucleoF401RE supports SSD1306 oled display on SPI bus.

boards/arm/stm32/nucleo-f4x1re/configs/f401-fb/defconfig

@@ -0,0 +1,64 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_LEDS is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_NSH_CMDPARMS is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_PS is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="nucleo-f4x1re"
+CONFIG_ARCH_BOARD_COMMON=y
+CONFIG_ARCH_BOARD_NUCLEO_F401RE=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_CHIP="stm32"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32F401RE=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LATE_INITIALIZE=y
+CONFIG_BOARD_LOOPSPERMSEC=8499
+CONFIG_BUILTIN=y
+CONFIG_DRIVERS_VIDEO=y
+CONFIG_EXAMPLES_FB=y
+CONFIG_FB_MODULEINFO=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LCD=y
+CONFIG_LCD_DEV=y
+CONFIG_LCD_FRAMEBUFFER=y
+CONFIG_LCD_UG2864HSWEG01=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=98304
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SPI_CMDDATA=y
+CONFIG_SPI_DRIVER=y
+CONFIG_SSD1306_FREQUENCY=1000000
+CONFIG_START_DAY=5
+CONFIG_START_MONTH=5
+CONFIG_START_YEAR=2014
+CONFIG_STM32_I2C1=y
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_OTGFS=y
+CONFIG_STM32_PWR=y
+CONFIG_STM32_SPI1=y
+CONFIG_STM32_USART2=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART2_SERIAL_CONSOLE=y
+CONFIG_VIDEO_FB=y

boards/arm/stm32/nucleo-f4x1re/src/Make.defs

@@ -22,6 +22,12 @@ include $(TOPDIR)/Make.defs
 
 CSRCS = stm32_boot.c stm32_spi.c stm32_bringup.c
 
+ifeq ($(CONFIG_VIDEO_FB),y)
+ifeq ($(CONFIG_LCD_SSD1306),y)
+  CSRCS += stm32_lcd_ssd1306.c
+endif
+endif
+
 ifeq ($(CONFIG_ARCH_LEDS),y)
 CSRCS += stm32_autoleds.c
 else

boards/arm/stm32/nucleo-f4x1re/src/nucleo-f4x1re.h

@@ -97,6 +97,17 @@
 #define GPIO_SPI1_SCK_OFF  (GPIO_INPUT | GPIO_PULLDOWN | \
                             GPIO_PORTA | GPIO_PIN5)
 
+/* SSD1306 */
+
+#define GPIO_SSD1306_CS    (GPIO_OUTPUT|GPIO_OTYPER_PP(0)|GPIO_SPEED_2MHz|\
+                            GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN6)
+
+#define GPIO_SSD1306_CMD   (GPIO_OUTPUT|GPIO_OTYPER_PP(0)|GPIO_OSPEED_2MHz|\
+                            GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN7)
+
+#define GPIO_SSD1306_RST   (GPIO_OUTPUT|GPIO_OTYPER_PP(0)|GPIO_SPEED_2MHz|\
+                            GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN9)
+
 /* MCP2551 */
 
 #define GPIO_MCP2515_CS   (GPIO_OUTPUT|GPIO_OTYPER_PP(0)|GPIO_SPEED_2MHz|\

boards/arm/stm32/nucleo-f4x1re/src/stm32_bringup.c

@@ -107,6 +107,18 @@ int stm32_bringup(void)
       return -ENODEV;
     }
 
+#if defined(CONFIG_LCD_SSD1306_SPI) && !defined(CONFIG_VIDEO_FB)
+  board_lcd_initialize();
+#endif
+
+#ifdef CONFIG_VIDEO_FB
+  ret = fb_register(0, 0);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: fb_register() failed: %d\n", ret);
+    }
+#endif
+
 #ifdef CONFIG_CAN_MCP2515
 #ifdef CONFIG_STM32_SPI1
   stm32_configgpio(GPIO_MCP2515_CS);    /* MEMS chip select */

boards/arm/stm32/nucleo-f4x1re/src/stm32_lcd_ssd1306.c

@@ -0,0 +1,86 @@
+/****************************************************************************
+ * boards/arm/stm32/nucleo-f4x1re/src/stm32_lcd_ssd1306.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <nuttx/lcd/lcd.h>
+#include <nuttx/lcd/ssd1306.h>
+
+#include "stm32.h"
+#include "nucleo-f4x1re.h"
+
+#include "stm32_ssd1306.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define OLED_SPI_PORT         1 /* OLED display connected to SPI1 */
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_lcd_initialize
+ ****************************************************************************/
+
+int board_lcd_initialize(void)
+{
+  int ret;
+
+  ret = board_ssd1306_initialize(OLED_SPI_PORT);
+  if (ret < 0)
+    {
+      lcderr("ERROR: Failed to initialize SSD1306\n");
+      return ret;
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: board_lcd_getdev
+ ****************************************************************************/
+
+struct lcd_dev_s *board_lcd_getdev(int devno)
+{
+  return board_ssd1306_getdev();
+}
+
+/****************************************************************************
+ * Name: board_lcd_uninitialize
+ ****************************************************************************/
+
+void board_lcd_uninitialize(void)
+{
+  /* TO-FIX */
+}

boards/arm/stm32/nucleo-f4x1re/src/stm32_spi.c

@@ -79,6 +79,11 @@ void weak_function stm32_spidev_initialize(void)
       spierr("ERROR: FAILED to initialize SPI port 1\n");
     }
 
+#ifdef CONFIG_LCD_SSD1306_SPI
+  stm32_configgpio(GPIO_SSD1306_CS);    /* SSD1306 chip select */
+  stm32_configgpio(GPIO_SSD1306_CMD);   /* SSD1306 data/!command */
+#endif
+
 #ifdef CONFIG_CAN_MCP2515
   stm32_configgpio(GPIO_MCP2515_CS);    /* MCP2515 chip select */
 #endif
@@ -128,6 +133,13 @@ void stm32_spi1select(struct spi_dev_s *dev, uint32_t devid,
   spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" :
           "de-assert");
 
+#if defined(CONFIG_LCD_SSD1306_SPI)
+  if (devid == SPIDEV_DISPLAY(0))
+    {
+      stm32_gpiowrite(GPIO_SSD1306_CS, !selected);
+    }
+#endif
+
 #if defined(CONFIG_CAN_MCP2515)
   if (devid == SPIDEV_CANBUS(0))
     {
@@ -204,6 +216,13 @@ uint8_t stm32_spi3status(struct spi_dev_s *dev, uint32_t devid)
 #ifdef CONFIG_STM32_SPI1
 int stm32_spi1cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
+#if defined(CONFIG_LCD_SSD1306_SPI)
+  if (devid == SPIDEV_DISPLAY(0))
+    {
+      stm32_gpiowrite(GPIO_SSD1306_CMD, !cmd);
+    }
+#endif
+
   return OK;
 }
 #endif