Add z16f system exception handling logic.

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@564 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2008-01-25 17:49:43 +00:00
parent 30984a7eed
commit fb4253bfb2
14 changed files with 898 additions and 771 deletions

View File

@ -49,42 +49,40 @@
* Definitions
****************************************************************************/
/* Interrupt Vectors */
/* Interrupt Vectors (excluding reset and sysexec which are handled differently) */
#define Z16F_IRQ_SYSEXC ( 0) /* Vector: 0x08 System Exceptions */
#define Z16F_IRQ_IRQ0 ( 0) /* First of 8 IRQs controlled by IRQ0 registers */
#define Z16F_IRQ_ADC ( 0) /* Vector: 0x2C IRQ0.0 ADC */
#define Z16F_IRQ_SPI ( 1) /* Vector: 0x28 IRQ0.1 SPI */
#define Z16F_IRQ_I2C ( 2) /* Vector: 0x24 IRQ0.2 I2C */
#define Z16F_IRQ_UART0TX ( 3) /* Vector: 0x20 IRQ0.3 UART0 TX */
#define Z16F_IRQ_UART0RX ( 4) /* Vector: 0x1C IRQ0.4 UART0 RX */
#define Z16F_IRQ_TIMER0 ( 5) /* Vector: 0x18 IRQ0.5 Timer 0 */
#define Z16F_IRQ_TIMER1 ( 6) /* Vector: 0x14 IRQ0.6 Timer 1 */
#define Z16F_IRQ_TIMER2 ( 7) /* Vector: 0x10 IRQ0.7 Timer 2 */
#define Z16F_IRQ_IRQ0 ( 1) /* First of 8 IRQs controlled by IRQ0 registers */
#define Z16F_IRQ_ADC ( 1) /* Vector: 0x2C IRQ0.0 ADC */
#define Z16F_IRQ_SPI ( 2) /* Vector: 0x28 IRQ0.1 SPI */
#define Z16F_IRQ_I2C ( 3) /* Vector: 0x24 IRQ0.2 I2C */
#define Z16F_IRQ_UART0TX ( 4) /* Vector: 0x20 IRQ0.3 UART0 TX */
#define Z16F_IRQ_UART0RX ( 5) /* Vector: 0x1C IRQ0.4 UART0 RX */
#define Z16F_IRQ_TIMER0 ( 6) /* Vector: 0x18 IRQ0.5 Timer 0 */
#define Z16F_IRQ_TIMER1 ( 7) /* Vector: 0x14 IRQ0.6 Timer 1 */
#define Z16F_IRQ_TIMER2 ( 8) /* Vector: 0x10 IRQ0.7 Timer 2 */
#define Z16F_IRQ_IRQ1 ( 8) /* First of 8 IRQs controlled by IRQ1 registers */
#define Z16F_IRQ_P0AD ( 8) /* Vector: 0x4C IRQ1.0 Port A/D0, rising/falling edge */
#define Z16F_IRQ_P1AD ( 9) /* Vector: 0x48 IRQ1.1 Port A/D1, rising/falling edge */
#define Z16F_IRQ_P2AD (10) /* Vector: 0x44 IRQ1.2 Port A/D2, rising/falling edge */
#define Z16F_IRQ_P3AD (11) /* Vector: 0x40 IRQ1.3 Port A/D3, rising/falling edge */
#define Z16F_IRQ_P4AD (12) /* Vector: 0x3C IRQ1.4 Port A/D4, rising/falling edge */
#define Z16F_IRQ_P5AD (13) /* Vector: 0x38 IRQ1.5 Port A/D5, rising/falling edge */
#define Z16F_IRQ_P6AD (14) /* Vector: 0x34 IRQ1.6 Port A/D6, rising/falling edge */
#define Z16F_IRQ_P7AD (15) /* Vector: 0x30 IRQ1.7 Port A/D7, rising/falling edge */
#define Z16F_IRQ_IRQ1 ( 9) /* First of 8 IRQs controlled by IRQ1 registers */
#define Z16F_IRQ_P0AD ( 9) /* Vector: 0x4C IRQ1.0 Port A/D0, rising/falling edge */
#define Z16F_IRQ_P1AD (10) /* Vector: 0x48 IRQ1.1 Port A/D1, rising/falling edge */
#define Z16F_IRQ_P2AD (11) /* Vector: 0x44 IRQ1.2 Port A/D2, rising/falling edge */
#define Z16F_IRQ_P3AD (12) /* Vector: 0x40 IRQ1.3 Port A/D3, rising/falling edge */
#define Z16F_IRQ_P4AD (13) /* Vector: 0x3C IRQ1.4 Port A/D4, rising/falling edge */
#define Z16F_IRQ_P5AD (14) /* Vector: 0x38 IRQ1.5 Port A/D5, rising/falling edge */
#define Z16F_IRQ_P6AD (15) /* Vector: 0x34 IRQ1.6 Port A/D6, rising/falling edge */
#define Z16F_IRQ_P7AD (16) /* Vector: 0x30 IRQ1.7 Port A/D7, rising/falling edge */
#define Z16F_IRQ_IRQ2 (17) /* First of 8 IRQs controlled by IRQ2 registers */
#define Z16F_IRQ_C0 (17) /* Vector: IRQ2.0 0x6C Port C0, both edges DMA0 */
#define Z16F_IRQ_C1 (18) /* Vector: IRQ2.1 0x68 Port C1, both edges DMA1 */
#define Z16F_IRQ_C2 (19) /* Vector: IRQ2.2 0x64 Port C2, both edges DMA2 */
#define Z16F_IRQ_C3 (20) /* Vector: IRQ2.3 0x60 Port C3, both edges DMA3 */
#define Z16F_IRQ_PWMFAULT (21) /* Vector: IRQ2.4 0x5C PWM Fault */
#define Z16F_IRQ_UART1TX (22) /* Vector: IRQ2.5 0x58 UART1 TX */
#define Z16F_IRQ_UART1RX (23) /* Vector: IRQ2.6 0x54 UART1 RX */
#define Z16F_IRQ_PWMTIMER (24) /* Vector: IRQ2.7 0x50 PWM Timer */
#define Z16F_IRQ_IRQ2 (16) /* First of 8 IRQs controlled by IRQ2 registers */
#define Z16F_IRQ_C0 (16) /* Vector: IRQ2.0 0x6C Port C0, both edges DMA0 */
#define Z16F_IRQ_C1 (17) /* Vector: IRQ2.1 0x68 Port C1, both edges DMA1 */
#define Z16F_IRQ_C2 (18) /* Vector: IRQ2.2 0x64 Port C2, both edges DMA2 */
#define Z16F_IRQ_C3 (19) /* Vector: IRQ2.3 0x60 Port C3, both edges DMA3 */
#define Z16F_IRQ_PWMFAULT (20) /* Vector: IRQ2.4 0x5C PWM Fault */
#define Z16F_IRQ_UART1TX (21) /* Vector: IRQ2.5 0x58 UART1 TX */
#define Z16F_IRQ_UART1RX (22) /* Vector: IRQ2.6 0x54 UART1 RX */
#define Z16F_IRQ_PWMTIMER (23) /* Vector: IRQ2.7 0x50 PWM Timer */
#define Z16F_IRQ_SYSTIMER Z16F_IRQ_TIMER0
#define NR_IRQS (25)
#define NR_IRQS (24)
/* These macros will map an IRQ to a register bit position */

View File

@ -43,6 +43,7 @@
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/mm.h>
#include <arch/board/board.h>
#include "chip/chip.h"
#include "up_internal.h"

View File

@ -46,6 +46,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "chip/chip.h"
#include "os_internal.h"

View File

@ -45,6 +45,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "chip/chip.h"
#include "up_internal.h"

View File

@ -40,9 +40,11 @@
#include <nuttx/config.h>
#include <sys/types.h>
#include <assert.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <assert.h>
#include <arch/board/board.h>
#include "chip/chip.h"
#include "os_internal.h"
@ -79,7 +81,7 @@
FAR chipreg_t *up_doirq(int irq, FAR chipreg_t *regs)
{
chipreg_t *ret = regs;
FAR chipreg_t *ret = regs;
up_ledon(LED_INIRQ);
#ifdef CONFIG_SUPPRESS_INTERRUPTS

View File

@ -45,6 +45,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "os_internal.h"
#include "up_internal.h"

View File

@ -44,5 +44,5 @@ CMN_CSRCS = up_allocateheap.c up_initialize.c up_schedulesigaction.c \
up_exit.c up_releasestack.c up_idle.c up_reprioritizertr.c
CHIP_SSRCS = z16f_lowuart.S z16f_saveusercontext.S z16f_restoreusercontext.S
CHIP_CSRCS = z16f_clkinit.c z16f_irq.c z16f_timerisr.c z16f_serial.c
CHIP_CSRCS = z16f_clkinit.c z16f_sysexec.c z16f_irq.c z16f_timerisr.c z16f_serial.c

View File

@ -42,6 +42,7 @@
************************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
/************************************************************************************
* Definitions
@ -199,6 +200,28 @@
#define Z16F_IRQ2_ENH _HX32(ffffe03a) /* 8-bit: IRQ2 Enable High Bit */
#define Z16F_IRQ2_ENL _HX32(ffffe03c) /* 8-bit: IRQ2 Enable Low Bit */
/* System exception status register bit definitions *********************************/
#define Z16F_SYSEXCPH_SPOVF _HX8(80) /* Bit 7: Stack pointer overflow */
#define Z16F_SYSEXCPH_PCOVF _HX8(40) /* Bit 6: Program counter overflow */
#define Z16F_SYSEXCPH_DIV0 _HX8(20) /* Bit 5: Divide by zero */
#define Z16F_SYSEXCPH_DIVOVF _HX8(10) /* Bit 4: Divide overflow */
#define Z16F_SYSEXCPH_ILL _HX8(08) /* Bit 3: Illegal instruction */
/* Bits 0-2: Reserved */
/* Bits 3-7: Reserved */
#define Z16F_SYSEXCPL_WDTOSC _HX8(04) /* Bit 2: WDT oscillator failure */
#define Z16F_SYSEXCPL_PRIOSC _HX8(02) /* Bit 1: Primary oscillator failure */
#define Z16F_SYSEXCPL_WDT _HX8(01) /* Bit 0: Watchdog timer interrupt */
#define Z16F_SYSEXCP_SPOVF (Z16F_SYSEXCPH_SPOVF << 8)
#define Z16F_SYSEXCP_PCOVF (Z16F_SYSEXCPH_PCOVF << 8)
#define Z16F_SYSEXCP_DIV0 (Z16F_SYSEXCPH_DIV0 << 8)
#define Z16F_SYSEXCP_DIVOVF (Z16F_SYSEXCPH_DIVOVF << 8)
#define Z16F_SYSEXCP_ILL (Z16F_SYSEXCPH_ILL << 8)
#define Z16F_SYSEXCP_WDTOSC Z16F_SYSEXCPL_WDTOSC
#define Z16F_SYSEXCP_PRIOSC Z16F_SYSEXCPL_PRIOSC
#define Z16F_SYSEXCP_WDT Z16F_SYSEXCPL_WDT
/* Oscillator control registers *****************************************************/
#define Z16F_OSC_CTL _HX32(ffffe0A0) /* 8-bit: Oscillator Control */
@ -519,11 +542,19 @@ extern "C" {
* debugging support for up_lowputc (or getc) is enabled.
*/
extern void z16f_lowinit(void);
EXTERN void z16f_lowinit(void);
#if defined(CONFIG_ARCH_LOWPUTC) || defined(CONFIG_ARCH_LOWGETC)
extern void z16f_lowuartinit(void);
EXTERN void z16f_lowuartinit(void);
#endif
/* This function handles Z16F system execeptions */
EXTERN void z16f_sysexec(FAR chipreg_t *regs);
/* Entry point to reset the processor */
EXTERN void z16f_reset(void);
#undef EXTERN
#ifdef __cplusplus
}

View File

@ -54,33 +54,8 @@
#endif
xref _os_start:EROM
xref _up_doirq:EROM
xdef _reset
xdef _sysexc_isr
xdef _timer2_isr
xdef _timer1_isr
xdef _timer0_isr
xdef _uart0rx_isr
xdef _uart0tx_isr
xdef _i2c_isr
xdef _spi_isr
xdef _adc_isr
xdef _p7ad_isr
xdef _p6ad_isr
xdef _p5ad_isr
xdef _p4ad_isr
xdef _p3ad_isr
xdef _p2ad_isr
xdef _p1ad_isr
xdef _p0ad_isr
xdef _pwmtimer_isr
xdef _uart1rx_isr
xdef _uart1tx_isr
xdef _pwmfault_isr
xdef _c3_isr
xdef _c2_isr
xdef _c1_isr
xdef _c0_isr
xdef _common_isr
xref _z16f_sysexec:EROM
xdef _z16f_reset
xref _low_nearbss:RAM
xref _len_nearbss
@ -111,7 +86,7 @@
* vectors
**************************************************************************/
vector RESET=_reset
vector RESET=_z16f_reset
vector SYSEXC=_sysexc_isr
vector TIMER2=_timer2_isr
vector TIMER1=_timer1_isr
@ -154,14 +129,14 @@
segment CODESEG
/**************************************************************************
* Name: _reset
* Name: _z16f_reset
*
* Description:
* Reset entry point
*
**************************************************************************/
_reset:
_z16f_reset:
/* Initialize the init/idle task stack */
ld sp, #(_near_stack+1) /* Set Stack Pointer to the top of internal RAM */
@ -170,7 +145,7 @@ _reset:
/* Initialize onboard LEDs */
#ifdef CONFIG_ARCH_LEDS
bl _up_ledinit
call _up_ledinit
#endif
/* Perform VERY early UART initialization so that we can use it here */
@ -187,41 +162,41 @@ _reset:
lea r0, _low_nearbss
ld r1, #_len_nearbss+1
jp _reset2
_reset1:
jp _z16f_reset2
_z16f_reset1:
ld.b (r0++), #0
_reset2:
djnz r1, _reset1
_z16f_reset2:
djnz r1, _z16f_reset1
lea r0, _low_farbss
ld r1, #_len_farbss+1
jp _reset4
_reset3:
jp _z16f_reset4
_z16f_reset3:
ld.b (r0++), #0
_reset4:
djnz r1, _reset3
_z16f_reset4:
djnz r1, _z16f_reset3
/* Copy ROM data into RAM */
lea r0, _low_near_romdata
lea r1, _low_neardata
ld r2, #_len_neardata+1
jp _reset6
_reset5:
jp _z16f_reset6
_z16f_reset5:
ld.b r3, (r0++)
ld.b (r1++), r3
_reset6:
djnz r2, _reset5
_z16f_reset6:
djnz r2, _z16f_reset5
lea r0, _low_far_romdata
lea r1, _low_fardata
ld r2, #_len_fardata+1
jp _reset8
_reset7:
jp _z16f_reset8
_z16f_reset7:
ld.b r3, (r0++)
ld.b (r1++), r3
_reset8:
djnz r2, _reset7
_z16f_reset8:
djnz r2, _z16f_reset7
/* Perform low-level hardware initialization */
@ -230,9 +205,52 @@ _reset8:
/* Start NuttX */
call _os_start /* Start the operating system */
_halted: /* _os_start() should not return */
_halt1: /* _os_start() should not return */
halt
jp _halted
jp _halt1
/**************************************************************************
* Name: _sysexec_isr
*
* Description:
* System exception interrupt handler. On entry, the stack looks like
* this:
*
* TOS[0] = PC[31:24]
* TOS[1] = PC[23:16]
* TOS[2] = PC[15:8]
* TOS[3] = PC[7:0]
* TOS[4] = 0
* TOS[5] = flags
*
**************************************************************************/
_sysexc_isr:
pushmlo <r0-r7> /* Save r0-r7 on the stack */
/* Calculate the value of the SP BEFORE the interrupt occurred and
* push that as the saved value of r15=sp
*/
ld r1, #-6 /* return(4) + flags(1) + padding(1) */
add r1, sp /* r1 = Value of the SP before the interrupt */
push r1 /* Push r1 in the spot for the saved SP */
/* Save all of the remaining registers */
pushmhi <r8-r14>
/* SP now holds the address of the beginning of the save structure
* on the stack. Now handle the system exception with arg1(r1)=address
* of the register save structure.
*/
ld r1, sp
call _z16f_sysexec /* Handle in C logic */
_halt2: /* _z16f_sysexec() should not return */
halt
jp _halt2
/**************************************************************************
* Name: Interrupt handlers
@ -250,11 +268,6 @@ _halted: /* _os_start() should not return */
*
**************************************************************************/
_sysexc_isr:
pushmlo <r0-r7> /* Save r0-r7 on the stack */
ld r1, #Z16F_IRQ_SYSEXC /* r1 = SYSEXEC IRQ number */
jp _common_isr /* Join common interrupt handling logic */
_timer2_isr:
pushmlo <r0-r7> /* Save r0-r7 on the stack */
ld r1, #Z16F_IRQ_TIMER0 /* r1 = Timer 2 IRQ number */

View File

@ -50,7 +50,6 @@
xdef _z16f_lowuartinit
xref _SYS_CLK_FREQ:EROM
#ifdef CONFIG_ARCH_LOWPUTC
xdef _z16f_xmitc
xdef _up_lowputc
#endif
#ifdef CONFIG_ARCH_LOWGETC

View File

@ -0,0 +1,126 @@
/***************************************************************************
* z16f/z16f_sysexec.c
*
* Copyright (C) 2008 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
***************************************************************************/
/***************************************************************************
* Included Files
***************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include <nuttx/arch.h>
#include "chip/chip.h"
#include "os_internal.h"
#include "up_internal.h"
/***************************************************************************
* Definitions
***************************************************************************/
#ifdef CONFIG_ARCH_LOWPUTC
# define SYSDBG lib_lowprintf
#else
# define SYSDBG lib_rawprintf
#endif
/***************************************************************************
* Private Types
***************************************************************************/
/***************************************************************************
* Private Functions
***************************************************************************/
/***************************************************************************
* Global Functions
***************************************************************************/
/***************************************************************************
* Function: z16f_sysexec
*
* Description:
* Handle a Z16F system execption
*
***************************************************************************/
void z16f_sysexec(FAR chipreg_t *regs)
{
int errcode = OSERR_ERREXCEPTION;
uint16 excp;
/* The cause of the the system exception is indicated in the SYSEXCPH&L
* registers
*/
excp = getreg16(Z16F_SYSEXCP);
if ((excp & Z16F_SYSEXCP_SPOVF) != 0)
{
SYSDBG("SP OVERFLOW\n");
}
if ((excp & Z16F_SYSEXCP_PCOVF) != 0)
{
SYSDBG("PC OVERFLOW\n");
}
if ((excp & Z16F_SYSEXCP_DIV0) != 0)
{
SYSDBG("Divide by zero\n");
}
if ((excp & Z16F_SYSEXCP_DIVOVF) != 0)
{
SYSDBG("Divide overflow\n");
}
if ((excp & Z16F_SYSEXCP_ILL) != 0)
{
SYSDBG("Illegal instruction\n");
errcode = OSERR_UNDEFINEDINSN;
}
if ((excp & Z16F_SYSEXCP_WDTOSC) != 0)
{
SYSDBG("WDT oscillator failure\n");
}
if ((excp & Z16F_SYSEXCP_PRIOSC) != 0)
{
SYSDBG("Primary Oscillator Failure\n");
}
if ((excp & Z16F_SYSEXCP_WDT) != 0)
{
SYSDBG("Watchdog timeout\n");
z16f_reset();
}
PANIC(errcode);
}

View File

@ -57,10 +57,11 @@
#define LED_STARTED 0
#define LED_HEAPALLOCATE 1
#define LED_IRQSENABLED 2
#define LED_IDLE 3
#define LED_INIRQ 4
#define LED_ASSERTION 5
#define LED_PANIC 6
#define LED_STACKCREATED 3
#define LED_IDLE 4
#define LED_INIRQ 5
#define LED_ASSERTION 6
#define LED_PANIC 7
/****************************************************************************
* Public Functions

View File

@ -47,7 +47,9 @@
# CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence,
# the board that supports the particular chip or SoC.
# CONFIG_ARCH_BOARD_name - for use in C code
# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
# CONFIG_DRAM_SIZE - Describes the installed DRAM.
# CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to z16f.
#
CONFIG_ARCH=z16
CONFIG_ARCH_Z16=y
@ -59,8 +61,9 @@ CONFIG_ARCH_CHIP_Z16F3211=n
CONFIG_ARCH_CHIP_Z16F6411=n
CONFIG_ARCH_BOARD=z16f2800100zcog
CONFIG_ARCH_BOARD_Z16F2800100ZCOG=y
CONFIG_BOARD_LOOPSPERMSEC=1250
CONFIG_DRAM_SIZE=65536
CONFIG_ARCH_LEDS=y
#
# Z16F specific device driver settings
#

View File

@ -47,6 +47,7 @@
#include <nuttx/config.h>
#include <sys/types.h>
#include <arch/board/board.h>
#include "up_internal.h"
/****************************************************************************
@ -84,38 +85,10 @@ void up_ledinit(void)
void up_ledon(int led)
{
ubyte paout = getreg8(Z16F_GPIOA_OUT) & 0xf8;
switch (led)
if ((unsigned)led <= 7)
{
case LED_STARTED:
break;
case LED_HEAPALLOCATE:
paout |= 1;
break;
case LED_IRQSENABLED:
paout |= 2;
break;
case LED_IDLE:
paout |= 3;
break;
case LED_INIRQ:
paout |= 4;
break;
case LED_ASSERTION :
paout |= 5;
break;
case LED_PANIC:
default:
paout |= 6;
break;
putreg8(((getreg8(Z16F_GPIOA_OUT) & 0xf8) | led), Z16F_GPIOA_OUT);
}
putreg8(paout, Z16F_GPIOA_OUT);
}
/****************************************************************************
@ -124,32 +97,9 @@ void up_ledon(int led)
void up_ledoff(int led)
{
switch (led)
if (led >= 1)
{
case LED_STARTED:
break;
case LED_HEAPALLOCATE:
up_ledoff(LED_STARTED);
break;
case LED_IRQSENABLED:
up_ledoff(LED_IRQSENABLED);
break;
case LED_IDLE:
up_ledoff(LED_IRQSENABLED);
break;
case LED_INIRQ:
case LED_ASSERTION :
up_ledoff(LED_IDLE);
break;
case LED_PANIC:
default:
up_ledoff(LED_ASSERTION);
break;
up_ledon(led-1);
}
}
#endif /* CONFIG_ARCH_LEDS */