From fb68a4b777fe60c57a2e9987c54ef2a91a35f825 Mon Sep 17 00:00:00 2001 From: Abdelatif Guettouche Date: Fri, 19 Feb 2021 11:55:39 +0100 Subject: [PATCH] esp32c3: Add system reset. Signed-off-by: Abdelatif Guettouche --- arch/risc-v/Kconfig | 1 + arch/risc-v/src/esp32c3/Make.defs | 1 + arch/risc-v/src/esp32c3/esp32c3_resetcause.c | 60 ++++++++++++++++++ arch/risc-v/src/esp32c3/esp32c3_resetcause.h | 54 ++++++++++++++++ arch/risc-v/src/esp32c3/esp32c3_systemreset.c | 54 ++++++++++++++++ .../esp32c3/esp32c3-devkit/src/Makefile | 4 ++ .../esp32c3-devkit/src/esp32c3_reset.c | 63 +++++++++++++++++++ 7 files changed, 237 insertions(+) create mode 100644 arch/risc-v/src/esp32c3/esp32c3_resetcause.c create mode 100644 arch/risc-v/src/esp32c3/esp32c3_resetcause.h create mode 100644 arch/risc-v/src/esp32c3/esp32c3_systemreset.c create mode 100644 boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_reset.c diff --git a/arch/risc-v/Kconfig b/arch/risc-v/Kconfig index 86218ff88c..1eecc6d55e 100644 --- a/arch/risc-v/Kconfig +++ b/arch/risc-v/Kconfig @@ -57,6 +57,7 @@ config ARCH_CHIP_ESP32C3 select ARCH_RV32IM select RV32IM_HW_MULDIV select ARCH_VECNOTIRQ + select ARCH_HAVE_RESET ---help--- Espressif ESP32-C3 (RV32IMC). diff --git a/arch/risc-v/src/esp32c3/Make.defs b/arch/risc-v/src/esp32c3/Make.defs index 8bdbb95641..97777c21dc 100644 --- a/arch/risc-v/src/esp32c3/Make.defs +++ b/arch/risc-v/src/esp32c3/Make.defs @@ -53,6 +53,7 @@ CHIP_CSRCS = esp32c3_allocateheap.c esp32c3_start.c esp32c3_idle.c CHIP_CSRCS += esp32c3_irq.c esp32c3_timerisr.c CHIP_CSRCS += esp32c3_clockconfig.c esp32c3_gpio.c CHIP_CSRCS += esp32c3_lowputc.c +CHIP_CSRCS += esp32c3_systemreset.c esp32c3_resetcause.c ifeq ($(CONFIG_ESP32C3_UART),y) CHIP_CSRCS += esp32c3_serial.c diff --git a/arch/risc-v/src/esp32c3/esp32c3_resetcause.c b/arch/risc-v/src/esp32c3/esp32c3_resetcause.c new file mode 100644 index 0000000000..86b8ebe83d --- /dev/null +++ b/arch/risc-v/src/esp32c3/esp32c3_resetcause.c @@ -0,0 +1,60 @@ +/**************************************************************************** + * arch/risc-v/src/esp32c3/esp32c3_resetcause.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "hardware/esp32c3_rtccntl.h" + +#include "esp32c3.h" +#include "esp32c3_resetcause.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32c3_resetcause + * + * Description: + * Get the cause of the last reset. + * + ****************************************************************************/ + +enum esp32c3_resetcause_e esp32c3_resetcause(void) +{ + uint32_t regmask; + uint32_t regshift; + uint32_t regval; + + regval = getreg32(RTC_CNTL_RESET_STATE_REG); + regmask = RTC_CNTL_RESET_CAUSE_PROCPU_M; + regshift = RTC_CNTL_RESET_CAUSE_PROCPU_S; + + return (regval & regmask) >> regshift; +} diff --git a/arch/risc-v/src/esp32c3/esp32c3_resetcause.h b/arch/risc-v/src/esp32c3/esp32c3_resetcause.h new file mode 100644 index 0000000000..b67c68a4b6 --- /dev/null +++ b/arch/risc-v/src/esp32c3/esp32c3_resetcause.h @@ -0,0 +1,54 @@ +/**************************************************************************** + * arch/risc-v/src/esp32c3/esp32c3_resetcause.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +enum esp32c3_resetcause_e +{ + ESP32C3_RESETCAUSE_SYS_CHIPPOR = 0x01, + ESP32C3_RESETCAUSE_SYS_RWDTSR = 0x10, + ESP32C3_RESETCAUSE_SYS_BOR = 0x0f, + ESP32C3_RESETCAUSE_CORE_SOFT = 0x03, + ESP32C3_RESETCAUSE_CORE_DPSP = 0x05, + ESP32C3_RESETCAUSE_CORE_MWDT0 = 0x07, + ESP32C3_RESETCAUSE_CORE_MWDT1 = 0x08, + ESP32C3_RESETCAUSE_CORE_RWDT = 0x09, + ESP32C3_RESETCAUSE_CPU_MWDT0 = 0x0b, + ESP32C3_RESETCAUSE_CPU_SOFT = 0x0c, + ESP32C3_RESETCAUSE_CPU_RWDT = 0x0d, + ESP32C3_RESETCAUSE_CPU_PROCPU = 0x0e +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32c3_resetcause + * + * Description: + * Get the cause of the last reset. + * + ****************************************************************************/ + +enum esp32c3_resetcause_e esp32c3_resetcause(void); + diff --git a/arch/risc-v/src/esp32c3/esp32c3_systemreset.c b/arch/risc-v/src/esp32c3/esp32c3_systemreset.c new file mode 100644 index 0000000000..406031ce0e --- /dev/null +++ b/arch/risc-v/src/esp32c3/esp32c3_systemreset.c @@ -0,0 +1,54 @@ +/**************************************************************************** + * arch/risc-v/src/esp32c3/esp32c3_systemreset.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +#include "hardware/esp32c3_rtccntl.h" +#include "esp32c3.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_systemreset + * + * Description: + * Internal reset logic. + * + ****************************************************************************/ + +void up_systemreset(void) +{ + putreg32(RTC_CNTL_SW_SYS_RST, RTC_CNTL_OPTIONS0_REG); + + /* Wait for the reset */ + + for (; ; ); +} diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile b/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile index 74633f6342..ffb60d2a2c 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile @@ -28,6 +28,10 @@ CSRCS = esp32c3_boot.c esp32c3_bringup.c ifeq ($(CONFIG_LIB_BOARDCTL),y) CSRCS += esp32c3_appinit.c +ifeq ($(CONFIG_BOARDCTL_RESET),y) +CSRCS += esp32c3_reset.c +endif + endif ifeq ($(CONFIG_DEV_GPIO),y) diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_reset.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_reset.c new file mode 100644 index 0000000000..5eb0045138 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_reset.c @@ -0,0 +1,63 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_reset.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#ifdef CONFIG_BOARDCTL_RESET + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_reset + * + * Description: + * Reset board. Support for this function is required by board-level + * logic if CONFIG_BOARDCTL_RESET is selected. + * + * Input Parameters: + * status - Status information provided with the reset event. This + * meaning of this status information is board-specific. If not + * used by a board, the value zero may be provided in calls to + * board_reset(). + * + * Returned Value: + * If this function returns, then it was not possible to power-off the + * board due to some constraints. The return value in this case is a + * board-specific reason for the failure to shutdown. + * + ****************************************************************************/ + +int board_reset(int status) +{ + up_systemreset(); + + return 0; +} + +#endif /* CONFIG_BOARDCTL_RESET */