Fix range check
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@696 42af7a65-404d-4744-a932-0658087f49c3
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@ -161,11 +161,11 @@ void up_disable_irq(int irq)
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* register is assumed to be zero, resulting interrupt disabled.
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* register is assumed to be zero, resulting interrupt disabled.
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*/
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*/
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if (irq < Z8_IRQ0_MAX)
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if (irq <= Z8_IRQ0_MAX)
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{
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{
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putreg8((getreg8(IRQ0ENH) & ~Z8_IRQ0_BIT(irq)), IRQ0ENH);
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putreg8((getreg8(IRQ0ENH) & ~Z8_IRQ0_BIT(irq)), IRQ0ENH);
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}
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}
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else if (irq < Z8_IRQ1_MAX)
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else if (irq <= Z8_IRQ1_MAX)
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{
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{
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putreg8((getreg8(IRQ1ENH) & ~Z8_IRQ1_BIT(irq)), IRQ1ENH);
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putreg8((getreg8(IRQ1ENH) & ~Z8_IRQ1_BIT(irq)), IRQ1ENH);
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}
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}
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@ -196,11 +196,11 @@ void up_enable_irq(int irq)
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* priority.
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* priority.
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*/
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*/
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if (irq < Z8_IRQ0_MAX)
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if (irq <= Z8_IRQ0_MAX)
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{
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{
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putreg8((getreg8(IRQ0ENH) | Z8_IRQ0_BIT(irq)), IRQ0ENH);
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putreg8((getreg8(IRQ0ENH) | Z8_IRQ0_BIT(irq)), IRQ0ENH);
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}
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}
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else if (irq < Z8_IRQ1_MAX)
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else if (irq <= Z8_IRQ1_MAX)
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{
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{
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putreg8((getreg8(IRQ1ENH) | Z8_IRQ1_BIT(irq)), IRQ1ENH);
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putreg8((getreg8(IRQ1ENH) | Z8_IRQ1_BIT(irq)), IRQ1ENH);
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}
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}
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@ -230,12 +230,12 @@ void up_maskack_irq(int irq)
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* corresponding bit in the IRQ status register.
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* corresponding bit in the IRQ status register.
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*/
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*/
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if (irq < Z8_IRQ0_MAX)
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if (irq <= Z8_IRQ0_MAX)
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{
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{
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putreg8((getreg8(IRQ0ENH) & ~Z8_IRQ0_BIT(irq)), IRQ0ENH);
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putreg8((getreg8(IRQ0ENH) & ~Z8_IRQ0_BIT(irq)), IRQ0ENH);
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putreg8(Z8_IRQ0_BIT(irq), IRQ0);
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putreg8(Z8_IRQ0_BIT(irq), IRQ0);
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}
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}
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else if (irq < Z8_IRQ1_MAX)
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else if (irq <= Z8_IRQ1_MAX)
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{
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{
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putreg8((getreg8(IRQ1ENH) & ~Z8_IRQ1_BIT(irq)), IRQ1ENH);
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putreg8((getreg8(IRQ1ENH) & ~Z8_IRQ1_BIT(irq)), IRQ1ENH);
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putreg8(Z8_IRQ1_BIT(irq), IRQ2);
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putreg8(Z8_IRQ1_BIT(irq), IRQ2);
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