Add PIC32 exception handlers

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3630 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-05-20 00:21:26 +00:00
parent fa4f467e62
commit fc593d0aca
7 changed files with 276 additions and 67 deletions

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@ -160,7 +160,6 @@ extern uint32_t _bmxdupba_address; /* BMX register setting */
extern void up_boot(void);
extern void up_copystate(uint32_t *dest, uint32_t *src);
extern void up_decodeirq(uint32_t *regs);
extern void up_irqinitialize(void);
#ifdef CONFIG_ARCH_DMA
extern void weak_function up_dmainitialize(void);
@ -171,6 +170,9 @@ extern void up_lowputc(char ch);
extern void up_puts(const char *str);
extern void up_lowputs(const char *str);
/* Two alternative interrupt handling functions */
extern uint32_t *up_decodeirq(uint32_t *regs);
extern uint32_t *up_doirq(int irq, uint32_t *regs);
/* Defined in up_dumpstate.c */

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@ -0,0 +1,103 @@
/****************************************************************************
* arch/mips/src/mips32/up_bevexcptn.S
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/mips32/registers.h>
#include "chip/excptmacros.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Global Symbols
****************************************************************************/
.file "up_bevexcptn.S"
.global up_dobev
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: _bev_exception
*
* Description:
* Boot Exception Vector Handler. Jumps to bev_handler
*
* Input Parameters:
* None
*
* Returned Value:
* Does not return
*
****************************************************************************/
.section .bev_excpt,"ax",@progbits
.set noreorder
.ent _bev_exception
_bev_exception:
la k0, _bev_handler
jr k0
nop
.end _bev_exception
/****************************************************************************
* Name: _bev_handler
*
* Description:
* BEV exception handler
*
****************************************************************************/
.section .bev_handler, "ax", @progbits
.set noreorder
.ent _bev_handler
_bev_handler:
EXCPT_PROLOGUE t0 /* Save registers on stack, enable nested interrupts */
move a0, sp /* Pass register save structure as the parameter 1 */
USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
la t0, up_dobev /* Call up_dobev(regs) */
jalr t0, ra
di /* Disable interrupts */
RESTORE_STACK t0, t1 /* Undo the operations of USE_STACK */
EXCPT_EPILOGUE v0 /* Return to the context returned by up_dobev() */
.end _bev_handler

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@ -0,0 +1,104 @@
/****************************************************************************
* arch/mips/src/mips32/up_genexcptn.S
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/mips32/registers.h>
#include "chip/excptmacros.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Global Symbols
****************************************************************************/
.file "up_genexcptn.S"
.global _int_handler
.global up_decodeirq
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: _int_exception
*
* Description:
* Interrupt Exception Vector Handler. Jumps to _int_handler
*
* Input Parameters:
* None
*
* Returned Value:
* Does not return
*
****************************************************************************/
.section .int_excpt,"ax",@progbits
.set noreorder
.ent _int_exception
_int_exception:
la k0, _int_handler
jr k0
nop
.end _int_exception
/****************************************************************************
* Name: _int_handler
*
* Description:
* Interrupt exception handler
*
****************************************************************************/
.section .int_handler, "ax", @progbits
.set noreorder
.ent _int_handler
_int_handler:
EXCPT_PROLOGUE t0 /* Save registers on stack, enable nested interrupts */
move a0, sp /* Pass register save structure as the parameter 1 */
USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
la t0, up_decodeirq /* Call up_decodeirq(regs) */
jalr t0, ra
di /* Disable interrupts */
RESTORE_STACK t0, t1 /* Undo the operations of USE_STACK */
EXCPT_EPILOGUE v0 /* Return to the context returned by up_decodeirq() */
.end _int_handler

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@ -39,7 +39,7 @@ HEAD_ASRC = pic32mx-head.S
# Common MIPS files
CMN_ASRCS = up_syscall0.S
CMN_ASRCS = up_syscall0.S up_inthandler.S up_bevhandler.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c \
up_initialstate.c up_interruptcontext.c up_irq.c up_lowputs.c \

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@ -1,5 +1,5 @@
/********************************************************************************************
* arch/mips/src/mips32/mips32-excptmacros.h
* arch/mips/src/pic32mx/excptmacros.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@ -33,8 +33,8 @@
*
********************************************************************************************/
#ifndef __ARCH_MIPS_SRC_MIPS32_MIPS32_EXCPTMACROS_H
#define __ARCH_MIPS_SRC_MIPS32_MIPS32_EXCPTMACROS_H
#ifndef __ARCH_MIPS_SRC_PIC32MX_EXCPTMACROS_H
#define __ARCH_MIPS_SRC_PIC32MX_EXCPTMACROS_H
/********************************************************************************************
* Included Files
@ -43,7 +43,7 @@
#include <nuttx/config.h>
#include <arch/irq.h>
#include <arch/mips32/cp0.h>
#include <arch/pic32mx/cp0.h>
#ifdef __ASSEMBLY__
@ -70,7 +70,7 @@
* my_exception:
* EXCPT_PROLOGUE t0 - Save registers on stack, enable nested interrupts
* move a0, sp - Pass register save structure as the parameter 1
* USE_INTSTACK, t0, t1, t2 - Switch to the interrupt stack
* USE_INTSTACK t0, t1, t2 - Switch to the interrupt stack
* jal handler - Handle the exception IN=old regs OUT=new regs
* di - Disable interrupts
* RESTORE_STACK t0, t1 - Undo the operations of USE_STACK
@ -101,6 +101,7 @@
********************************************************************************************/
.macro EXCPT_PROLOGUE, tmp
.set noat
/* Get the SP from the previous shadow set */
@ -243,7 +244,8 @@
*
********************************************************************************************/
.macro EXCPT_EXIT, regs
.macro EXCPT_EPILOGUE, regs
.set noat
/* Since interrupts are disabled via di can now use k0 and k1 again. Use k1 as the
* pointer to the register save array.
@ -407,4 +409,4 @@
.endm
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_MIPS_SRC_MIPS32_MIPS32_EXCPTMACROS_H */
#endif /* __ARCH_MIPS_SRC_PIC32MX_EXCPTMACROS_H */

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@ -78,7 +78,9 @@
.global __start
.global halt
.global __nmi_handler
.global nmi_handler
.global bev_handler
.global int_handler
.global os_start
/****************************************************************************
@ -321,52 +323,6 @@ __start:
nop
.end __start
/****************************************************************************
* Name: _bev_exception
*
* Description:
* Boot Exception Vector Handler. Jumps to _bootstrap_exception_handler
*
* Input Parameters:
* None
*
* Returned Value:
* Does not return
*
****************************************************************************/
.section .bev_handler,"ax",@progbits
.set noreorder
.ent _bev_exception
_bev_exception:
la k0, _bootstrap_exception_handler
jr k0
nop
.end _bev_exception
/****************************************************************************
* Name: _bev_exception
*
* Description:
* General Exception Vector Handler. Jumps to _general_exception_handler
*
* Input Parameters:
* None
*
* Returned Value:
* Does not return
*
****************************************************************************/
.section .gen_handler,"ax",@progbits
.set noreorder
.ent _gen_exception
_gen_exception:
la k0, _general_exception_context
jr k0
nop
.end _gen_exception
/****************************************************************************
* Name: __start_nuttx
*

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@ -49,20 +49,32 @@ MEMORY
* REGION PHYSICAL KSEG SIZE
* DESCRIPTION START ADDR (BYTES)
* ------------- ---------- ------ ---------------
* Reset 0x1fc00000 KSEG1 896
* BEV exception 0x1fc00380 KSEG1 256
* DBG exception 0x1fc00480 KSEG1 16
* Exceptions:*
* Reset 0x1fc00000 KSEG1 512
* TLB Refill 0x1fc00200 KSEG1 256
* Cache Error 0x1fc00300 KSEG1 256
* Others 0x1fc00380 KSEG1 256
* Interrupt 0x1fc00400 KSEG1 128
* JTAG 0x1fc00480 KSEG1 16
* Startup logic 0x1fc00490 KSEG0 4096-896-256-16
* Exceptions 0x1fc01000 KSEG0 4096
* Debug code 0x1fc02000 KSEG1 4096-16
* DEVCFG3-0 0x1fc02ff0 KSEG1 16
*
* Exceptions assme:
*
* STATUS: BEV=1 and EXL=0
* CAUSE: IV=1
* JTAG: ProbEn=0
* And multi-vector support disabled
*/
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 896
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 256
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 4096-1168
kseg0_exptmem (rx) : ORIGIN = 0x9fc01000, LENGTH = 4096
kseg0_excptmem (rx) : ORIGIN = 0x9fc01000, LENGTH = 4096
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16
@ -78,6 +90,9 @@ OUTPUT_FORMAT("elf32-tradlittlemips")
OUTPUT_ARCH(pic32mx)
ENTRY(__start)
INPUT(up_inthandler.o);
INPUT(up_bevhandler.o);
SECTIONS
{
/* Boot FLASH sections */
@ -87,11 +102,35 @@ SECTIONS
*(.reset)
} > kseg1_reset
.bev_excp :
/* Exception handlers. The following is assumed:
*
* STATUS: BEV=1 and EXL=0
* CAUSE: IV=1
* JTAG: ProbEn=0
* And multi-vector support disabled
*
* In that configuration, the vector locations become:
*
* Reset, Soft Reset bfc0:0000
* TLB Refill bfc0:0200
* Cache Error bfc0:0300
* All others bfc0:0380
* Interrupt bfc0:0400
* EJTAG Debug bfc0:0480
*/
/* KSEG1 exception handler "trampolines" */
.bev_excpt :
{
*(.bev_excp)
*(.bev_excpt)
} > kseg1_bevexcpt
.int_excpt :
{
*(.int_excpt)
} > kseg1_intexcpt
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
.start :
@ -99,10 +138,13 @@ SECTIONS
*(.start)
} > kseg0_bootmem
.vectors :
/* KSEG0 exception handlers */
.excpt_handlers :
{
*(.vectors)
} > kseg0_exptmem
*(.bev_handler)
*(.int_handler)
} > kseg0_excptmem
.dbg_code = ORIGIN(kseg1_dbgcode);