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Fixes for clean compile/link

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2102 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-09-28 23:33:51 +00:00
parent 329e2000d4
commit fc6df0e4a9
3 changed files with 62 additions and 1 deletions
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31
configs/stm3210e-eval/README.txt
View File

@ -193,6 +193,37 @@ STM3210E-EVAL-specific Configuration Options
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
the delay actually is 100 seconds.
Individual subsystems can be enabled:
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_WWDG
CONFIG_STM32_SPI2
CONFIG_STM32_SPI4
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_USB
CONFIG_STM32_CAN
CONFIG_STM32_BKP
CONFIG_STM32_PWR
CONFIG_STM32_DAC
CONFIG_STM32_USB
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_TIM8
CONFIG_STM32_USART1
CONFIG_STM32_ADC3
STM32F103Z specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART

2
configs/stm3210e-eval/include/board.h
View File

@ -78,7 +78,7 @@
/* APB2 clock (PCLK2) is HCLK (72MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
#define STM32_PCLK_FREQUENCY STM32_HCLK_FREQUENCY
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */

30
configs/stm3210e-eval/ostest/defconfig
View File

@ -93,6 +93,36 @@ CONFIG_STM32_DEVKITARM=n
CONFIG_STM32_RAISONANCE=n
CONFIG_STM32_BUILDROOT=y
#
# Individual subsystems can be enabled:
CONFIG_STM32_TIM2=n
CONFIG_STM32_TIM3=n
CONFIG_STM32_TIM4=n
CONFIG_STM32_TIM5=n
CONFIG_STM32_TIM6=n
CONFIG_STM32_TIM7=n
CONFIG_STM32_WWDG=n
CONFIG_STM32_SPI2=n
CONFIG_STM32_SPI4=n
CONFIG_STM32_USART2=y
CONFIG_STM32_USART3=n
CONFIG_STM32_UART4=n
CONFIG_STM32_UART5=n
CONFIG_STM32_I2C1=n
CONFIG_STM32_I2C2=n
CONFIG_STM32_USB=y
CONFIG_STM32_CAN=n
CONFIG_STM32_BKP=n
CONFIG_STM32_PWR=n
CONFIG_STM32_DAC=n
CONFIG_STM32_ADC1=n
CONFIG_STM32_ADC2=n
CONFIG_STM32_TIM1=n
CONFIG_STM32_SPI1=n
CONFIG_STM32_TIM8=n
CONFIG_STM32_USART1=y
CONFIG_STM32_ADC3=n
#
# STM32F103Z specific serial device driver settings
#