Update comments and README
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@ -109,8 +109,9 @@ void sam_lowsetup(void);
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*
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* Description:
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* All SAMV7 architectures must provide the following entry point. This entry
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* point is called early in the initialization -- after all memory has been
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* configured and mapped but before any devices have been initialized.
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* point is called early in the initialization -- after clocking and memory have
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* been configured but before caches have been enabled and before any devices have
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* been initialized.
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*
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************************************************************************************/
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@ -118,7 +118,7 @@
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#define sam_isi_enableclk() sam_enableperiph1(SAM_PID_ISI)
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#define sam_pwm1_enableclk() sam_enableperiph1(SAM_PID_PWM1)
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#define sam_fpu_enableclk()
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#define sam_sdramc_enableclk() sam_enableperiph1(SAM_PID_SDRAMC)
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#define sam_sdramc_enableclk() sam_enableperiph1(SAM_PID_SDRAMC) /* REVISIT: Does this exist? */
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#define sam_wdt1_enableclk()
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#define sam_ccw_enableclk()
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@ -186,7 +186,7 @@
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#define sam_isi_disableclk() sam_disableperiph1(SAM_PID_ISI)
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#define sam_pwm1_disableclk() sam_disableperiph1(SAM_PID_PWM1)
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#define sam_fpu_disableclk()
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#define sam_sdramc_disableclk() sam_disableperiph1(SAM_PID_SDRAMC)
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#define sam_sdramc_disableclk() sam_disableperiph1(SAM_PID_SDRAMC) /* REVISIT: Does this exist? */
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#define sam_wdt1_disableclk()
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#define sam_ccw_disableclk()
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@ -111,6 +111,18 @@ The BASIC nsh configuration is fully function (as desribed below under
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sample code and study of the data sheet, but I have not found the key to
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solving this.
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6. Partial support for the maXTouch Xplained Pro LCD is in place. The
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ILI9488-based LCD is working well with a SMC DMA-based interface. Very
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nice performance.
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However, the maXTouch touchscreen driver is not working. I tried re-
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using the maXTouch driver that was used with the SAMA5D4-EK TM7000
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LCD, but the maXTouch Xplained Pro has a different maXTouch part.
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The driver claims that all operations are success, but there are no
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interrupts signalling touch event. I assume that the different
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maXTouch part is not being configured correctly but there is no
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avaiable technical documentation or sample code to debug with.
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Serial Console
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==============
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@ -1134,9 +1146,23 @@ Configuration sub-directories
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CP2100CP programmable PLL, and 0x57 and 0x5f are the addresses of
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the AT2 EEPROM. I am not sure what the other address, 0x37, is).
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8. Support for the touchscreen test is enabled (see apps/examples/touchscreen),
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however, the maXTouch is not yet working (see STATUS below).
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STATUS:
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2015-03-30: Currently contains on a touchscreen test. The touchscreen
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does not yet work.
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2015-04-05: Partial support for the maXTouch Xplained Pro LCD is in
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place. The ILI9488-based LCD is working well with a SMC DMA-based
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interface. Very nice performance.
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However, the maXTouch touchscreen driver is not working. I tried
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re-using the maXTouch driver that was used with the SAMA5D4-EK
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TM7000 LCD, but the maXTouch Xplained Pro has a different maXTouch
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part. The driver claims that all operations are success, but
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there are no interrupts signalling touch event. I assume that the
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different maXTouch part is not being configured correctly but there
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is no available technical documentation or sample code to debug
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with.
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netnsh:
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@ -1,4 +1,4 @@
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/************************************************************************************
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/****************************************************************************
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* configs/samv71-xult/src/sam_boot.c
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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@ -31,11 +31,11 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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****************************************************************************/
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/************************************************************************************
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/****************************************************************************
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* Included Files
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************************************************************************************/
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****************************************************************************/
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#include <nuttx/config.h>
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@ -45,35 +45,37 @@
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "sam_start.h"
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#include "samv71-xult.h"
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/************************************************************************************
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/****************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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****************************************************************************/
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/************************************************************************************
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/****************************************************************************
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* Private Functions
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************************************************************************************/
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****************************************************************************/
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/************************************************************************************
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/****************************************************************************
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* Public Functions
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************************************************************************************/
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****************************************************************************/
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/************************************************************************************
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/****************************************************************************
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* Name: sam_boardinitialize
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*
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* Description:
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* All SAM3U architectures must provide the following entry point. This entry point
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* is called early in the initialization -- after all memory has been configured
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* and mapped but before any devices have been initialized.
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* All SAMV7 architectures must provide the following entry point. This
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* entry point is called early in the initialization -- after clocking and
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* memory have been configured but before caches have been enabled and
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* before any devices have been initialized.
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*
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************************************************************************************/
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****************************************************************************/
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void sam_boardinitialize(void)
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{
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#ifdef CONFIG_SAMV7_SDRAMC
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/* Configure SDRAM if it has been enabled in the NuttX configuration. Here we
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* assume, of course, that we are not running out SDRAM.
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/* Configure SDRAM if it has been enabled in the NuttX configuration.
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* Here we assume, of course, that we are not running out SDRAM.
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*/
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sam_sdram_config();
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@ -113,7 +115,7 @@ void sam_boardinitialize(void)
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* If CONFIG_BOARD_INITIALIZE is selected, then an additional
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* initialization call will be performed in the boot-up sequence to a
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* function called board_initialize(). board_initialize() will be
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* called immediately after up_intiialize() is called and just before the
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* called immediately after up_intitialize() is called and just before the
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* initial application is started. This additional initialization phase
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* may be used, for example, to initialize board-specific device drivers.
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*
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@ -90,9 +90,11 @@
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* None
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*
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* Assumptions:
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* The DDR memory regions is configured as strongly ordered memory. When
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* we complete initialization of SDRAM and it is ready for use, we will
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* make DRAM into normal, cached memory.
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* This test runs early in initialization before I- and D-caches are
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* enabled.
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*
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* NOTE: Since the delay loop is calibrate with caches in enabled, the
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* calls to up_udelay() are wrong ty orders of magnitude.
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*
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****************************************************************************/
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