arch/mips/src/pic32mz/pic32mz-dma.c: Add a way to reconfigure a DMA channel.
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b853a5c750
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fcc1410485
@ -475,7 +475,7 @@ static inline void pic32mz_dma_forcestart(FAR struct pic32mz_dmach_s *dmach)
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static inline void pic32mz_dma_abortirq(FAR struct pic32mz_dmach_s *dmach,
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int irq)
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{
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/* Enable start irq matching. */
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/* Enable abort irq matching. */
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pic32mz_dma_putreg(dmach, PIC32MZ_DMACH_ECONSET_OFFSET, DMACH_ECON_AIRQEN);
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@ -621,11 +621,25 @@ static void pic32mz_dma_config(FAR struct pic32mz_dmach_s *dmach,
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{
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pic32mz_dma_startirq(dmach, cfg->startirq);
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}
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else
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{
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pic32mz_dma_putreg(dmach, PIC32MZ_DMACH_ECONCLR_OFFSET,
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DMACH_ECON_SIRQEN);
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}
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if (cfg->abortirq != PIC32MZ_DMA_NOIRQ)
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{
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pic32mz_dma_abortirq(dmach, cfg->abortirq);
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}
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else
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{
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pic32mz_dma_putreg(dmach, PIC32MZ_DMACH_ECONCLR_OFFSET,
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DMACH_ECON_AIRQEN);
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}
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/* Set the interrupt event(s) */
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pic32mz_dma_intctrl(dmach, cfg->event);
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/* Set the channel's mode */
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@ -830,7 +844,10 @@ DMA_HANDLE pic32mz_dma_alloc(const struct pic32mz_dma_chcfg_s *cfg)
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/* Config this channel */
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pic32mz_dma_config(dmach, cfg);
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if (cfg != NULL)
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{
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pic32mz_dma_config(dmach, cfg);
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}
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break;
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}
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@ -885,6 +902,28 @@ void pic32mz_dma_free(DMA_HANDLE handle)
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up_clrpend_irq(dmach->irq);
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}
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/*******************************************************************************
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* Name: pic32mz_dma_chcfg
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*
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* Description:
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* Configure a DMA channel.
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* This config can be done during alloc, however if reconfig is needed,
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* this functions should be used.
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*
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******************************************************************************/
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int pic32mz_dma_chcfg(DMA_HANDLE handle,
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FAR const struct pic32mz_dma_chcfg_s *cfg)
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{
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struct pic32mz_dmach_s *dmach = (struct pic32mz_dmach_s *)handle;
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DEBUGASSERT(dmach != NULL);
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pic32mz_dma_config(dmach, cfg);
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return OK;
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}
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/****************************************************************************
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* Name: pic32mz_dma_xfrsetup
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*
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@ -911,10 +950,6 @@ int pic32mz_dma_xfrsetup(DMA_HANDLE handle,
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pic32mz_dma_destsize(dmach, cfg->destsize);
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pic32mz_dma_cellsize(dmach, cfg->cellsize);
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/* Set the interrupt event(s) */
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pic32mz_dma_intctrl(dmach, cfg->event);
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return OK;
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}
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@ -130,6 +130,7 @@ struct pic32mz_dma_chcfg_s
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uint8_t priority; /* Channel's priority (0..3) */
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uint8_t startirq; /* Start event */
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uint8_t abortirq; /* Abort event */
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uint8_t event; /* Interrupt events (enum pic32mz_dma_event_e) */
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uint8_t mode; /* Channel's modes (enum pic32mz_dma_chmode_e) */
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};
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@ -142,7 +143,6 @@ struct pic32mz_dma_xfrcfg_s
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uint16_t srcsize; /* Source size */
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uint16_t destsize; /* Destination size */
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uint16_t cellsize; /* Cell size */
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uint8_t event; /* Interrupt events (enum pic32mz_dma_event_e) */
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};
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/* The following is used for sampling DMA registers when CONFIG_DEBUG_DMA
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@ -250,6 +250,19 @@ DMA_HANDLE pic32mz_dma_alloc(const struct pic32mz_dma_chcfg_s *cfg);
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void pic32mz_dma_free(DMA_HANDLE handle);
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/*******************************************************************************
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* Name: pic32mz_dma_chcfg
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*
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* Description:
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* Configure a DMA channel.
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* This config can be done during alloc, however if reconfig is needed,
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* this functions should be used.
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*
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******************************************************************************/
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int pic32mz_dma_chcfg(DMA_HANDLE handle,
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FAR const struct pic32mz_dma_chcfg_s *cfg);
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/*******************************************************************************
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* Name: pic32mz_dma_xfrsetup
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*
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