diff --git a/arch/mips/src/pic32mz/pic32mz-dma.c b/arch/mips/src/pic32mz/pic32mz-dma.c
index 4709d02add..4a606e4bd4 100644
--- a/arch/mips/src/pic32mz/pic32mz-dma.c
+++ b/arch/mips/src/pic32mz/pic32mz-dma.c
@@ -475,7 +475,7 @@ static inline void pic32mz_dma_forcestart(FAR struct pic32mz_dmach_s *dmach)
 static inline void pic32mz_dma_abortirq(FAR struct pic32mz_dmach_s *dmach,
                                         int irq)
 {
-  /* Enable start irq matching. */
+  /* Enable abort irq matching. */
 
   pic32mz_dma_putreg(dmach, PIC32MZ_DMACH_ECONSET_OFFSET, DMACH_ECON_AIRQEN);
 
@@ -621,11 +621,25 @@ static void pic32mz_dma_config(FAR struct pic32mz_dmach_s *dmach,
     {
       pic32mz_dma_startirq(dmach, cfg->startirq);
     }
+  else
+    {
+      pic32mz_dma_putreg(dmach, PIC32MZ_DMACH_ECONCLR_OFFSET,
+                         DMACH_ECON_SIRQEN);
+    }
 
   if (cfg->abortirq != PIC32MZ_DMA_NOIRQ)
     {
       pic32mz_dma_abortirq(dmach, cfg->abortirq);
     }
+  else
+    {
+      pic32mz_dma_putreg(dmach, PIC32MZ_DMACH_ECONCLR_OFFSET,
+                         DMACH_ECON_AIRQEN);
+    }
+
+  /* Set the interrupt event(s) */
+
+  pic32mz_dma_intctrl(dmach, cfg->event);
 
   /* Set the channel's mode */
 
@@ -830,7 +844,10 @@ DMA_HANDLE pic32mz_dma_alloc(const struct pic32mz_dma_chcfg_s *cfg)
 
           /* Config this channel */
 
-          pic32mz_dma_config(dmach, cfg);
+          if (cfg != NULL)
+            {
+              pic32mz_dma_config(dmach, cfg);
+            }
 
           break;
         }
@@ -885,6 +902,28 @@ void pic32mz_dma_free(DMA_HANDLE handle)
   up_clrpend_irq(dmach->irq);
 }
 
+/*******************************************************************************
+ * Name: pic32mz_dma_chcfg
+ *
+ * Description:
+ *   Configure a DMA channel.
+ *   This config can be done during alloc, however if reconfig is needed,
+ *   this functions should be used.
+ *
+ ******************************************************************************/
+
+int pic32mz_dma_chcfg(DMA_HANDLE handle,
+                      FAR const struct pic32mz_dma_chcfg_s *cfg)
+{
+  struct pic32mz_dmach_s *dmach = (struct pic32mz_dmach_s *)handle;
+
+  DEBUGASSERT(dmach != NULL);
+
+  pic32mz_dma_config(dmach, cfg);
+
+  return OK;
+}
+
 /****************************************************************************
  * Name: pic32mz_dma_xfrsetup
  *
@@ -911,10 +950,6 @@ int pic32mz_dma_xfrsetup(DMA_HANDLE handle,
   pic32mz_dma_destsize(dmach, cfg->destsize);
   pic32mz_dma_cellsize(dmach, cfg->cellsize);
 
-  /* Set the interrupt event(s) */
-
-  pic32mz_dma_intctrl(dmach, cfg->event);
-
   return OK;
 }
 
diff --git a/arch/mips/src/pic32mz/pic32mz-dma.h b/arch/mips/src/pic32mz/pic32mz-dma.h
index 0947e553b2..1577767559 100644
--- a/arch/mips/src/pic32mz/pic32mz-dma.h
+++ b/arch/mips/src/pic32mz/pic32mz-dma.h
@@ -130,6 +130,7 @@ struct pic32mz_dma_chcfg_s
   uint8_t priority; /* Channel's priority (0..3) */
   uint8_t startirq; /* Start event */
   uint8_t abortirq; /* Abort event */
+  uint8_t event;    /* Interrupt events (enum pic32mz_dma_event_e) */
   uint8_t mode;     /* Channel's modes (enum pic32mz_dma_chmode_e) */
 };
 
@@ -142,7 +143,6 @@ struct pic32mz_dma_xfrcfg_s
   uint16_t srcsize;  /* Source size */
   uint16_t destsize; /* Destination size */
   uint16_t cellsize; /* Cell size */
-  uint8_t  event;    /* Interrupt events (enum pic32mz_dma_event_e) */
 };
 
 /* The following is used for sampling DMA registers when CONFIG_DEBUG_DMA
@@ -250,6 +250,19 @@ DMA_HANDLE pic32mz_dma_alloc(const struct pic32mz_dma_chcfg_s *cfg);
 
 void pic32mz_dma_free(DMA_HANDLE handle);
 
+/*******************************************************************************
+ * Name: pic32mz_dma_chcfg
+ *
+ * Description:
+ *   Configure a DMA channel.
+ *   This config can be done during alloc, however if reconfig is needed,
+ *   this functions should be used.
+ *
+ ******************************************************************************/
+
+int pic32mz_dma_chcfg(DMA_HANDLE handle,
+                      FAR const struct pic32mz_dma_chcfg_s *cfg);
+
 /*******************************************************************************
  * Name: pic32mz_dma_xfrsetup
  *