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stm32h7/stm32_dmamux.h: Add missing CCR SPOL defines

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arch/arm/src/stm32h7/hardware/stm32_dmamux.h:

    * Add missing defines DMAMUX_CCR_SPOL_NONE,
      DMAMUX_CCR_SPOL_RISING, DMAMUX_CCR_SPOL_FALLING, and
      DMAMUX_CCR_SPOL_BOTH.

    * Fix nxstyle errors.
This commit is contained in:
Nathan Hartman 2020-11-12 10:40:31 -05:00 committed by Mateusz Szafoni
parent da70eb5c56
commit fd020fa0ae
1 changed files with 12 additions and 8 deletions
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6
arch/arm/src/stm32h7/hardware/stm32_dmamux.h
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@ -139,7 +139,11 @@
#define DMAMUX_CCR_EGE (9) /* Bit 9: Event generation enable */
#define DMAMUX_CCR_SE (16) /* Bit 16: Synchronization enable */
#define DMAMUX_CCR_SPOL_SHIFT (17) /* Bits 17-18: Synchronization polarity */
#define DMAMUX_CCR_SPOL_MASK (3 << DMAMUX_CCR_SPOL_SHIFT)
#define DMAMUX_CCR_SPOL_MASK (0x3 << DMAMUX_CCR_SPOL_SHIFT)
# define DMAMUX_CCR_SPOL_NONE (0x0 << DMAMUX_CCR_SPOL_SHIFT) /* No event: No trigger detection or generation */
# define DMAMUX_CCR_SPOL_RISING (0x1 << DMAMUX_CCR_SPOL_SHIFT) /* Rising edge */
# define DMAMUX_CCR_SPOL_FALLING (0x2 << DMAMUX_CCR_SPOL_SHIFT) /* Falling edge */
# define DMAMUX_CCR_SPOL_BOTH (0x3 << DMAMUX_CCR_SPOL_SHIFT) /* Both rising and falling edges */
#define DMAMUX_CCR_NBREQ_SHIFT (19) /* Bits 19-23: Number of DMA request - 1 to forward */
#define DMAMUX_CCR_NBREQ_MASK (0x1f << DMAMUX_CCR_NBREQ_SHIFT)
#define DMAMUX_CCR_SYNCID_SHIFT (24) /* Bits 24-26: Synchronization identification */