diff --git a/arch/arm/src/stm32/stm32_rcc.c b/arch/arm/src/stm32/stm32_rcc.c
index 8040af9e1e..87afb59d3a 100644
--- a/arch/arm/src/stm32/stm32_rcc.c
+++ b/arch/arm/src/stm32/stm32_rcc.c
@@ -51,6 +51,7 @@
 
 #include "chip.h"
 #include "stm32_rcc.h"
+#include "stm32_rtc.h"
 #include "stm32_flash.h"
 #include "stm32.h"
 #include "stm32_waste.h"
@@ -92,6 +93,14 @@
 #  error "Unsupported STM32 chip"
 #endif
 
+#if defined(CONFIG_STM32_STM32L15XX)
+# define STM32_RCC_XXX       STM32_RCC_CSR
+# define RCC_XXX_YYYRST      RCC_CSR_RTCRST
+#else
+# define STM32_RCC_XXX       STM32_RCC_BDCR
+# define RCC_XXX_YYYRST      RCC_BDCR_BDRST
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -119,10 +128,35 @@
 
 void stm32_clockconfig(void)
 {
+  uint32_t regval;
+
   /* Make sure that we are starting in the reset state */
 
   rcc_reset();
 
+  /* The RTC needs to reset the Backup Domain to change RTCSEL and resetting the
+   * Backup Domain renders to disabling the LSE as consequence.   In order to avoid
+   * resetting the Backup Domain when we already configured LSE we will reset the
+   * Backup Domain early (here).
+   */
+
+  /* Check if the RTC is already configured */
+
+  regval = getreg32(RTC_MAGIC_REG);
+  if (regval != RTC_MAGIC)
+    {
+      (void)stm32_pwr_enablebkp(true);
+
+      /* We might be changing RTCSEL - to ensure such changes work, we must
+       * reset the backup domain (having backed up the RTC_MAGIC token)
+       */
+
+      modifyreg32(STM32_RCC_XXX, 0, RCC_XXX_YYYRST);
+      modifyreg32(STM32_RCC_XXX, RCC_XXX_YYYRST, 0);
+
+      (void)stm32_pwr_enablebkp(false);
+    }
+
 #if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
 
   /* Invoke Board Custom Clock Configuration */
diff --git a/arch/arm/src/stm32/stm32_rtc.h b/arch/arm/src/stm32/stm32_rtc.h
index 731cc2d3b8..119e5e54df 100644
--- a/arch/arm/src/stm32/stm32_rtc.h
+++ b/arch/arm/src/stm32/stm32_rtc.h
@@ -79,6 +79,17 @@
 #define STM32_RTC_PRESCALER_SECOND  32767  /* Default prescaler to get a second base */
 #define STM32_RTC_PRESCALER_MIN         1  /* Maximum speed of 16384 Hz */
 
+#if !defined(CONFIG_RTC_MAGIC)
+# define CONFIG_RTC_MAGIC           (0xfacefeee)
+#endif
+
+#if !defined(CONFIG_RTC_MAGIC_REG)
+# define CONFIG_RTC_MAGIC_REG       (0)
+#endif
+
+#define RTC_MAGIC                   CONFIG_RTC_MAGIC
+#define RTC_MAGIC_REG               STM32_RTC_BKR(CONFIG_RTC_MAGIC_REG)
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/arm/src/stm32/stm32_rtcc.c b/arch/arm/src/stm32/stm32_rtcc.c
index bbb2137ab7..89d97dc46b 100644
--- a/arch/arm/src/stm32/stm32_rtcc.c
+++ b/arch/arm/src/stm32/stm32_rtcc.c
@@ -84,20 +84,10 @@
 #  endif
 #endif
 
-#if !defined(CONFIG_RTC_MAGIC)
-# define CONFIG_RTC_MAGIC (0xfacefeee)
-#endif
-
-#if !defined(CONFIG_RTC_MAGIC_REG)
-# define CONFIG_RTC_MAGIC_REG (0)
-#endif
-
 /* Constants ************************************************************************/
 
 #define SYNCHRO_TIMEOUT  (0x00020000)
 #define INITMODE_TIMEOUT (0x00010000)
-#define RTC_MAGIC        CONFIG_RTC_MAGIC
-#define RTC_MAGIC_REG    STM32_RTC_BKR(CONFIG_RTC_MAGIC_REG)
 
 /* Proxy definitions to make the same code work for all the STM32 series ************/
 
@@ -612,13 +602,6 @@ int up_rtc_initialize(void)
 
   if (regval != RTC_MAGIC)
     {
-      /* We might be changing RTCSEL - to ensure such changes work, we must reset the
-       * backup domain (having backed up the RTC_MAGIC token)
-       */
-
-      modifyreg32(STM32_RCC_XXX, 0, RCC_XXX_YYYRST);
-      modifyreg32(STM32_RCC_XXX, RCC_XXX_YYYRST, 0);
-
       /* Some boards do not have the external 32khz oscillator installed, for those
        * boards we must fallback to the crummy internal RC clock or the external high
        * rate clock
diff --git a/arch/arm/src/stm32/stm32f40xxx_rtcc.c b/arch/arm/src/stm32/stm32f40xxx_rtcc.c
index 5017658cfe..5274687963 100644
--- a/arch/arm/src/stm32/stm32f40xxx_rtcc.c
+++ b/arch/arm/src/stm32/stm32f40xxx_rtcc.c
@@ -81,20 +81,10 @@
 #  error "CONFIG_STM32_PWR must selected to use this driver"
 #endif
 
-#if !defined(CONFIG_RTC_MAGIC)
-# define CONFIG_RTC_MAGIC (0xfacefeee)
-#endif
-
-#if !defined(CONFIG_RTC_MAGIC_REG)
-# define CONFIG_RTC_MAGIC_REG (0)
-#endif
-
 /* Constants ************************************************************************/
 
 #define SYNCHRO_TIMEOUT      (0x00020000)
 #define INITMODE_TIMEOUT     (0x00010000)
-#define RTC_MAGIC            CONFIG_RTC_MAGIC
-#define RTC_MAGIC_REG        STM32_RTC_BKR(CONFIG_RTC_MAGIC_REG)
 
 /* Proxy definitions to make the same code work for all the STM32 series ************/
 
@@ -867,13 +857,6 @@ int up_rtc_initialize(void)
 
   if (regval != RTC_MAGIC)
     {
-      /* We might be changing RTCSEL - to ensure such changes work, we must reset the
-       * backup domain (having backed up the RTC_MAGIC token)
-       */
-
-      modifyreg32(STM32_RCC_XXX, 0, RCC_XXX_YYYRST);
-      modifyreg32(STM32_RCC_XXX, RCC_XXX_YYYRST, 0);
-
       /* Some boards do not have the external 32khz oscillator installed, for those
        * boards we must fallback to the crummy internal RC clock or the external high
        * rate clock