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Kconfig: Improve help text related to *_SERIALBRK_BSDCOMPAT

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* arch/arm/src/gd32f4/Kconfig
  (GD32F4_SERIALBRK_BSDCOMPAT): Improve help text.

* arch/arm/src/stm32/Kconfig
  (STM32_SERIALBRK_BSDCOMPAT): Improve help text.

* arch/arm/src/stm32f7/Kconfig
  (STM32F7_SERIALBRK_BSDCOMPAT): Improve help text.

* arch/arm/src/stm32h7/Kconfig
  (STM32H7_SERIALBRK_BSDCOMPAT): Improve help text.

* arch/arm/src/stm32l4/Kconfig
  (STM32L4_SERIALBRK_BSDCOMPAT): Improve help text.

* arch/arm/src/stm32l5/Kconfig
  (STM32L5_SERIALBRK_BSDCOMPAT): Improve help text.

* arch/arm/src/stm32u5/Kconfig
  (STM32U5_SERIALBRK_BSDCOMPAT): Improve help text.

* arch/arm/src/stm32wb/Kconfig
  (STM32WB_SERIALBRK_BSDCOMPAT): Improve help text.
This commit is contained in:
Nathan Hartman 2023-01-31 19:30:39 -05:00 committed by Xiang Xiao
parent c65a632788
commit fdb149ddb0
8 changed files with 32 additions and 24 deletions
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7
arch/arm/src/gd32f4/Kconfig
View File

@ -1985,9 +1985,10 @@ config GD32F4_SERIALBRK_BSDCOMPAT
---help---
Enable using GPIO on the TX pin to send a BSD compatible break:
TIOCSBRK will start the break and TIOCCBRK will end the break.
The current GD32F4 USARTS have no way to leave the break (TX=LOW)
on because the software starts the break and then the hadware automatically
clears the break. This makes it is difficult to sent a long break.
The current GD32F4 USARTS have no way to leave the break on
(TX=LOW) because software starts the break and then the hardware
automatically clears the break. This makes it difficult to send
a long break.
config GD32F4_USART_SINGLEWIRE
bool "Single Wire Support"

7
arch/arm/src/stm32/Kconfig
View File

@ -10298,9 +10298,10 @@ config STM32_SERIALBRK_BSDCOMPAT
---help---
Enable using GPIO on the TX pin to send a BSD compatible break:
TIOCSBRK will start the break and TIOCCBRK will end the break.
The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
on because the SW starts the break and then the HW automatically clears
the break. This makes it is difficult to sent a long break.
The current STM32 U[S]ARTS have no way to leave the break on
(TX=LOW) because software starts the break and then the hardware
automatically clears the break. This makes it difficult to send
a long break.
config STM32_USART_SINGLEWIRE
bool "Single Wire Support"

7
arch/arm/src/stm32f7/Kconfig
View File

@ -2085,9 +2085,10 @@ config STM32F7_SERIALBRK_BSDCOMPAT
---help---
Enable using GPIO on the TX pin to send a BSD compatible break:
TIOCSBRK will start the break and TIOCCBRK will end the break.
The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
on because the SW starts the break and then the HW automatically clears
the break. This makes it is difficult to sent a long break.
The current STM32F7 U[S]ARTS have no way to leave the break on
(TX=LOW) because software starts the break and then the hardware
automatically clears the break. This makes it difficult to send
a long break.
config STM32F7_USART_SINGLEWIRE
bool "Single Wire Support"

7
arch/arm/src/stm32h7/Kconfig
View File

@ -1545,9 +1545,10 @@ config STM32H7_SERIALBRK_BSDCOMPAT
---help---
Enable using GPIO on the TX pin to send a BSD compatible break:
TIOCSBRK will start the break and TIOCCBRK will end the break.
The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
on because the SW starts the break and then the HW automatically clears
the break. This makes it is difficult to sent a long break.
The current STM32H7 U[S]ARTS have no way to leave the break on
(TX=LOW) because software starts the break and then the hardware
automatically clears the break. This makes it difficult to send
a long break.
config STM32H7_USART_SINGLEWIRE
bool "Single Wire Support"

7
arch/arm/src/stm32l4/Kconfig
View File

@ -5953,9 +5953,10 @@ config STM32L4_SERIALBRK_BSDCOMPAT
---help---
Enable using GPIO on the TX pin to send a BSD compatible break:
TIOCSBRK will start the break and TIOCCBRK will end the break.
The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
on because the SW starts the break and then the HW automatically clears
the break. This makes it is difficult to sent a long break.
The current STM32L4 U[S]ARTS have no way to leave the break on
(TX=LOW) because software starts the break and then the hardware
automatically clears the break. This makes it difficult to send
a long break.
config STM32L4_USART_SINGLEWIRE
bool "Single Wire Support"

7
arch/arm/src/stm32l5/Kconfig
View File

@ -2863,9 +2863,10 @@ config STM32L5_SERIALBRK_BSDCOMPAT
---help---
Enable using GPIO on the TX pin to send a BSD compatible break:
TIOCSBRK will start the break and TIOCCBRK will end the break.
The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
on because the SW starts the break and then the HW automatically clears
the break. This makes it is difficult to sent a long break.
The current STM32L5 U[S]ARTS have no way to leave the break on
(TX=LOW) because software starts the break and then the hardware
automatically clears the break. This makes it difficult to send
a long break.
config STM32L5_USART_SINGLEWIRE
bool "Single Wire Support"

7
arch/arm/src/stm32u5/Kconfig
View File

@ -3109,9 +3109,10 @@ config STM32U5_SERIALBRK_BSDCOMPAT
---help---
Enable using GPIO on the TX pin to send a BSD compatible break:
TIOCSBRK will start the break and TIOCCBRK will end the break.
The current STM32 U[S]ARTS have no way to leave the break (TX=LOW)
on because the SW starts the break and then the HW automatically clears
the break. This makes it is difficult to sent a long break.
The current STM32U5 U[S]ARTS have no way to leave the break on
(TX=LOW) because software starts the break and then the hardware
automatically clears the break. This makes it difficult to send
a long break.
config STM32U5_USART_SINGLEWIRE
bool "Single Wire Support"

7
arch/arm/src/stm32wb/Kconfig
View File

@ -891,9 +891,10 @@ config STM32WB_SERIALBRK_BSDCOMPAT
---help---
Enable using GPIO on the TX pin to send a BSD compatible break:
TIOCSBRK will start the break and TIOCCBRK will end the break.
The current STM32WB U[S]ARTS have no way to leave the break (TX=LOW)
on because the SW starts the break and then the HW automatically clears
the break. This makes it is difficult to sent a long break.
The current STM32WB U[S]ARTS have no way to leave the break on
(TX=LOW) because software starts the break and then the hardware
automatically clears the break. This makes it difficult to send
a long break.
config STM32WB_USART_SINGLEWIRE
bool "Single Wire Support"