Fix Kconfig style

correct block name board
Remove extra TABs
Add comments

arch/arm/src/gd32f4/Kconfig

@@ -774,9 +774,9 @@ config GD32F4_ONESHOT_MAXTIMERS
 		timers that you can use.
 
 # config GD32F4_TIMER0
-# 	bool "TIMER0"
-# 	default n
-# 	depend on GD32F4_HAVE_TIMER0
+#	bool "TIMER0"
+#	default n
+#	depend on GD32F4_HAVE_TIMER0
 
 config GD32F4_TIMER0_PWM
 	bool "TIMER0 PWM"

arch/arm/src/rp2040/Kconfig

@@ -3,7 +3,7 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-		comment "RP2040 Configuration Options"
+comment "RP2040 Configuration Options"
 
 config RP2040_DMAC
 	bool "DMAC support"
@@ -377,7 +377,6 @@ config RP2040_PWM2_PHASE_CORRECT
 
 endif # RP2040_PWM2
 
-
 config RP2040_PWM3
 	bool "PWM3"
 	---help---
@@ -684,34 +683,35 @@ if RP2040_CLK_GPOUT0
 choice
 	prompt "Source Clock"
 
-	config RP2040_CLK_GPOUT0_SRC_REF
-		bool "REF (6 - 12 MHz)"
-		---help---
-			Reference clock that is always running unless in DORMANT mode. Runs from
-			Ring Oscillator (ROSC) at power-up but can be switched to Crystal
-			Oscillator (XOSC) for more accuracy.
+config RP2040_CLK_GPOUT0_SRC_REF
+	bool "REF (6 - 12 MHz)"
+	---help---
+		Reference clock that is always running unless in DORMANT mode. Runs from
+		Ring Oscillator (ROSC) at power-up but can be switched to Crystal
+		Oscillator (XOSC) for more accuracy.
 
-	config RP2040_CLK_GPOUT0_SRC_SYS
-		bool "SYS (125 MHz)"
-		---help---
-			System clock that is always running unless in DORMANT mode. Runs from
-			clk_ref at power-up but is typically switched to a PLL.
+config RP2040_CLK_GPOUT0_SRC_SYS
+	bool "SYS (125 MHz)"
+	---help---
+		System clock that is always running unless in DORMANT mode. Runs from
+		clk_ref at power-up but is typically switched to a PLL.
 
-	config RP2040_CLK_GPOUT0_SRC_USB
-		bool "USB (48 MHz)"
-		---help---
-			USB reference clock. Must be 48MHz.
+config RP2040_CLK_GPOUT0_SRC_USB
+	bool "USB (48 MHz)"
+	---help---
+		USB reference clock. Must be 48MHz.
 
-	config RP2040_CLK_GPOUT0_SRC_ADC
-		bool "ADC (48 MHz)"
-		---help---
-			ADC reference clock. Must be 48MHz.
+config RP2040_CLK_GPOUT0_SRC_ADC
+	bool "ADC (48 MHz)"
+	---help---
+		ADC reference clock. Must be 48MHz.
 
-	config RP2040_CLK_GPOUT0_SRC_RTC
-		bool "RTC (46875 Hz)"
-		---help---
-			RTC reference clock. The RTC divides this clock to generate a 1 second reference.
-endchoice
+config RP2040_CLK_GPOUT0_SRC_RTC
+	bool "RTC (46875 Hz)"
+	---help---
+		RTC reference clock. The RTC divides this clock to generate a 1 second reference.
+
+endchoice # Source Clock
 
 config RP2040_CLK_GPOUT0_DIVINT
 	int "Divisor (Integer)"
@@ -734,34 +734,35 @@ if RP2040_CLK_GPOUT1
 choice
 	prompt "Source Clock"
 
-	config RP2040_CLK_GPOUT1_SRC_REF
-		bool "REF (6 - 12 MHz)"
-		---help---
-			Reference clock that is always running unless in DORMANT mode. Runs from
-			Ring Oscillator (ROSC) at power-up but can be switched to Crystal
-			Oscillator (XOSC) for more accuracy.
+config RP2040_CLK_GPOUT1_SRC_REF
+	bool "REF (6 - 12 MHz)"
+	---help---
+		Reference clock that is always running unless in DORMANT mode. Runs from
+		Ring Oscillator (ROSC) at power-up but can be switched to Crystal
+		Oscillator (XOSC) for more accuracy.
 
-	config RP2040_CLK_GPOUT1_SRC_SYS
-		bool "SYS (125 MHz)"
-		---help---
-			System clock that is always running unless in DORMANT mode. Runs from
-			clk_ref at power-up but is typically switched to a PLL.
+config RP2040_CLK_GPOUT1_SRC_SYS
+	bool "SYS (125 MHz)"
+	---help---
+		System clock that is always running unless in DORMANT mode. Runs from
+		clk_ref at power-up but is typically switched to a PLL.
 
-	config RP2040_CLK_GPOUT1_SRC_USB
-		bool "USB (48 MHz)"
-		---help---
-			USB reference clock. Must be 48MHz.
+config RP2040_CLK_GPOUT1_SRC_USB
+	bool "USB (48 MHz)"
+	---help---
+		USB reference clock. Must be 48MHz.
 
-	config RP2040_CLK_GPOUT1_SRC_ADC
-		bool "ADC (48 MHz)"
-		---help---
-			ADC reference clock. Must be 48MHz.
+config RP2040_CLK_GPOUT1_SRC_ADC
+	bool "ADC (48 MHz)"
+	---help---
+		ADC reference clock. Must be 48MHz.
 
-	config RP2040_CLK_GPOUT1_SRC_RTC
-		bool "RTC (46875 Hz)"
-		---help---
-			RTC reference clock. The RTC divides this clock to generate a 1 second reference.
-endchoice
+config RP2040_CLK_GPOUT1_SRC_RTC
+	bool "RTC (46875 Hz)"
+	---help---
+		RTC reference clock. The RTC divides this clock to generate a 1 second reference.
+
+endchoice # Source Clock
 
 config RP2040_CLK_GPOUT1_DIVINT
 	int "Divisor (Integer)"
@@ -784,34 +785,35 @@ if RP2040_CLK_GPOUT2
 choice
 	prompt "Source Clock"
 
-	config RP2040_CLK_GPOUT2_SRC_REF
-		bool "REF (6 - 12 MHz)"
-		---help---
-			Reference clock that is always running unless in DORMANT mode. Runs from
-			Ring Oscillator (ROSC) at power-up but can be switched to Crystal
-			Oscillator (XOSC) for more accuracy.
+config RP2040_CLK_GPOUT2_SRC_REF
+	bool "REF (6 - 12 MHz)"
+	---help---
+		Reference clock that is always running unless in DORMANT mode. Runs from
+		Ring Oscillator (ROSC) at power-up but can be switched to Crystal
+		Oscillator (XOSC) for more accuracy.
 
-	config RP2040_CLK_GPOUT2_SRC_SYS
-		bool "SYS (125 MHz)"
-		---help---
-			System clock that is always running unless in DORMANT mode. Runs from
-			clk_ref at power-up but is typically switched to a PLL.
+config RP2040_CLK_GPOUT2_SRC_SYS
+	bool "SYS (125 MHz)"
+	---help---
+		System clock that is always running unless in DORMANT mode. Runs from
+		clk_ref at power-up but is typically switched to a PLL.
 
-	config RP2040_CLK_GPOUT2_SRC_USB
-		bool "USB (48 MHz)"
-		---help---
-			USB reference clock. Must be 48MHz.
+config RP2040_CLK_GPOUT2_SRC_USB
+	bool "USB (48 MHz)"
+	---help---
+		USB reference clock. Must be 48MHz.
 
-	config RP2040_CLK_GPOUT2_SRC_ADC
-		bool "ADC (48 MHz)"
-		---help---
-			ADC reference clock. Must be 48MHz.
+config RP2040_CLK_GPOUT2_SRC_ADC
+	bool "ADC (48 MHz)"
+	---help---
+		ADC reference clock. Must be 48MHz.
 
-	config RP2040_CLK_GPOUT2_SRC_RTC
-		bool "RTC (46875 Hz)"
-		---help---
-			RTC reference clock. The RTC divides this clock to generate a 1 second reference.
-endchoice
+config RP2040_CLK_GPOUT2_SRC_RTC
+	bool "RTC (46875 Hz)"
+	---help---
+		RTC reference clock. The RTC divides this clock to generate a 1 second reference.
+
+endchoice # Source Clock
 
 config RP2040_CLK_GPOUT2_DIVINT
 	int "Divisor (Integer)"
@@ -834,34 +836,35 @@ if RP2040_CLK_GPOUT3
 choice
 	prompt "Source Clock"
 
-	config RP2040_CLK_GPOUT3_SRC_REF
-		bool "REF (6 - 12 MHz)"
-		---help---
-			Reference clock that is always running unless in DORMANT mode. Runs from
-			Ring Oscillator (ROSC) at power-up but can be switched to Crystal
-			Oscillator (XOSC) for more accuracy.
+config RP2040_CLK_GPOUT3_SRC_REF
+	bool "REF (6 - 12 MHz)"
+	---help---
+		Reference clock that is always running unless in DORMANT mode. Runs from
+		Ring Oscillator (ROSC) at power-up but can be switched to Crystal
+		Oscillator (XOSC) for more accuracy.
 
-	config RP2040_CLK_GPOUT3_SRC_SYS
-		bool "SYS (125 MHz)"
-		---help---
-			System clock that is always running unless in DORMANT mode. Runs from
-			clk_ref at power-up but is typically switched to a PLL.
+config RP2040_CLK_GPOUT3_SRC_SYS
+	bool "SYS (125 MHz)"
+	---help---
+		System clock that is always running unless in DORMANT mode. Runs from
+		clk_ref at power-up but is typically switched to a PLL.
 
-	config RP2040_CLK_GPOUT3_SRC_USB
-		bool "USB (48 MHz)"
-		---help---
-			USB reference clock. Must be 48MHz.
+config RP2040_CLK_GPOUT3_SRC_USB
+	bool "USB (48 MHz)"
+	---help---
+		USB reference clock. Must be 48MHz.
 
-	config RP2040_CLK_GPOUT3_SRC_ADC
-		bool "ADC (48 MHz)"
-		---help---
-			ADC reference clock. Must be 48MHz.
+config RP2040_CLK_GPOUT3_SRC_ADC
+	bool "ADC (48 MHz)"
+	---help---
+		ADC reference clock. Must be 48MHz.
 
-	config RP2040_CLK_GPOUT3_SRC_RTC
-		bool "RTC (46875 Hz)"
-		---help---
-			RTC reference clock. The RTC divides this clock to generate a 1 second reference.
-endchoice
+config RP2040_CLK_GPOUT3_SRC_RTC
+	bool "RTC (46875 Hz)"
+	---help---
+		RTC reference clock. The RTC divides this clock to generate a 1 second reference.
+
+endchoice # Source Clock
 
 config RP2040_CLK_GPOUT3_DIVINT
 	int "Divisor (Integer)"

arch/arm/src/sama5/Kconfig

@@ -5534,9 +5534,9 @@ endchoice # CS0 Memory Type
 #	depends on SAMA5_EBICS0_NAND
 #
 # config SAMA5_EBICS0_ECCNONE
-# 	bool "No ECC"
-# 	---help---
-# 		Only raw transfers to/from NAND are supported
+#	bool "No ECC"
+#	---help---
+#		Only raw transfers to/from NAND are supported
 #
 # config SAMA5_EBICS0_SWECC
 #	bool "Software ECC"

boards/arm64/imx9/imx93-evk/Kconfig

@@ -3,5 +3,5 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-if ARCH_BOARD_IMX9QM_MEK
+if ARCH_BOARD_IMX93_EVK
 endif

boards/renesas/sh1/us7032evb1/Kconfig

@@ -3,5 +3,5 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-if ARCH_BOARD_TWR_K60N512
+if ARCH_BOARD_US7032EVB1
 endif

boards/risc-v/esp32h2/esp32h2-devkit/Kconfig

@@ -3,6 +3,6 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-if ARCH_BOARD_ESP32H2_GENERIC
+if ARCH_BOARD_ESP32H2_DEVKIT
 
-endif # ARCH_BOARD_ESP32H2_GENERIC
+endif # ARCH_BOARD_ESP32H2_DEVKIT

boards/x86_64/intel64/qemu-intel64/Kconfig

@@ -2,4 +2,3 @@
 # For a description of the syntax of this configuration file,
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
-#