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arch: renesas: nxstyle fixes

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Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea 2021-03-30 13:10:19 +02:00 committed by David Sidrane
parent 0ae3469782
commit fe0ee48c69
16 changed files with 127 additions and 97 deletions
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3
arch/renesas/include/m16c/irq.h
View File

@ -222,6 +222,7 @@
/************************************************************************************
* Public Types
************************************************************************************/
/* This struct defines the way the registers are stored. We need to save: */
#ifndef __ASSEMBLY__
@ -323,7 +324,7 @@ static inline irqstate_t up_irq_enable(void)
#endif
/************************************************************************************
* Public Functions
* Public Functions Prototypes
************************************************************************************/
#undef EXTERN

10
arch/renesas/include/sh1/irq.h
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@ -274,6 +274,7 @@
#define SH1_NMI_VNDX (11) /* 11: NMI */
#define SH1_USRBRK_VNDX (12) /* 12: User break */
/* 13-31: Reserved for system */
/* Trap instruction */
#define SH1_TRAP_VNDX (32) /* 32-63: TRAPA instruction (user break) */
@ -343,6 +344,7 @@
#define SH1_DMAC3_VNDX (78) /* 78-79: DMAC3 */
#define SH1_DEI3_VNDX (78) /* 78: DMAC3 DEI3 */
/* 79: Reserved */
/* ITU */
#define SH1_IMIA0_VNDX (80) /* 80: ITU0 IMIA0 */
@ -365,6 +367,7 @@
#define SH1_IMIB4_VNDX (97) /* 97: IMIB4 */
#define SH1_OVI4_VNDX (98) /* 98: OVI4 */
/* 99: Reserved */
/* SCI */
#define SH1_ERI0_VNDX (100) /* 100: SCI0 ERI0 */
@ -383,14 +386,15 @@
#define SH1_WDTITI_VNDX (112) /* 112: WDT ITI */
#define SH1_CMI_VNDX (113) /* 113: REF CMI */
/* 114-115: Reserved */
/* 116-255 reserved */
#endif
#define SH1_LAST_VNDX (255)
#define SH1_NVECTORS (256)
/* IRQ Stack Frame Format. The SH-1 has a push down stack. The PC
* and SR are pushed by hardware at the time an IRQ is taken.
/* IRQ Stack Frame Format. The SH-1 has a push down stack.
* The PC and SR are pushed by hardware at the time an IRQ is taken.
*/
/* Saved to the stacked by up_vector */
@ -544,7 +548,7 @@ static inline void up_irq_restore(irqstate_t flags)
#endif
/************************************************************************************
* Public Functions
* Public Functions Prototypes
************************************************************************************/
#undef EXTERN

4
arch/renesas/src/common/up_udelay.c
View File

@ -85,6 +85,7 @@ void up_udelay(useconds_t microseconds)
for (i = 0; i < CONFIG_BOARD_LOOPSPERMSEC; i++)
{
}
microseconds -= 1000;
}
@ -93,6 +94,7 @@ void up_udelay(useconds_t microseconds)
for (i = 0; i < CONFIG_BOARD_LOOPSPER100USEC; i++)
{
}
microseconds -= 100;
}
@ -101,6 +103,7 @@ void up_udelay(useconds_t microseconds)
for (i = 0; i < CONFIG_BOARD_LOOPSPER10USEC; i++)
{
}
microseconds -= 10;
}
@ -109,6 +112,7 @@ void up_udelay(useconds_t microseconds)
for (i = 0; i < CONFIG_BOARD_LOOPSPERUSEC; i++)
{
}
microseconds--;
}
}

2
arch/renesas/src/m16c/m16c_irq.c
View File

@ -31,7 +31,7 @@
#include "up_internal.h"
/****************************************************************************
* Public Data
* Public Functions
****************************************************************************/
/* This holds a references to the current interrupt level register storage

8
arch/renesas/src/m16c/m16c_lowputc.c
View File

@ -38,7 +38,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Configuration **********************************************************/
/* Configuration ************************************************************/
#ifndef M16C_XIN_PRESCALER
# define M16C_XIN_PRESCALER 1
@ -138,7 +138,7 @@
#define M16C_MR_VALUE (M16C_MR_SMDBITS|M16C_MR_PARITY|M16C_MR_STOPBITS)
/* Clocking ***************************************************************/
/* Clocking *****************************************************************/
/* The Bit Rate Generator (BRG) value can be calculated by:
*
@ -238,7 +238,9 @@ static inline void up_lowserialsetup(void)
putreg8(regval, M16C_U2C1);
#endif
/* Set UART transmit/receive control register 1 to enable transmit and receive */
/* Set UART transmit/receive control register 1 to enable transmit and
* receive
*/
putreg8(UART_C1_TE | UART_C1_RE, M16C_UART_BASE + M16C_UART_C1);

39
arch/renesas/src/m16c/m16c_serial.c
View File

@ -51,7 +51,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Configuration **********************************************************/
/* Configuration ************************************************************/
#ifndef M16C_XIN_PRESCALER
# define M16C_XIN_PRESCALER 1
@ -420,7 +420,8 @@ static inline uint16_t up_serialin16(struct up_dev_s *priv, int offset)
* Name: up_serialout
****************************************************************************/
static inline void up_serialout(struct up_dev_s *priv, int offset, uint8_t value)
static inline void up_serialout(struct up_dev_s *priv,
int offset, uint8_t value)
{
putreg8(value, priv->uartbase + offset);
}
@ -429,7 +430,8 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, uint8_t value
* Name: up_serialout16
****************************************************************************/
static inline void up_serialout16(struct up_dev_s *priv, int offset, uint16_t value)
static inline void up_serialout16(struct up_dev_s *priv,
int offset, uint16_t value)
{
putreg16(value, priv->uartbase + offset);
}
@ -438,7 +440,8 @@ static inline void up_serialout16(struct up_dev_s *priv, int offset, uint16_t va
* Name: up_disableuartint
****************************************************************************/
static inline void up_disableuartint(struct up_dev_s *priv, uint8_t *penables)
static inline void up_disableuartint(struct up_dev_s *priv,
uint8_t *penables)
{
uint8_t enables = priv->enables;
m16c_txint(priv, false);
@ -478,6 +481,7 @@ static inline void up_waittxready(struct up_dev_s *priv)
if ((up_serialin(priv, M16C_UART_C1) & UART_C1_TI) != 0)
{
/* The transmit buffer is empty... return */
break;
}
}
@ -574,11 +578,15 @@ static int up_setup(struct uart_dev_s *dev)
_err("ERROR: Invalid UART #\n");
}
/* Set UART transmit/receive control register 1 to enable transmit and receive */
/* Set UART transmit/receive control register 1 to enable transmit
* and receive
*/
up_serialout(priv, M16C_UART_C1, UART_C1_TE | UART_C1_RE);
/* Set UART transmit/receive mode register data bits, stop bits, parity */
/* Set UART transmit/receive mode register data bits, stop bits,
* parity
*/
regval = 0;
@ -676,14 +684,15 @@ static void up_shutdown(struct uart_dev_s *dev)
* Name: up_attach
*
* Description:
* Configure the UART to operation in interrupt driven mode. This method is
* called when the serial port is opened. Normally, this is just after the
* the setup() method is called, however, the serial console may operate in
* a non-interrupt driven mode during the boot phase.
* Configure the UART to operation in interrupt driven mode. This method
* is called when the serial port is opened. Normally, this is just after
* the the setup() method is called, however, the serial console may
* operate in a non-interrupt driven mode during the boot phase.
*
* RX and TX interrupts are not enabled when by the attach method (unless the
* hardware supports multiple levels of interrupt enabling). The RX and TX
* interrupts are not enabled until the txint() and rxint() methods are called.
* RX and TX interrupts are not enabled when by the attach method (unless
* the hardware supports multiple levels of interrupt enabling). The RX
* and TX interrupts are not enabled until the txint() and rxint() methods
* are called.
*
****************************************************************************/
@ -716,8 +725,8 @@ static int up_attach(struct uart_dev_s *dev)
*
* Description:
* Detach UART interrupts. This method is called when the serial port is
* closed normally just before the shutdown method is called. The exception is
* the serial console which is never shutdown.
* closed normally just before the shutdown method is called.
* The exception is the serial console which is never shutdown.
*
****************************************************************************/

4
arch/renesas/src/m16c/m16c_timer.h
View File

@ -51,6 +51,7 @@
#define TABSR_TB2S 0x80 /* Bit 7: Timer B2 count start */
/* Clock Prescaler Reset Flag Register */
/* Bits 0-6: Not used */
#define CPSRF_CPSR 0x80 /* Bit 7: 1=Prescaler is reset */
@ -107,7 +108,8 @@
*/
/* Timer B Registers (16-bit access), simple value range 0000-ffff
* (except in Pulse period/pulse width measurement mode)
* (except in Pulse period/pulse
* width measurement mode)
*/
/* Timer A Mode Register (8-bit access) */

20
arch/renesas/src/m16c/m16c_timerisr.c
View File

@ -41,6 +41,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration */
#ifndef M16C_TA0_PRIO /* Timer A0 interrupt priority */
@ -54,21 +55,24 @@
*
* 20,000,000 / 100 = 200,000
*
* The ideal prescaler value would be the one, then that drops this to exactly
* 66535:
* The ideal prescaler value would be the one, then that drops this to
* exactly 66535:
*
* M16C_IDEAL_PRESCALER = 200,000 / 65535 = 3.05
*
* And any value greater than 3.05 would also work with less and less precision.
* The following calculation will produce the ideal prescaler as the next integer
* value above any fractional values:
* And any value greater than 3.05 would also work with less and less
* precision.
* The following calculation will produce the ideal prescaler as the next
* integer value above any fractional values:
*/
#define M16C_DIVISOR (65535 * CLK_TCK)
#define M16C_IDEAL_PRESCALER \
((M16C_XIN_FREQ + M16C_DIVISOR - 1) / M16C_DIVISOR)
/* Now, given this idel prescaler value, pick between available choices: 1, 8, and 32 */
/* Now, given this idel prescaler value,
* pick between available choices: 1, 8, and 32
*/
#if M16C_IDEAL_PRESCALER > 8
# define M16C_PRESCALE_VALUE 32
@ -141,7 +145,9 @@ void up_timer_initialize(void)
putreg8(0, M16C_TB1IC);
putreg8(0, M16C_TB2IC);
/* Set up timer 0 mode register for timer mode with the calculated prescaler value */
/* Set up timer 0 mode register for timer mode with the calculated
* prescaler value
*/
putreg8(M16C_TA0MODE_CONFIG, M16C_TA0MR);

1
arch/renesas/src/m16c/m16c_uart.h
View File

@ -111,6 +111,7 @@
#define UART_CON_CLKMD1 0x20 /* Bit 5: CLK/CLKS select bit */
#define UART_CON_RCSP 0x40 /* Bit 6: Separate CTS/RTS bit */
/* Bit 7: Reserved */
/* UART2 special mode register 1 (to be provided) */
/* UART2 special mode register 2 (to be provided) */

2
arch/renesas/src/sh1/chip.h
View File

@ -53,7 +53,7 @@
#endif
/************************************************************************************
* Public Functions
* Public Functions Prototypes
************************************************************************************/
#endif /* __ARCH_RENESAS_SRC_SH1_CHIP_H */

2
arch/renesas/src/sh1/sh1_703x.h
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@ -441,7 +441,7 @@
************************************************************************************/
/************************************************************************************
* Public Functions
* Public Functions Prototypes
************************************************************************************/
#endif /* __ARCH_RENESAS_SRC_SH1_703X_H */

7
arch/renesas/src/sh1/sh1_lowputc.c
View File

@ -37,7 +37,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Configuration **********************************************************/
/* Configuration ************************************************************/
/* Is there a serial console? */
@ -104,7 +104,7 @@
#define SH1_SMR_VALUE (SH1_SMR_MODE|SH1_SMR_PARITY|SH1_SMR_STOP)
/* Clocking ***************************************************************/
/* Clocking *****************************************************************/
/* The calculation of the BRR to achieve the desired BAUD is given by the
* following formula:
@ -163,7 +163,8 @@ static inline int up_txready(void)
{
/* Check the TDRE bit in the SSR. 1=TDR is empty */
return ((getreg8(SH1_SCI_BASE + SH1_SCI_SSR_OFFSET) & SH1_SCISSR_TDRE) != 0);
return ((getreg8(SH1_SCI_BASE + SH1_SCI_SSR_OFFSET) &
SH1_SCISSR_TDRE) != 0);
}
#endif