SAMD20: Fixes the problem introduced with the SAML21 integration
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@ -558,7 +558,7 @@ static inline void sam_osc8m_config(void)
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* BOARD_DFLL_FINEVALUE - Value
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*
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* Closed loop mode only:
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* BOARD_DFLL_SRCGCLKGEN - See GCLK_CLKCTRL_GEN* definitions
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* BOARD_DFLL_SRCGCLKGEN - GCLK index
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* BOARD_DFLL_MULTIPLIER - Value
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* BOARD_DFLL_MAXCOARSESTEP - Value
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* BOARD_DFLL_MAXFINESTEP - Value
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@ -644,7 +644,7 @@ static inline void sam_dfll_config(void)
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* Enable DFLL reference clock if in closed loop mode.
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* Depends on:
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*
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* BOARD_DFLL_SRCGCLKGEN - See GCLK_CLKCTRL_GEN* definitions
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* BOARD_DFLL_SRCGCLKGEN - GCLK index
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*
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* Input Parameters:
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* None
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@ -675,7 +675,8 @@ static inline void sam_dfll_reference(void)
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* NOTE: We could enable write lock here to prevent further modification
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*/
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regval = (BOARD_DFLL_SRCGCLKGEN | GCLK_CLKCTRL_ID_DFLL48M);
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regval = ((BOARD_DFLL_SRCGCLKGEN << GCLK_CLKCTRL_GEN_SHIFT) |
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GCLK_CLKCTRL_ID_DFLL48M);
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putreg16(regval, SAM_GCLK_CLKCTRL);
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/* Enable the DFLL reference clock */
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