Merged in sur5r/nuttx-nuttx/lpc43_eth_pins (pull request #717)
arch/arm/src/lpc43xx: Fix ethernet TX_EN pin definitions TX_EN on LPC43xx can be routed via P0.1 and PC.4 in both MII and RMII mode. Before, P0.1 was hardcoded for MII and PC.4 was hardcoded for RMII. Also, the definitions used inconsistent naming (TXEN vs. TX_EN). Approved-by: GregoryN <gnutt@nuttx.org>
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@ -298,9 +298,9 @@
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#define PINCONF_ENET_TXD2_2 (PINCONF_FUNC5|PINCONF_SLEW_FAST|PINCONF_PINS9|PINCONF_PIN_4)
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#define PINCONF_ENET_TXD3_1 (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_3)
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#define PINCONF_ENET_TXD3_2 (PINCONF_FUNC5|PINCONF_SLEW_FAST|PINCONF_PINS9|PINCONF_PIN_5)
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#define PINCONF_ENET_TXEN (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_PINS0|PINCONF_PIN_1)
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#define PINCONF_ENET_TX_CLK (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_19)
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#define PINCONF_ENET_TX_EN (PINCONF_FUNC3|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_4)
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#define PINCONF_ENET_TX_EN_1 (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_PINS0|PINCONF_PIN_1)
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#define PINCONF_ENET_TX_EN_2 (PINCONF_FUNC3|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_4)
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#define PINCONF_ENET_TX_ER_1 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_5)
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#define PINCONF_ENET_TX_ER_2 (PINCONF_FUNC6|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_14)
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@ -299,9 +299,9 @@
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#define PINCONF_ENET_TXD2_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_4)
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#define PINCONF_ENET_TXD3_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_3)
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#define PINCONF_ENET_TXD3_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_5)
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#define PINCONF_ENET_TXEN (PINCONF_FUNC6|PINCONF_PINS0|PINCONF_PIN_1|PINCONF_FLOAT|PINCONF_GLITCH)
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#define PINCONF_ENET_TX_CLK (PINCONF_FUNC0|PINCONF_PINS1|PINCONF_PIN_19)
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#define PINCONF_ENET_TX_EN (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_4)
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#define PINCONF_ENET_TX_EN_1 (PINCONF_FUNC6|PINCONF_PINS0|PINCONF_PIN_1|PINCONF_FLOAT|PINCONF_GLITCH)
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#define PINCONF_ENET_TX_EN_2 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_4)
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#define PINCONF_ENET_TX_ER_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_5)
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#define PINCONF_ENET_TX_ER_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_14)
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@ -298,9 +298,9 @@
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#define PINCONF_ENET_TXD2_2 (PINCONF_FUNC5|PINCONF_SLEW_FAST|PINCONF_PINS9|PINCONF_PIN_4)
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#define PINCONF_ENET_TXD3_1 (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_3)
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#define PINCONF_ENET_TXD3_2 (PINCONF_FUNC5|PINCONF_SLEW_FAST|PINCONF_PINS9|PINCONF_PIN_5)
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#define PINCONF_ENET_TXEN (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_PINS0|PINCONF_PIN_1)
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#define PINCONF_ENET_TX_CLK (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_19)
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#define PINCONF_ENET_TX_EN (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_4)
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#define PINCONF_ENET_TX_EN_1 (PINCONF_FUNC6|PINCONF_SLEW_FAST|PINCONF_PINS0|PINCONF_PIN_1)
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#define PINCONF_ENET_TX_EN_2 (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_4)
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#define PINCONF_ENET_TX_ER_1 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_5)
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#define PINCONF_ENET_TX_ER_2 (PINCONF_FUNC6|PINCONF_INBUFFER|PINCONF_SLEW_FAST|PINCONF_PINSC|PINCONF_PIN_14)
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@ -3386,7 +3386,7 @@ static inline void lpc43_ethgpioconfig(FAR struct lpc43_ethmac_s *priv)
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lpc43_pin_config(PINCONF_ENET_RXD1);
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lpc43_pin_config(PINCONF_ENET_TXD0);
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lpc43_pin_config(PINCONF_ENET_TXD1);
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lpc43_pin_config(PINCONF_ENET_TXEN);
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lpc43_pin_config(PINCONF_ENET_TX_EN);
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#ifdef PINCONF_ENET_RESET
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lpc43_pin_config(PINCONF_ENET_RESET);
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@ -387,6 +387,7 @@
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#define PINCONF_ENET_RESET PINCONF_GPIO0p4
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#define GPIO_ENET_RESET (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN4)
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#define PINCONF_ENET_MDC PINCONF_ENET_MDC_3
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#define PINCONF_ENET_TX_EN PINCONF_ENET_TX_EN_1
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/* SD/MMC pinout */
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@ -315,5 +315,6 @@
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#define PINCONF_ENET_RESET PINCONF_GPIO0p4
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#define GPIO_ENET_RESET (GPIO_MODE_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN4)
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#define PINCONF_ENET_MDC PINCONF_ENET_MDC_3
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#define PINCONF_ENET_TX_EN PINCONF_ENET_TX_EN_1
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#endif /* __ARCH_BOARD_BOARD_H */
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