Open1788 uses SDIO-based SD card (not SPI); clone STM32 SDIO interface to LPC17xx

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5708 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2013-03-05 14:46:04 +00:00
parent c90f0f7478
commit fe5592bbd2
4 changed files with 3220 additions and 0 deletions

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@ -61,6 +61,7 @@ config ARCH_CHIP_LPC1769
config ARCH_CHIP_LPC1773
bool "LPC1773"
select ARCH_FAMILY_LPC177X
select ARCH_HAVE_SPIFI
config ARCH_CHIP_LPC1774
bool "LPC1774"
@ -108,6 +109,7 @@ config ARCH_FAMILY_LPC177X
select ARCH_HAVE_EXTSRAM0
select ARCH_HAVE_EXTDRAM
select ARCH_HAVE_EXTNOR
select ARCH_HAVE_SDIO
config ARCH_FAMILY_LPC178X
bool
@ -115,6 +117,13 @@ config ARCH_FAMILY_LPC178X
select ARCH_HAVE_EXTSRAM0
select ARCH_HAVE_EXTDRAM
select ARCH_HAVE_EXTNOR
select ARCH_HAVE_SDIO
config ARCH_HAVE_SPIFI
bool
config ARCH_HAVE_SDIO
bool
menu "LPC17xx Peripheral Support"
@ -156,6 +165,11 @@ config LPC17_USBOTG
default n
depends on LPC17_USBHOST && LPC17_USBDEV
config LPC17_SDCARD
bool "SD Card Interface"
depends on ARCH_HAVE_SDIO
default n
config LPC17_UART0
bool "UART0"
select ARCH_HAVE_UART0
@ -197,6 +211,11 @@ config LPC17_SSP1
bool "SSP1"
default n
config LPC17_SPIFI
bool "SPIFI Interface"
depends on ARCH_HAVE_SPIFI
default n
config LPC17_I2C0
bool "I2C0"
default n
@ -437,6 +456,36 @@ config I2C2_FREQ
endmenu
menu "SDIO Configuration"
depends on LPC17_SDCARD
config SDIO_DMA
bool "Support DMA data transfers"
default y if LPC17_GPDMA
depends on LPC17_GPDMA
---help---
Support DMA data transfers.
Enable SD card DMA data transfers. This is a marginally optional.
For most usages, SD accesses will cause data overruns if used without
DMA. Requires LPC17_SDCARD and config LPC17_GPDMA.
config SDIO_DMAPRIO
hex "SDIO DMA priority"
default 0x0
depends on LPC17_GPDMA
---help---
Select SDIO DMA prority.
config SDIO_WIDTH_D1_ONLY
bool "Use D1 only"
default n
---help---
Select 1-bit transfer mode. This may be selected to force the driver
operate with only a single data line (the default is to use all
4 SD data lines).Default: 4-bit transfer mode.
endmenu
menu "Ethernet driver options"
config PHY_AUTONEG

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@ -0,0 +1,244 @@
/************************************************************************************
* arch/arm/src/lpc17xx/chip/lpc17_sdcard.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_SDCARD_H
#define __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_SDCARD_H
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Register Offsets *****************************************************************/
#define LPC17_SDCARD_PWR_OFFSET 0x0000 /* SD card power control register */
#define LPC17_SDCARD_CLOCK_OFFSET 0x0004 /* SD card clock control register */
#define LPC17_SDCARD_ARG_OFFSET 0x0008 /* SD card argument register */
#define LPC17_SDCARD_CMD_OFFSET 0x000c /* SD card command register */
#define LPC17_SDCARD_RESPCMD_OFFSET 0x0010 /* SD card command response register */
#define LPC17_SDCARD_RESP_OFFSET(n) (0x0010+4*(n))
#define LPC17_SDCARD_RESP0_OFFSET 0x0014 /* SD card response 1 register */
#define LPC17_SDCARD_RESP1_OFFSET 0x0018 /* SD card response 2 register */
#define LPC17_SDCARD_RESP2_OFFSET 0x001c /* SD card response 3 register */
#define LPC17_SDCARD_RESP3_OFFSET 0x0020 /* SD card response 4 register */
#define LPC17_SDCARD_DTIMER_OFFSET 0x0024 /* SD card data timer register */
#define LPC17_SDCARD_DLEN_OFFSET 0x0028 /* SD card data length register */
#define LPC17_SDCARD_DCTRL_OFFSET 0x002c /* SD card data control register */
#define LPC17_SDCARD_DCOUNT_OFFSET 0x0030 /* SD card data counter register */
#define LPC17_SDCARD_STATUS_OFFSET 0x0034 /* SD card status register */
#define LPC17_SDCARD_CLEAR_OFFSET 0x0038 /* SD card interrupt clear register */
#define LPC17_SDCARD_MASK0_OFFSET 0x003c /* SD card mask register */
#define LPC17_SDCARD_FIFOCNT_OFFSET 0x0048 /* SD card FIFO counter register */
#define LPC17_SDCARD_FIFO_OFFSET 0x0080 /* SD card data FIFO register */
/* Register Addresses ***************************************************************/
#define LPC17_SDCARD_PWR (LPC17_SDCARD_BASE+LPC17_SDCARD_PWR_OFFSET)
#define LPC17_SDCARD_CLOCK (LPC17_SDCARD_BASE+LPC17_SDCARD_CLOCK_OFFSET)
#define LPC17_SDCARD_ARG (LPC17_SDCARD_BASE+LPC17_SDCARD_ARG_OFFSET)
#define LPC17_SDCARD_CMD (LPC17_SDCARD_BASE+LPC17_SDCARD_CMD_OFFSET)
#define LPC17_SDCARD_RESPCMD (LPC17_SDCARD_BASE+LPC17_SDCARD_RESPCMD_OFFSET)
#define LPC17_SDCARD_RESP(n) (LPC17_SDCARD_BASE+LPC17_SDCARD_RESP_OFFSET(n))
#define LPC17_SDCARD_RESP0 (LPC17_SDCARD_BASE+LPC17_SDCARD_RESP0_OFFSET)
#define LPC17_SDCARD_RESP1 (LPC17_SDCARD_BASE+LPC17_SDCARD_RESP1_OFFSET)
#define LPC17_SDCARD_RESP2 (LPC17_SDCARD_BASE+LPC17_SDCARD_RESP2_OFFSET)
#define LPC17_SDCARD_RESP3 (LPC17_SDCARD_BASE+LPC17_SDCARD_RESP3_OFFSET)
#define LPC17_SDCARD_DTIMER (LPC17_SDCARD_BASE+LPC17_SDCARD_DTIMER_OFFSET)
#define LPC17_SDCARD_DLEN (LPC17_SDCARD_BASE+LPC17_SDCARD_DLEN_OFFSET)
#define LPC17_SDCARD_DCTRL (LPC17_SDCARD_BASE+LPC17_SDCARD_DCTRL_OFFSET)
#define LPC17_SDCARD_DCOUNT (LPC17_SDCARD_BASE+LPC17_SDCARD_DCOUNT_OFFSET)
#define LPC17_SDCARD_STATUS (LPC17_SDCARD_BASE+LPC17_SDCARD_STATUS_OFFSET)
#define LPC17_SDCARD_CLEAR (LPC17_SDCARD_BASE+LPC17_SDCARD_CLEAR_OFFSET)
#define LPC17_SDCARD_MASK0 (LPC17_SDCARD_BASE+LPC17_SDCARD_MASK0_OFFSET)
#define LPC17_SDCARD_FIFOCNT (LPC17_SDCARD_BASE+LPC17_SDCARD_FIFOCNT_OFFSET)
#define LPC17_SDCARD_FIFO (LPC17_SDCARD_BASE+LPC17_SDCARD_FIFO_OFFSET)
/* Register Bitfield Definitions ****************************************************/
#define SDCARD_PWR_CTRL_SHIFT (0) /* Bits 0-1: Power supply control bits */
#define SDCARD_PWR_CTRL_MASK (3 << SDCARD_PWR_CTRL_SHIFT)
# define SDCARD_PWR_CTRL_OFF (0 << SDCARD_PWR_CTRL_SHIFT) /* 00: Power-off: card clock stopped */
# define SDCARD_PWR_CTRL_PWRUP (2 << SDCARD_PWR_CTRL_SHIFT) /* 10: Reserved power-up */
# define SDCARD_PWR_CTRL_ON (3 << SDCARD_PWR_CTRL_SHIFT) /* 11: Power-on: card is clocked */
#define SDCARD_PWR_RESET (0) /* Reset value */
#define SDCARD_CLOCK_CLKDIV_SHIFT (0) /* Bits 7-0: Clock divide factor */
#define SDCARD_CLOCK_CLKDIV_MASK (0xff << SDCARD_CLOCK_CLKDIV_SHIFT)
#define SDCARD_CLOCK_CLKEN (1 << 8) /* Bit 8: Clock enable bit */
#define SDCARD_CLOCK_PWRSAV (1 << 9) /* Bit 9: Power saving configuration bit */
#define SDCARD_CLOCK_BYPASS (1 << 10) /* Bit 10: Clock divider bypass enable bit */
#define SDCARD_CLOCK_WIDBUS_SHIFT (11) /* Bits 12-11: Wide bus mode enable bits */
#define SDCARD_CLOCK_WIDBUS_MASK (3 << SDCARD_CLOCK_WIDBUS_SHIFT)
# define SDCARD_CLOCK_WIDBUS_D1 (0 << SDCARD_CLOCK_WIDBUS_SHIFT) /* 00: Default (SDIO_D0) */
# define SDCARD_CLOCK_WIDBUS_D4 (1 << SDCARD_CLOCK_WIDBUS_SHIFT) /* 01: 4-wide (SDIO_D[3:0]) */
# define SDCARD_CLOCK_WIDBUS_D8 (2 << SDCARD_CLOCK_WIDBUS_SHIFT) /* 10: 8-wide (SDIO_D[7:0]) */
#define SDCARD_CLOCK_NEGEDGE (1 << 13) /* Bit 13: SDIO_CK dephasing selection bit */
#define SDCARD_CLOCK_HWFC_EN (1 << 14) /* Bit 14: HW Flow Control enable */
#define SDCARD_CLOCK_RESET (0) /* Reset value */
#define SDCARD_ARG_RESET (0) /* Reset value */
#define SDCARD_CMD_INDEX_SHIFT (0)
#define SDCARD_CMD_INDEX_MASK (0x3f << SDCARD_CMD_INDEX_SHIFT)
#define SDCARD_CMD_WAITRESP_SHIFT (6) /* Bits 7-6: Wait for response bits */
#define SDCARD_CMD_WAITRESP_MASK (3 << SDCARD_CMD_WAITRESP_SHIFT)
# define SDCARD_CMD_NORESPONSE (0 << SDCARD_CMD_WAITRESP_SHIFT) /* 00/10: No response */
# define SDCARD_CMD_SHORTRESPONSE (1 << SDCARD_CMD_WAITRESP_SHIFT) /* 01: Short response */
# define SDCARD_CMD_LONGRESPONSE (3 << SDCARD_CMD_WAITRESP_SHIFT) /* 11: Long response */
#define SDCARD_CMD_WAITINT (1 << 8) /* Bit 8: CPSM waits for interrupt request */
#define SDCARD_CMD_WAITPEND (1 << 9) /* Bit 9: CPSM Waits for ends of data transfer */
#define SDCARD_CMD_CPSMEN (1 << 10) /* Bit 10: Command path state machine enable */
#define SDCARD_CMD_SUSPEND (1 << 11) /* Bit 11: SD I/O suspend command */
#define SDCARD_CMD_ENDCMD (1 << 12) /* Bit 12: Enable CMD completion */
#define SDCARD_CMD_NIEN (1 << 13) /* Bit 13: not Interrupt Enable */
#define SDCARD_CMD_ATACMD (1 << 14) /* Bit 14: CE-ATA command */
#define SDCARD_CMD_RESET (0) /* Reset value */
#define SDCARD_RESPCMD_SHIFT (0)
#define SDCARD_RESPCMD_MASK (0x3f << SDCARD_RESPCMD_SHIFT)
#define SDCARD_DTIMER_RESET (0) /* Reset value */
#define SDCARD_DLEN_SHIFT (0)
#define SDCARD_DLEN_MASK (0x01ffffff << SDCARD_DLEN_SHIFT)
#define SDCARD_DLEN_RESET (0) /* Reset value */
#define SDCARD_DCTRL_DTEN (1 << 0) /* Bit 0: Data transfer enabled bit */
#define SDCARD_DCTRL_DTDIR (1 << 1) /* Bit 1: Data transfer direction */
#define SDCARD_DCTRL_DTMODE (1 << 2) /* Bit 2: Data transfer mode */
#define SDCARD_DCTRL_DMAEN (1 << 3) /* Bit 3: DMA enable bit */
#define SDCARD_DCTRL_DBLOCKSIZE_SHIFT (4) /* Bits 7-4: Data block size */
#define SDCARD_DCTRL_DBLOCKSIZE_MASK (15 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_1BYTE (0 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_2BYTES (1 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_4BYTES (2 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_8BYTES (3 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_16BYTES (4 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_32BYTES (5 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_64BYTES (6 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_128BYTES (7 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_256BYTES (8 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_512BYTES (9 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_1KBYTE (10 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_2KBYTES (11 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_4KBYTES (12 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_8KBYTES (13 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
# define SDCARD_DCTRL_16KBYTES (14 << SDCARD_DCTRL_DBLOCKSIZE_SHIFT)
#define SDCARD_DCTRL_RWSTART (1 << 8) /* Bit 8: Read wait start */
#define SDCARD_DCTRL_RWSTOP (1 << 9) /* Bit 9: Read wait stop */
#define SDCARD_DCTRL_RWMOD (1 << 10) /* Bit 10: Read wait mode */
#define SDCARD_DCTRL_SDIOEN (1 << 11) /* Bit 11: SD I/O enable functions */
#define SDCARD_DCTRL_RESET (0) /* Reset value */
#define SDCARD_DATACOUNT_SHIFT (0)
#define SDCARD_DATACOUNT_MASK (0x01ffffff << SDCARD_DATACOUNT_SHIFT)
#define SDCARD_STATUS_CCRCFAIL (1 << 0) /* Bit 0: Command response CRC fail */
#define SDCARD_STATUS_DCRCFAIL (1 << 1) /* Bit 1: Data block CRC fail */
#define SDCARD_STATUS_CTIMEOUT (1 << 2) /* Bit 2: Command response timeout */
#define SDCARD_STATUS_DTIMEOUT (1 << 3) /* Bit 3: Data timeout */
#define SDCARD_STATUS_TXUNDERR (1 << 4) /* Bit 4: Transmit FIFO underrun error */
#define SDCARD_STATUS_RXOVERR (1 << 5) /* Bit 5: Received FIFO overrun error */
#define SDCARD_STATUS_CMDREND (1 << 6) /* Bit 6: Command response received */
#define SDCARD_STATUS_CMDSENT (1 << 7) /* Bit 7: Command sent */
#define SDCARD_STATUS_DATAEND (1 << 8) /* Bit 8: Data end */
#define SDCARD_STATUS_STBITERR (1 << 9) /* Bit 9: Start bit not detected */
#define SDCARD_STATUS_DBCKEND (1 << 10) /* Bit 10: Data block sent/received */
#define SDCARD_STATUS_CMDACT (1 << 11) /* Bit 11: Command transfer in progress */
#define SDCARD_STATUS_TXACT (1 << 12) /* Bit 12: Data transmit in progress */
#define SDCARD_STATUS_RXACT (1 << 13) /* Bit 13: Data receive in progress */
#define SDCARD_STATUS_TXFIFOHE (1 << 14) /* Bit 14: Transmit FIFO half empty */
#define SDCARD_STATUS_RXFIFOHF (1 << 15) /* Bit 15: Receive FIFO half full */
#define SDCARD_STATUS_TXFIFOF (1 << 16) /* Bit 16: Transmit FIFO full */
#define SDCARD_STATUS_RXFIFOF (1 << 17) /* Bit 17: Receive FIFO full */
#define SDCARD_STATUS_TXFIFOE (1 << 18) /* Bit 18: Transmit FIFO empty */
#define SDCARD_STATUS_RXFIFOE (1 << 19) /* Bit 19: Receive FIFO empty */
#define SDCARD_STATUS_TXDAVL (1 << 20) /* Bit 20: Data available in transmit FIFO */
#define SDCARD_STATUS_RXDAVL (1 << 21) /* Bit 21: Data available in receive FIFO */
#define SDCARD_STATUS_SDIOIT (1 << 22) /* Bit 22: SDIO interrupt received */
#define SDCARD_STATUS_CEATAEND (1 << 23) /* Bit 23: CMD6 CE-ATA command completion */
#define SDCARD_CLEAR_CCRCFAILC (1 << 0) /* Bit 0: CCRCFAIL flag clear bit */
#define SDCARD_CLEAR_DCRCFAILC (1 << 1) /* Bit 1: DCRCFAIL flag clear bit */
#define SDCARD_CLEAR_CTIMEOUTC (1 << 2) /* Bit 2: CTIMEOUT flag clear bit */
#define SDCARD_CLEAR_DTIMEOUTC (1 << 3) /* Bit 3: DTIMEOUT flag clear bit */
#define SDCARD_CLEAR_TXUNDERRC (1 << 4) /* Bit 4: TXUNDERR flag clear bit */
#define SDCARD_CLEAR_RXOVERRC (1 << 5) /* Bit 5: RXOVERR flag clear bit */
#define SDCARD_CLEAR_CMDRENDC (1 << 6) /* Bit 6: CMDREND flag clear bit */
#define SDCARD_CLEAR_CMDSENTC (1 << 7) /* Bit 7: CMDSENT flag clear bit */
#define SDCARD_CLEAR_DATAENDC (1 << 8) /* Bit 8: DATAEND flag clear bit */
#define SDCARD_CLEAR_STBITERRC (1 << 9) /* Bit 9: STBITERR flag clear bit */
#define SDCARD_CLEAR_DBCKENDC (1 << 10) /* Bit 10: DBCKEND flag clear bit */
#define SDCARD_CLEAR_SDIOITC (1 << 22) /* Bit 22: SDIOIT flag clear bit */
#define SDCARD_CLEAR_CEATAENDC (1 << 23) /* Bit 23: CEATAEND flag clear bit */
#define SDCARD_CLEAR_RESET 0x00c007ff
#define SDCARD_CLEAR_STATICFLAGS 0x000005ff
#define SDCARD_MASK_CCRCFAILIE (1 << 0) /* Bit 0: Command CRC fail interrupt enable */
#define SDCARD_MASK_DCRCFAILIE (1 << 1) /* Bit 1: Data CRC fail interrupt enable */
#define SDCARD_MASK_CTIMEOUTIE (1 << 2) /* Bit 2: Command timeout interrupt enable */
#define SDCARD_MASK_DTIMEOUTIE (1 << 3) /* Bit 3: Data timeout interrupt enable */
#define SDCARD_MASK_TXUNDERRIE (1 << 4) /* Bit 4: Tx FIFO underrun error interrupt enable */
#define SDCARD_MASK_RXOVERRIE (1 << 5) /* Bit 5: Rx FIFO overrun error interrupt enable */
#define SDCARD_MASK_CMDRENDIE (1 << 6) /* Bit 6: Command response received interrupt enable */
#define SDCARD_MASK_CMDSENTIE (1 << 7) /* Bit 7: Command sent interrupt enable */
#define SDCARD_MASK_DATAENDIE (1 << 8) /* Bit 8: Data end interrupt enable */
#define SDCARD_MASK_STBITERRIE (1 << 9) /* Bit 9: Start bit error interrupt enable */
#define SDCARD_MASK_DBCKENDIE (1 << 10) /* Bit 10: Data block end interrupt enable */
#define SDCARD_MASK_CMDACTIE (1 << 11) /* Bit 11: Command acting interrupt enable */
#define SDCARD_MASK_TXACTIE (1 << 12) /* Bit 12: Data transmit acting interrupt enable */
#define SDCARD_MASK_RXACTIE (1 << 13) /* Bit 13: Data receive acting interrupt enable */
#define SDCARD_MASK_TXFIFOHEIE (1 << 14) /* Bit 14: Tx FIFO half empty interrupt enable */
#define SDCARD_MASK_RXFIFOHFIE (1 << 15) /* Bit 15: Rx FIFO half full interrupt enable */
#define SDCARD_MASK_TXFIFOFIE (1 << 16) /* Bit 16: Tx FIFO full interrupt enable */
#define SDCARD_MASK_RXFIFOFIE (1 << 17) /* Bit 17: Rx FIFO full interrupt enable */
#define SDCARD_MASK_TXFIFOEIE (1 << 18) /* Bit 18: Tx FIFO empty interrupt enable */
#define SDCARD_MASK_RXFIFOEIE (1 << 19) /* Bit 19: Rx FIFO empty interrupt enable */
#define SDCARD_MASK_TXDAVLIE (1 << 20) /* Bit 20: Data available in Tx FIFO interrupt enable */
#define SDCARD_MASK_RXDAVLIE (1 << 21) /* Bit 21: Data available in Rx FIFO interrupt enable */
#define SDCARD_MASK_SDIOITIE (1 << 22) /* Bit 22: SDIO mode interrupt received interrupt enable */
#define SDCARD_MASK_CEATAENDIE (1 << 23) /* Bit 23: CE-ATA command completion interrupt enable */
#define SDCARD_MASK_RESET (0)
#define SDCARD_FIFOCNT_SHIFT (0)
#define SDCARD_FIFOCNT_MASK (0x01ffffff << SDCARD_FIFOCNT_SHIFT)
#endif /* __ARCH_ARM_SRC_LPC17XX_CHIP_LPC17_SDCARD_H */

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@ -0,0 +1,127 @@
/************************************************************************************
* arch/arm/src/lpc17xx/lpc17_sdcard.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_LPC17XX_LPC17_SDCARD_H
#define __ARCH_ARM_SRC_LPC17XX_LPC17_SDCARD_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdbool.h>
#include "chip.h"
#include "chip/lpc17_sdcard.h"
/************************************************************************************
* Public Functions
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: sdio_initialize
*
* Description:
* Initialize SDIO for operation.
*
* Input Parameters:
* slotno - Not used.
*
* Returned Values:
* A reference to an SDIO interface structure. NULL is returned on failures.
*
****************************************************************************/
struct sdio_dev_s; /* See include/nuttx/sdio.h */
FAR struct sdio_dev_s *sdio_initialize(int slotno);
/****************************************************************************
* Name: sdio_mediachange
*
* Description:
* Called by board-specific logic -- posssible from an interrupt handler --
* in order to signal to the driver that a card has been inserted or
* removed from the slot
*
* Input Parameters:
* dev - An instance of the SDIO driver device state structure.
* cardinslot - true is a card has been detected in the slot; false if a
* card has been removed from the slot. Only transitions
* (inserted->removed or removed->inserted should be reported)
*
* Returned Values:
* None
*
****************************************************************************/
void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot);
/****************************************************************************
* Name: sdio_wrprotect
*
* Description:
* Called by board-specific logic to report if the card in the slot is
* mechanically write protected.
*
* Input Parameters:
* dev - An instance of the SDIO driver device state structure.
* wrprotect - true is a card is writeprotected.
*
* Returned Values:
* None
*
****************************************************************************/
void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_LPC17XX_LPC17_SDCARD_H */